JPS59225603A - Oscillating circuit - Google Patents
Oscillating circuitInfo
- Publication number
- JPS59225603A JPS59225603A JP58101098A JP10109883A JPS59225603A JP S59225603 A JPS59225603 A JP S59225603A JP 58101098 A JP58101098 A JP 58101098A JP 10109883 A JP10109883 A JP 10109883A JP S59225603 A JPS59225603 A JP S59225603A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- oscillation
- nand circuit
- diode
- nand
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 39
- 239000003990 capacitor Substances 0.000 abstract description 6
- 238000007796 conventional method Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 12
- 239000013078 crystal Substances 0.000 description 4
- 238000000034 method Methods 0.000 description 2
- 241001494479 Pecora Species 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/03—Astable circuits
- H03K3/0307—Stabilisation of output, e.g. using crystal
Landscapes
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Oscillators With Electromechanical Resonators (AREA)
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
Description
【発明の詳細な説明】
（ａｌ 発明の技術分野
本発明は、発振素子と否定論理積回路を用いて発振する
発振回路に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to an oscillation circuit that oscillates using an oscillation element and a NAND circuit.
（ｂｌ 技術の背景
従来、嶺振回路は、電子回路を用いてアナログ信号やデ
ジタル信号を使用する各種の電子機器、或いは、電子応
用機器の基本であり、発振器の安定な、しかも、確実に
発振することが重要な要素である。発振素子として、Ｌ
Ｃ発振子、水晶発振子、音片発振子等、種々の発振子が
使用されている。(bl Technology background) Conventionally, oscillator circuits have been the basis of various electronic devices and electronic application devices that use analog and digital signals using electronic circuits, and have been used to ensure stable and reliable oscillation of oscillators. This is an important element.As an oscillation element, L
Various oscillators are used, such as a C oscillator, a crystal oscillator, and a vibrating element oscillator.
最近は水晶発振子が多く用いられ、発振素子の周辺回路
について、安定な発振回路を得るために、種々の回路方
式が提案されている。Recently, crystal oscillators have been widely used, and various circuit systems have been proposed for peripheral circuits of oscillation elements in order to obtain stable oscillation circuits.
（０） 従汽技術と問題点
従来の、この種の発振回路について以下説明する。第１
図は従来の基本発振回路図である。１は水晶発振宇、２
は否定論理積回路（以下ＮＡＮＤ回路と略称する）、３
．４．５は抵抗を示す、第１図の構成において、ＮＡＮ
Ｄ回路２は周知の如（電源依存性を持っており、電圧が
高い程ゲインは小さくなる。従って、立ち上がりの速い
電源では、電源投入と同時に高い電圧が印加され、初期
からゲインの小さい領域に入り、発振不能になることが
ある。これを防ぐ手段、とじて、従来電源の立ち上がり
を遅くする方法や、ＮＡＮＤ回路２のゲー１の入出力端
にコンデンサを挿入し、発振スタートを確実にする方法
が採用されている。(0) Conventional Automobile Technology and Problems A conventional oscillation circuit of this type will be explained below. 1st
The figure is a conventional basic oscillation circuit diagram. 1 is a crystal oscillator, 2
is a negative AND circuit (hereinafter abbreviated as NAND circuit), 3
．． 4.5 indicates the resistance, in the configuration of Figure 1, NAN
As is well known, the D circuit 2 is dependent on the power supply, and the higher the voltage, the smaller the gain. Therefore, with a power supply that rises quickly, a high voltage is applied as soon as the power is turned on, and it is in the low gain region from the beginning. Measures to prevent this include the conventional method of slowing down the rise of the power supply, or inserting a capacitor at the input/output terminal of gate 1 of NAND circuit 2 to ensure that oscillation starts. method has been adopted.
第２図はＮＡＮＤ回路２のゲートの入力端にコンデンサ
６を入れた発振回路図で、第３図は第２図の等価回路図
である。企図を通し、同一対象物は同一符号で示す。第
３図のＮＡＮＤ回路２の入力端の電圧をｖｌ、出力端の
電圧をｖ２とし、ｖｌがトランジスタ７をオンするため
に充分な電位になるまで、コンデンサ６でｖｌを抑制す
るため、初期にＶｌの電位が高くならず、発振するのに
充分なゲイン領域を保てるので発振する。しかし、発振
周波数によってコンデンサ６の静電容量が大きくなれば
、逆に発振不能となる可能性があり、完全とは言えない
欠点を有し、電源の立ち上がりを遅くする方法は回路が
複雑となり、発振回路が高価となる欠点を有していた。FIG. 2 is an oscillation circuit diagram in which a capacitor 6 is inserted at the input terminal of the gate of the NAND circuit 2, and FIG. 3 is an equivalent circuit diagram of FIG. Identical objects are designated by the same reference numerals throughout the design. Let the voltage at the input end of the NAND circuit 2 in FIG. 3 be vl, and the voltage at the output end be v2. Oscillation occurs because the potential of Vl does not rise and a gain region sufficient for oscillation can be maintained. However, if the capacitance of the capacitor 6 becomes large depending on the oscillation frequency, there is a possibility that oscillation will become impossible, and this has the disadvantage that it is not perfect. This had the disadvantage that the oscillation circuit was expensive.
Ｔｄｌ 発明の目的
本発明は、この従来の欠点を解決することを目的として
いる。Tdl OBJECT OF THE INVENTION The present invention aims to overcome this conventional drawback.
（Ｑｌ 発明の構成
上記目的は、発振素子と否定論理積回路を用いて発振す
る発振回路において、前記否定論理積回路と並列に、複
数段直列にしたダイオードを接続するよう構成した本発
明によって達成される。(Ql Structure of the Invention The above object is achieved by the present invention, which is configured such that, in an oscillation circuit that oscillates using an oscillation element and a NAND circuit, a plurality of stages of diodes connected in series are connected in parallel with the NAND circuit. be done.
即ち、ＮＡ肋回路と並列に数段直列にしたダイオードを
接続し、ＮＡＮＤ回路２のゲートの入力端にかかる電位
を抑制し、確実に安定な発振が得られ、・発振周波数に
よっての発振不安定や、複雑な発振回路を必要としない
安価な発振回路を提供するものである。In other words, by connecting several stages of diodes in series in parallel with the NA strip circuit, the potential applied to the input terminal of the gate of the NAND circuit 2 is suppressed, ensuring stable oscillation, and preventing oscillation instability due to the oscillation frequency. The present invention provides an inexpensive oscillation circuit that does not require a complex oscillation circuit.
（ｆｌ 発明の実施例
以下本発明の一実施例について説明する。第４図は本発
明による発振回路図を示し、８は３１固直列に接続した
ダイオードである。ダイオード８はＮＡＮＤ回路２の入
力側と出力側の間に接続する。(fl Embodiment of the Invention An embodiment of the present invention will be described below. FIG. 4 shows an oscillation circuit diagram according to the present invention, and 8 is a diode 31 connected in series. The diode 8 is the input of the NAND circuit 2. Connect between the side and the output side.
第５図は第４図の等価回路図を示し、第３図同様ＮＡＮ
Ｄ回路２の入力端の電圧をｖｌ、出力端の電圧をｖ２と
し、電源投入と同時にダイオード８の特性により、ｖｌ
の電位をトランジスタ７をオンするに充分な電位になる
まで抑制するため、恰もコンデンサを挿入したのと同様
な原理で確実に発振を開始する。従来の方法と比較し、
発振周波数に左右されず、電源の立ち上がりを遅くする
複雑な回路を必要としない極めて簡単な構成であり、ま
た、発振回路の外部からでも接続できるので、コスト面
でも有利に施行でき、安価で確実な発振回路を提供する
利点がある。Figure 5 shows an equivalent circuit diagram of Figure 4, and like Figure 3, NAN
Let the voltage at the input end of the D circuit 2 be vl, and the voltage at the output end be v2.As soon as the power is turned on, due to the characteristics of the diode 8, vl
In order to suppress the potential of the transistor 7 to a potential sufficient to turn on the transistor 7, oscillation is reliably started using the same principle as when a capacitor is inserted. Compared to traditional methods,
It is not affected by the oscillation frequency and has an extremely simple configuration that does not require a complicated circuit that slows down the power supply startup.Also, it can be connected from outside the oscillation circuit, making it cost-effective, inexpensive, and reliable. This has the advantage of providing a unique oscillation circuit.
（沿 発明の詳細
な説明した・ように、本発明による複数心直列にしたダ
イオードを、発振素子とＮＡＮＤ回路を用いて発振する
発振回路に接続することにより、極めて簡単な構成で、
しかも、安価で確実に発振する発振回路を得る効果があ
る。(According to the detailed description of the invention), by connecting the diode with multiple cores connected in series according to the present invention to an oscillation circuit that oscillates using an oscillation element and a NAND circuit, the structure is extremely simple.
Moreover, there is an effect of obtaining an oscillation circuit that is inexpensive and reliably oscillates.
第１図は従来の基本発振回路図、第２図は従来の発振回
路図、第３図は第２図の等価回路図、第４図は本発明に
よる発振回路図、第５図は第４図の等価回路図を示す。
図面において、１は水晶発振子′、２はＮＡＮＤ回路、
６はコンデンサ、７はトランジスタ、８は３段直列接続
のダイオードをそれぞれ示す。
羊 １ 紹 竿 ２ 図＊ ３ 凶
卒４−１１ｆｌ
１５−Fig. 1 is a conventional basic oscillation circuit diagram, Fig. 2 is a conventional oscillation circuit diagram, Fig. 3 is an equivalent circuit diagram of Fig. 2, Fig. 4 is an oscillation circuit diagram according to the present invention, and Fig. 5 is a conventional oscillation circuit diagram. The equivalent circuit diagram of the figure is shown. In the drawing, 1 is a crystal oscillator', 2 is a NAND circuit,
6 is a capacitor, 7 is a transistor, and 8 is a three-stage series-connected diode. Sheep 1 Shao Rod 2 Diagram * 3 Kyousou 4-11fl 15-
Claims (1)
あって、前記否定論理積回路と並列に、複数段直列にし
たダイオードを接続するよう構成したことを特徴とする
発振回路。An oscillation circuit that oscillates using an oscillation element and a NAND circuit, characterized in that the oscillation circuit is configured such that a plurality of stages of diodes connected in series are connected in parallel with the NAND circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58101098A JPS59225603A (en) | 1983-06-07 | 1983-06-07 | Oscillating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58101098A JPS59225603A (en) | 1983-06-07 | 1983-06-07 | Oscillating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59225603A true JPS59225603A (en) | 1984-12-18 |
Family
ID=14291616
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58101098A Pending JPS59225603A (en) | 1983-06-07 | 1983-06-07 | Oscillating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59225603A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008263272A (en) * | 2007-04-10 | 2008-10-30 | Hideaki Takashima | Piezoelectric oscillator |
| JP2011077724A (en) * | 2009-09-29 | 2011-04-14 | Murata Mfg Co Ltd | Crystal oscillation circuit |
-
1983
- 1983-06-07 JP JP58101098A patent/JPS59225603A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008263272A (en) * | 2007-04-10 | 2008-10-30 | Hideaki Takashima | Piezoelectric oscillator |
| JP2011077724A (en) * | 2009-09-29 | 2011-04-14 | Murata Mfg Co Ltd | Crystal oscillation circuit |
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