JPS59223295A - Production of compound semiconductor - Google Patents
Production of compound semiconductorInfo
- Publication number
- JPS59223295A JPS59223295A JP9235983A JP9235983A JPS59223295A JP S59223295 A JPS59223295 A JP S59223295A JP 9235983 A JP9235983 A JP 9235983A JP 9235983 A JP9235983 A JP 9235983A JP S59223295 A JPS59223295 A JP S59223295A
- Authority
- JP
- Japan
- Prior art keywords
- raw material
- melt
- compd
- compound semiconductor
- single crystal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B27/00—Single-crystal growth under a protective fluid
- C30B27/02—Single-crystal growth under a protective fluid by pulling from a melt
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の技術分野］
この発明は、たとえばＧａＰもしくはＧａＡＳ等のどど
き化合物半導体を製造する方法に関し、特に、所定の不
純物濃度を右する化合物半導体を高い歩留りで製造する
ことがＣきる新規な化合物半導体製造方法に関するｂの
である。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a compound semiconductor such as GaP or GaAS, and particularly to a method for manufacturing a compound semiconductor having a predetermined impurity concentration at a high yield. This is related to a novel compound semiconductor manufacturing method in which C can be achieved.
［発明の技術的背景Ｊ
従来、ＧａＡＳやＧａＰのごどき平衡Ｆ／１′断圧の高
い化合物半導体は、いわゆるＩＬｃ法〈液体力ブレ方法
）にｊ、って製造されている。 従来の化合物半導体の
１−［Ｃ法においてはよく知られ（いるように、該化合
物半導体の栴成冗累から成る原料化合物及び該化合物半
導体に添加ηべき不純物元素（ＧａＡＳ−（ＪＧａｒ）
の場合にはｉｔ休体ｉなど）並びに補助材料としての酸
化はうｉ（＋−３，０３）を石英るつぼ内で溶融して該
るつぼ内に該化合物半導体と該不純物とを含む融液と該
融液表面を覆う不活性液層（Ｂ、０３）を形成した後、
該融液中に浸漬した該化合物半導体の種結晶体を該融液
中から該不活性液層の外へ徐々に引き出づことにより、
不純物ドープされた化合物半導体のバルク結晶を街−（
いる。[Technical Background of the Invention J Conventionally, compound semiconductors such as GaAS and GaP, which have a high equilibrium F/1' cut-off pressure, have been manufactured by the so-called ILc method (liquid force blur method). In the conventional 1-[C method for compound semiconductors, as is well known, a raw material compound consisting of a compound semiconductor and an impurity element (GaAS-(JGar)) added to the compound semiconductor are used.
In the case of , the oxidation compound i (+-3,03) as an auxiliary material is melted in a quartz crucible to form a melt containing the compound semiconductor and the impurity in the crucible. After forming an inert liquid layer (B, 03) covering the surface of the melt,
By gradually drawing out the seed crystal of the compound semiconductor immersed in the melt from the melt to the outside of the inert liquid layer,
Building bulk crystals of impurity-doped compound semiconductors (
There is.
しかしながら、前記従来方法には以下のに記載Ｊる問題
点があるため、所定の不純物濃度の化合物半導体を得る
ことがｐｉ Ｌ ＜、また、それ故に歩留りも極めて低
かった。However, the conventional method has problems as described below, so that it is difficult to obtain a compound semiconductor with a predetermined impurity concentration, and therefore the yield is extremely low.
［背景技術の問題点］
前記従】（方法においては、原料化合物及び不純物並び
に８２０３を石英るつぼ内で加熱が温しで溶融していく
過程ぐ温度が約６００℃に！、すると、まず、１３．Ｏ
，が溶融して、Ｂ、０．の液体が生じ、更に昇温しＵ
１２００ＴＥ以、［になってから原ｆｉｔ化合物の融液
が生じるが、３ｉは密度が小さく （２，３３ｇ／ｃｃ
）、高粘性の［３，０３が生じると３ｉはＢ、Ｏ，中に
取り込まれて固体の原料化合物から分離してしまう。
そして一旦、１３，０３中に取り込まれた３ｉは、その
摸、該原料化合物が溶融されて融液となった後にも１３
，０３中がら該融液中に移動づる割合が少ないため、融
液中の３ｉ濃度は当初に設定した値よりも非常に低くな
るという状態が生じることになる。 また、一般に８２
０３中には少なくども１１００ｐｐ以上のＩＩ、Ｏが含
まれており、Ｂ、０３中に取り込まれでいる３ｉの一部
もしくは全部がこのＮ２０にＪ、り酸化されてしまうの
で化合物原料の融解後に［３，０゜中から融液中に移動
するＳｌの吊は非常に少なくなり、融液中のｆｉｔ１度
は非常に低いものどなる。[Problems with the Background Art] In the above-mentioned method, the raw material compounds, impurities, and 8203 are heated and melted in a quartz crucible until the temperature reaches about 600°C! Then, first, 13 .O
, melts, B, 0. A liquid is formed, and the temperature further rises to U.
After 1200TE, a melt of the original fit compound occurs, but 3i has a small density (2.33g/cc
), when highly viscous [3,03 is produced, 3i is incorporated into B, O, and separated from the solid raw material compound.
Once the 3i is incorporated into the 13,03, even after the raw material compound has been melted and turned into a melt, the 3i is still 13,03.
, 03 particles moving into the melt is small, resulting in a situation where the 3i concentration in the melt becomes much lower than the initially set value. Also, generally 82
03 contains at least 1100 pp or more of II, O, and some or all of the 3i incorporated in B and 03 will be oxidized to this N20, so after melting the compound raw material. [The amount of Sl moving into the melt from 3.0° becomes very small, and the fit1 degree in the melt becomes very low.
このように、前記従来方法においＣは、化合物半導体中
の不純物量の制御が困難であり、しかも、Ｂ、０３中で
生じたＳｉ酸化物は融液とＢ、０３との境界近傍や＋３
．（’）３の液面に集り、該融液の引上げに伴って結晶
棒の中に入り込んで該化合物の結晶化を阻害りるため、
半導体製造の歩留りが非常に低かった。In this way, in the conventional method, it is difficult to control the amount of impurities in the compound semiconductor, and moreover, the Si oxide generated in B, 03 is present near the boundary between the melt and B, 03, or in the vicinity of the +3
．． (') It collects on the liquid surface of 3 and enters the crystal rod as the melt is pulled up, inhibiting the crystallization of the compound.
Yields in semiconductor manufacturing were extremely low.
［発明の目的１
この発明の目的は、前記従来方法の存する問題点を有し
ない、新規な化合物半導体製造方法を提供づることであ
る。 更り）１廁に（，１、この発明の目的は、添加づ
べき不純物をＢ、０．中に取り込まれることなく原ｒ１
融液中にのみ分ｔｆｋすることのできる新）！Ａな化合
物半導体製造方法を提供することである。[Objective of the Invention 1 An object of the present invention is to provide a novel compound semiconductor manufacturing method that does not have the problems of the conventional methods. Furthermore, the object of this invention is to add impurities that should be added to the raw material r1 without being incorporated into B,0.
New) that can be tfk only during melting! It is an object of the present invention to provide a method for manufacturing a compound semiconductor.
し発明の概要］
この発明による化合物半導体製造方法は、原料化合物の
融液中に添加゛づべき不純物を予め原料化合物の単結晶
体若しくは多結晶体中に押込み封止して６３ ＜ことに
より、該不純物を該融液中にのみ分散さヒることを特徴
とりる。[Summary of the Invention] The method for manufacturing a compound semiconductor according to the present invention includes the following steps: The method is characterized in that the impurities are dispersed only in the melt.
「発明の実施例」
以下に、本発明の方法をＧａＰ半導体の製造に適用した
実施例について説明覆る。 釣径５０１１１ｍ。"Embodiments of the Invention" Examples in which the method of the present invention is applied to the production of GaP semiconductors will be described below. Fishing diameter 50111m.
長さ１０−・２０ｍｍの円柱状のＧａＰの単結晶体の周
面に直径５ｍｍ 、深さ２５ｍｍの孔をあけ、この孔に
粒径３Ｉ以下の所定蟻の３ｉを充ｌ眞りるとと６に粒径
５００μｍ以下に粉砕したＧａｒ’多結晶の粉体で孔の
入り１］を封止し゛Ｃ該孔からＳｌが流出しないように
した。A hole with a diameter of 5 mm and a depth of 25 mm is made on the circumferential surface of a cylindrical GaP single crystal with a length of 10-20 mm, and the hole is filled with 3i of a specified ant particle size of 3I or less. In step 6, the holes 1] were sealed with Gar' polycrystalline powder crushed to a particle size of 500 μm or less to prevent Sl from flowing out from the holes.
このような構造の試料を多数製作し゛にれを本発明方法
に使用覆る原料化合物とし′ｔ”ｔ’ ！ａ”ｔ＋ す
る一方、前記のごとき孔を有していない同一＝Ｊ法（西
経５ｈ＋ｍ、長さ１０〜ｂ
来方法に使用する原料化合物とし−Ｃ準備し、引き上げ
速度を同一にするとともに以下のごときＢｉｌ −条件
下ｒＧａＰの単結晶棒を製造して、ぞの結果を比較した
。A large number of samples with such a structure were prepared, and each of them was used as a raw material compound for use in the method of the present invention. , length 10~b.C was prepared as a raw material compound to be used in the method, and a single crystal rod of rGaP was produced at the same pulling rate and under the following Bil-conditions, and the results were compared.
なお、条件は、融液となる原料のｉｎＧ（１０ｇ、融液
に添加づべきＳｌのｔＪ”＋９０ ｍ！Ｊ 、引き上げ
る単結晶棒の直径５０ｍｍ、弓卜しける単結晶棒の重昂
４５（１（１，Ｒ化防止用ガス（Ｎ２）の圧カフ０ｋｇ
／ ｃｍ’である。The conditions are: inG (10 g) of the raw material to become the melt, tJ"+90 m!J of Sl to be added to the melt, diameter 50 mm of the single crystal rod to be pulled up, weight of the single crystal rod to be bowed 45 (1 ( 1, Pressure cuff of gas (N2) for preventing R formation 0 kg
/cm'.
その結果、従来方法で製造されたＧａＰ単結晶棒（１０
Ｄｙｌ−）には、３ｉが５０〜１００１１１１１１１含
右しているものは１１」ツ１〜もなかったが、本発明ｌ
Ｊ法Ｃ製造されたＧａｌ〕単結晶棒（１０「」ツ１−）
には、８１が！ｉｏ 〜１ （ｒＯｐｌｏｎ ６イｊし
ているものは８０ｙ ｈ ｂあり、本発明方法によれば
再現性よく不純物を含有した化合物半導体が得られるこ
とがわかった。As a result, we found that GaP single crystal rods (10
Dyl-), there were no cases where 3i contained 50 to 1001111111, but the present invention
J method C manufactured Gal] single crystal rod (10" 1-)
There is 81! io ~ 1 (rOplon 6) There were 80yhb, and it was found that according to the method of the present invention, a compound semiconductor containing impurities could be obtained with good reproducibility.
な＋３．３ｉ無添加の場合、引上単結晶棒に １０ｐｐ
ｍ以下の８１を含有しているのに対して本発明方法によ
れば高濃度に不純物を添加づることが（”きることがわ
かった。 また、従来方法で製造されたＧａＰ単結晶棒
の単結晶化率は最大′ｃ３０％ｅあったのに対し本発明
方法で製造されたＧａＰ！ＩＩ結晶棒の単結晶化率は最
大で８０％にも３７した。If no +3.3i is added, 10pp is added to the pulled single crystal rod.
It was found that the method of the present invention makes it possible to add impurities at a high concentration. The crystallization rate was at most 30%e, whereas the single crystallization rate of the GaP!II crystal rod produced by the method of the present invention was up to 80%37.
因みに８１非添加の場合、前記と同−条イ′（で製造さ
れたＧａＰ単結晶棒の単結晶化率は１０〜９０％ｅある
。 従つ゛Ｃ１本発明方法によれば、従来方法よりも品
質及び歩留りが著しく向上することがわかる。Incidentally, in the case where 81 is not added, the single crystallization rate of the GaP single crystal rod manufactured with the same strip A' as above is 10 to 90%e. Therefore, according to the method of the present invention, C1 is higher than the conventional method. It can be seen that the quality and yield are significantly improved.
［発明の効果］
以上の実施例から明らかであるように、この発明の方法
によれば、添加リベき不純物を８２０３中で無駄に消費
させることなく原料融液中に全量を分散さけることがで
きるので、ＩＩＪ淵度に不純物を添加した化合物半導体
を高い歩留り１゛テ３１造覆ることができ、また、安定
した品質の化合物３１′導体を製造することができる。[Effects of the Invention] As is clear from the above examples, according to the method of the present invention, the entire amount of the added impurity can be avoided in the raw material melt without wasting it in 8203. Therefore, a compound semiconductor doped with impurities to a high degree of IIJ can be manufactured with a high yield, and a compound 31' conductor of stable quality can be manufactured.
なお、実施例では、ＧａＰ半導体のみに−〕い′（示し
たが、本発明方法はＧａＡｓなど他の化合物半導体の製
造に゛６適用できることは当然（゛ある。Although the embodiments have been shown to be limited to GaP semiconductors, the method of the present invention can of course be applied to the production of other compound semiconductors such as GaAs.
特ｉｆ出願人 東京芝浦電気株式会社Special if applicant: Tokyo Shibaura Electric Co., Ltd.
Claims (1)
料化合物を溶融した融液の表面を、該融液とは！′ｉ！
なる不活ｆ［液層で覆うとともに該化合物半導体の種結
晶体を該融液中への浸漬状態から該不活性液層の外側へ
所定速度で引きｍ１ことにより、該種結晶体と同一結晶
の化合物半導体製造方法において、 該化合物半導体に添加づべき不純物を該原料化合物中に
予め埋込み封止しでおくことを特徴とづる化合物半導体
製造方法。[Claims] 1 Equilibrium F/l! lf! [The surface of the melt obtained by melting the raw material compound of a compound semiconductor with a high LF is called the melt! 'i!
By covering the compound semiconductor with an inert liquid layer and pulling the seed crystal of the compound semiconductor from the immersed state in the melt to the outside of the inert liquid layer at a predetermined speed, a crystal identical to the seed crystal is formed. A compound semiconductor manufacturing method characterized in that an impurity to be added to the compound semiconductor is embedded and sealed in the raw material compound in advance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9235983A JPS59223295A (en) | 1983-05-27 | 1983-05-27 | Production of compound semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9235983A JPS59223295A (en) | 1983-05-27 | 1983-05-27 | Production of compound semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59223295A true JPS59223295A (en) | 1984-12-15 |
| JPH0479999B2 JPH0479999B2 (en) | 1992-12-17 |
Family
ID=14052207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9235983A Granted JPS59223295A (en) | 1983-05-27 | 1983-05-27 | Production of compound semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59223295A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02146164U (en) * | 1989-05-10 | 1990-12-12 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49103568A (en) * | 1973-02-03 | 1974-10-01 | ||
| JPS589797A (en) * | 1981-07-07 | 1983-01-20 | Fuji Sharyo Kk | Screw press |
-
1983
- 1983-05-27 JP JP9235983A patent/JPS59223295A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49103568A (en) * | 1973-02-03 | 1974-10-01 | ||
| JPS589797A (en) * | 1981-07-07 | 1983-01-20 | Fuji Sharyo Kk | Screw press |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02146164U (en) * | 1989-05-10 | 1990-12-12 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0479999B2 (en) | 1992-12-17 |
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