JPS5922320A - Vapor growth of high-purity 3-5 group semiconductor - Google Patents
Vapor growth of high-purity 3-5 group semiconductorInfo
- Publication number
- JPS5922320A JPS5922320A JP13261382A JP13261382A JPS5922320A JP S5922320 A JPS5922320 A JP S5922320A JP 13261382 A JP13261382 A JP 13261382A JP 13261382 A JP13261382 A JP 13261382A JP S5922320 A JPS5922320 A JP S5922320A
- Authority
- JP
- Japan
- Prior art keywords
- group
- gas
- purity
- triethylphosphine
- vapor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/301—AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02392—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02543—Phosphides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Abstract
Description
【発明の詳細な説明】
本発明は高純度I−v族半導体の気相成長技術に関する
ものであり、特にI族元素の有機化合物蒸気と■族元素
の三基化物蒸気を原料としてI−■族半導体を基板上に
堆積せしめる気相成長方法における高純度化技術に関す
るものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a vapor phase growth technology for high-purity group I-V semiconductors, and in particular, the present invention relates to vapor phase growth technology for high-purity group I-V semiconductors. The present invention relates to high purification technology in a vapor phase growth method for depositing group semiconductors on a substrate.
I−■族半導体はその混晶も含めて高速デバイス用ある
いは光デバイス用として次代のコンピー−タ技術と通信
技術を支える材料である。これら1−V族半導体のエピ
タキシャル層は大面積鏡面エビの点で優位にある気相成
長技術によってつくられているが、中でも有機I族金属
と■族元素三塩化物とを出発原料とする気相成長技術(
MO−Chlorid6法ン は混晶組成の制御性、エ
ピタキシャル層の均一性、成長用供給ガス組成の切り換
わりの速さなどの点でクロライド法、ハイドライド法、
有機金属法などの気相成長技術よりも優位にあり、組成
制御された混晶の純度という点でも他の気相成長法を圧
倒している。加えて、MOLChl。Group I-III semiconductors, including their mixed crystals, are materials that support next-generation computer technology and communication technology for high-speed devices and optical devices. The epitaxial layers of these 1-V group semiconductors are produced by vapor phase growth technology, which is advantageous in terms of large-area mirror-finishing. Phase growth technology (
The MO-Chlorid6 method is superior to the chloride method, hydride method, and
It has an advantage over other vapor phase growth techniques such as organometallic methods, and is also superior to other vapor phase growth methods in terms of the purity of mixed crystals with controlled composition. In addition, MOLChl.
ゴide法は■族元素の水素化物のような猛毒を用いな
い安全性の高い気相成長技術であるという認識も高まり
つつあり、将来的に重要な技術である。There is increasing awareness that the goide method is a highly safe vapor phase growth technique that does not use highly toxic substances such as hydrides of group III elements, and will be an important technology in the future.
しかしながら、MO−Chloride法は組成制御さ
れたI−V族混晶の純度では他の気相成長法を凌駕して
いるものの組成制御を必要としない二元I−V族結高結
晶度ではクロライド法が最も優れており、MO−Chl
oride法においてさらに純度を向上する技術が期待
されている。However, although the MO-Chloride method surpasses other vapor phase growth methods in terms of the purity of the composition-controlled IV group mixed crystal, the MO-Chloride method does not require composition control and has high crystallinity. method is the best, MO-Chl
A technology that further improves purity in the oride method is expected.
本発明はこの点に鑑みなされたもので、前記従来の欠点
を解決せしめた高純度i−V族半導体の気相成長方法を
提供することにある。The present invention has been made in view of this point, and it is an object of the present invention to provide a method for vapor phase growth of high-purity I-V group semiconductors, which solves the above-mentioned conventional drawbacks.
I族元素塩化物とV族元素蒸気の反応によって気相から
析出するI−V族半導体の純度が反応ガス中のV/I比
に依存することは周知であるが、大体においてV/I比
を約1にした場合純度が最も良くなる。ところがMO−
Chloride法の通常の成長条件ではV1M比は0
.34〜0.37程度であり、ざらにv/■比を大きく
しようとすると、■族元素蒸気はV族元素の三塩化物と
して供給されるため成長速度はしだいに低下しやがて基
板はエツチングされてしまう。本発明においては、V/
I比を高めるためのV高原はエツチング性がなくv族元
素水素化物のような猛毒性がないV族元素の有機化合物
を用いM(J−Chloride法の安全面での利点も
損うことのないようにした。V族元素の有機化合物蒸気
はV族元素の三基化物蒸気の2倍量加えるとV/I比を
約1にすることができるが、■族元素玉塩化物蒸気と等
量ないし3倍量まで加えることが高純度化に有効である
。V/II比を0.34〜0.37より大きくすると高
純度化する理由として定説はないが、■/I比を大きく
するとV族原子空孔が減少し、l族原子空孔が増加する
と考えられることと実験的にはV/I[比が大きくなる
とドナー不純物が減少して高純度化することからSiや
Geなどの両性不純物が関与しているのではない。本発
明者は、ドナーとして作用するV族原子空孔の減少ある
いはV族原子位置に置換したVl族原子の減少が高純度
化と関連していると考えるが、いずれ船こしても以下の
実施例から明らかなようにV/I比を通常のMO−Ch
loride法tcgける値(034〜037)上り大
きくし約1にするとI−V族半導体の純度は向上する。It is well known that the purity of a group IV semiconductor precipitated from the gas phase by the reaction between a group I element chloride and a group V element vapor depends on the V/I ratio in the reaction gas; The purity is the best when it is approximately 1. However, MO-
Under normal growth conditions for the Chloride method, the V1M ratio is 0.
.. 34 to 0.37, and if one tries to increase the v/■ ratio roughly, the growth rate gradually decreases and the substrate is etched because the group III element vapor is supplied as the trichloride of the V group element. I end up. In the present invention, V/
For the V plateau to increase the I ratio, an organic compound of group V elements that has no etching property and is not highly toxic like group V element hydrides is used. By adding twice the amount of organic compound vapor of group V elements as the tertiary compound vapor of group V elements, the V/I ratio can be made approximately 1, but It is effective to increase the purity by adding the same amount or up to 3 times the amount.There is no established theory as to why increasing the V/II ratio from 0.34 to 0.37 increases the purity, but ■If the /I ratio is increased It is thought that V group atomic vacancies decrease and I group atomic vacancies increase, and experimentally it has been shown that as the V/I [ratio increases, donor impurities decrease and purity increases, so Si, Ge, etc. Amphoteric impurities are not involved.The present inventor believes that a decrease in group V atom vacancies that act as donors or a decrease in Vl group atoms substituted at the V group atom position is associated with higher purification. However, as is clear from the examples below, even if the ship is shipped, the V/I ratio will not be the same as the normal MO-Ch.
When the loride method tcg value (034 to 037) is increased to about 1, the purity of the IV group semiconductor is improved.
即ち、前記効果はI族元素の有機化合物蒸気とV族元素
の三基化物蒸気を原料としてI−V族半導体を基板上に
堆積せしめる気相成長方法において、V族元素の有機化
合物蒸気をV族元素の三基化物蒸気と等量ないし3倍量
まで加えることを特徴とするI−v族半導体の気相成長
方法によって実現される。That is, the above-mentioned effect can be obtained by depositing a group I-V semiconductor on a substrate using a vapor of an organic compound of a group I element and a ternary compound vapor of a group V element as raw materials. This is achieved by a method for vapor phase growth of group I-v semiconductors, which is characterized in that the vapor is added in an amount equal to or up to three times the amount of the ternary compound vapor of group elements.
以下に一実施例により本発明の効果をさらに詳細に説明
する。The effects of the present invention will be explained in more detail below using one example.
実施例
第1図はMO−Chloride法気相成長装置全気相
成長装置る。Embodiment FIG. 1 shows an MO-Chloride vapor phase growth apparatus (all vapor phase growth apparatus).
本発明の実施手順を順を追って述べる。The implementation procedure of the present invention will be described step by step.
(1)高抵抗1nP基板1を石英製基板ホルダ2の上に
設置した。(1) A high resistance 1nP substrate 1 was placed on a quartz substrate holder 2.
(2)石英反応管3内を水素ガスで置換したのち、基板
を670℃、ソース反応領域4を800℃とした。(2) After replacing the inside of the quartz reaction tube 3 with hydrogen gas, the substrate was heated to 670°C and the source reaction region 4 was heated to 800°C.
(3)ガス導入口5からトリエチルインジウムを0.5
%含むへガスを500 cm” 7m in 1 ガ
ス導入口6から三塩化リンを0.18%、トリエチルフ
ォスフインを0.36%含むH,ガスを500 cm”
7m in 同時に導入した。(3) 0.5% triethyl indium from gas inlet 5
500 cm of H gas containing 0.18% phosphorus trichloride and 0.36% triethylphosphine from the gas inlet 6.
7 minutes were introduced at the same time.
(4)ガス導入口5,6からの導入ガスをArに換えて
反応管内の温度を室温まで冷却した。(4) The gases introduced from the gas inlets 5 and 6 were replaced with Ar, and the temperature inside the reaction tube was cooled to room temperature.
このようにして得られたInPの77°Kにおけるホー
ル測定からキャリア濃度と移動度を求めた。The carrier concentration and mobility of the thus obtained InP were determined from hole measurements at 77°K.
実施手順(3)におけるトリエチルフォスフイン導入量
を変化しそれぞれホール測定をおこなってキャリア濃度
と移動度を測った。第2図は三塩化リン導入量に対する
トリエチルフォスフイン導入量の比とInPの776に
キャリア濃度、77 ’に移動度の関係を示すものであ
る。トリエチルフォスフインを導入しない場合(導入量
比O)と比べて本発明によるInk)の移動度は約2倍
であり、トリエチルフォスフイン導入量をPCl3導入
量の等量ないし3倍量まで加えると移動度上昇に効果が
あり、高純度化していることがわかる。The amount of triethylphosphine introduced in step (3) was varied and Hall measurements were performed to measure the carrier concentration and mobility. FIG. 2 shows the relationship between the ratio of the amount of triethylphosphine introduced to the amount of phosphorus trichloride introduced and the carrier concentration at 776 and the mobility at 77' of InP. The mobility of the Ink according to the present invention is about twice that of the case where triethylphosphine is not introduced (introduction amount ratio O), and when the amount of triethylphosphine introduced is equal to or three times the amount of PCl3 introduced, It can be seen that it is effective in increasing mobility and achieves high purity.
【図面の簡単な説明】
第1図はMO−Chloride法気相成長装置全気相
成長装置ある。
1・・・基板、2・・・基板ホルダ、3・・・石英反応
管、4・・・ソース反応管領域、5.6・・・ガス導入
口。
第2図は三塩化リン導入量に対するトリエチルフォスフ
イン導入量の比(P(C2)(,1)s)/〔Pczs
)に対する77°に電子移動度とキャリア濃度の関係を
示すものである。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 shows an MO-Chloride vapor phase growth apparatus. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Substrate holder, 3...Quartz reaction tube, 4...Source reaction tube area, 5.6...Gas inlet. Figure 2 shows the ratio of the amount of triethylphosphine introduced to the amount of phosphorus trichloride introduced (P(C2)(,1)s)/[Pczs
) shows the relationship between electron mobility and carrier concentration at 77°.
Claims (1)
原料としてI−■族半導体を基板上に堆積せしめる気相
成長方法において、■族元素の有機化合物蒸気を■族元
素の三基化物蒸気と等量あるいはそれ以上加えることを
特徴とするI−V族半導体の気相成長方法。In a vapor phase growth method in which a group I-■ semiconductor is deposited on a substrate using an organic compound vapor of a group ■ element and a ternary compound vapor of a group A method for vapor phase growth of a group IV semiconductor, characterized in that the same amount or more of a compound vapor is added.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13261382A JPS5922320A (en) | 1982-07-29 | 1982-07-29 | Vapor growth of high-purity 3-5 group semiconductor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13261382A JPS5922320A (en) | 1982-07-29 | 1982-07-29 | Vapor growth of high-purity 3-5 group semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5922320A true JPS5922320A (en) | 1984-02-04 |
Family
ID=15085418
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13261382A Pending JPS5922320A (en) | 1982-07-29 | 1982-07-29 | Vapor growth of high-purity 3-5 group semiconductor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5922320A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4707216A (en) * | 1986-01-24 | 1987-11-17 | University Of Illinois | Semiconductor deposition method and device |
US4872046A (en) * | 1986-01-24 | 1989-10-03 | University Of Illinois | Heterojunction semiconductor device with <001> tilt |
-
1982
- 1982-07-29 JP JP13261382A patent/JPS5922320A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4707216A (en) * | 1986-01-24 | 1987-11-17 | University Of Illinois | Semiconductor deposition method and device |
US4872046A (en) * | 1986-01-24 | 1989-10-03 | University Of Illinois | Heterojunction semiconductor device with <001> tilt |
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