JPS59207713A - Electronic circuit - Google Patents

Abstract

PURPOSE:To obtain a receiver that can reduce external connectors when implementing IC by providing a balancing circuit and converting two output signals obtained from an IF amplifier circuit into a feedback signal. CONSTITUTION:When receiving FM broadcast, an IF signal fH is amplified by an IF amplifier circuit 5 and supplied to an amplifier circuit 21. The circuit 21 is used in common when receiving AM. Output signals V01, V02 are supplied to a detecting circuit 22a and a balancing circuit 23. The circuit 22a consists of a phase shifter, a multiplier and an LFP (all of these are not shown in the figure). Above-mentioned output signals V01, V02 are supplied to the multiplier as they are, and at the same time, supplied to the phase shifter. A signal phase of which is delayed by the phase shifter is supplied to another input terminal of the multiplier. The multiplier multiplies output signals V01, V02 and delayed signals, and converts a signal of vertically symmetric compression wave to a signal of waveform having condensation and rarefaction in one direction. This signal is supplied to the LPF, and original audio signal f0 is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a receiver for receiving IFM broadcasts and AM broadcast tubes.

[Background technology] Current radio broadcasting includes F'M broadcasting and A
FM/AN receivers that can receive both types of broadcasts are known.

Prior to the present invention, the inventor studied the above AM/FM reception system and found that it had the following problems when integrated into a semiconductor integrated circuit. are connected in cascade, and the final stage output signal iIFM
Supplies to the detector. In this case, if the IFM detector is, for example, a quadrature detector, the output signal must be made into two outputs (double output). In this case, it is necessary to maintain DC balance between the two output signals. Therefore, the two output signals can be individually fed back to each input terminal of the first-stage differential amplifier to achieve DC balance.

However, it is necessary to provide a capacitor to match the impedance in each feedback circuit, and for this reason, the external connection terminal is 2
Turns out you'll also need a pin. Moreover, it has been found that although the above-described method can achieve DC balance between the two output signals, the DC limit does not match the reference voltage used in other circuits.

Furthermore, if the AM detection circuit is configured with an emitter follower detector, for example, the two output signals must be converted into one output signal. However, studies conducted by Nagisa of the present invention have revealed that the circuit configuration described above has the various deficiencies described above and is also incapable of converting two output signals into one output signal.

[Object of the Invention] An object of the present invention is to provide a receiver that can reduce the number of external connection terminals when integrated into a semiconductor circuit. An object of the present invention is to completely eliminate the direct current balance between two output signals obtained from an intermediate frequency amplification circuit, and to match the DC balance of the two output signals with the level of the reference voltage, thereby creating a stable circuit. The object of the present invention is to provide a receiver that performs operations. 1L Another object of the present invention is to provide a detection circuit that operates with two input signals, a detection circuit that operates with one input signal, and a receiver that can be selectively driven from the above two output signals. There is a particular thing.

[Summary of the Invention] A brief outline of the invention disclosed in this application is as follows.

That is, for example, two output signals obtained from an intermediate frequency direct-coupled amplifier circuit are supplied to a balance circuit, converted into one output signal, and converted into *one output signal? , and is supplied as a feedback signal to the input of the intermediate frequency direct-coupled amplifier circuit to balance the DC balance of the two output signals.

[Embodiment] An embodiment of a receiver to which the present invention is applied will be described below with reference to FIGS. 1 and 2.

Note that FIG. 1 is a block diagram showing an example of an FM/AM receiver. It is assumed that the 7M front end, the AM front end, the audio circuit including the intermediate frequency amplification circuit, etc. are each implemented as a semiconductor integrated circuit (hereinafter referred to as an IC).

The 7M front end 1 will be described.

2 is an IFM receiving antenna, and the received FM signal f
, are supplied to the high frequency amplification circuit 3 via the No. 1 terminal. The high frequency amplification circuit 3 has a tuning circuit (not shown) and outputs a desired received signal f! After all stations are selected, the next stage mixing circuit 4
supply to

On the other hand, in conjunction with the frequency tuning operation of the high-frequency amplifier circuit 3, the local oscillator circuit 5 selects a higher frequency signal than the received signal f, for example, IQ.
, oscillates a frequency signal f3 lower by 7 MHz. The frequency signal f3 is supplied to the mixing circuit 4. Saifai Mei 4
2 and the frequency signal f3 in the received signal,
Look at the intermediate frequency signal fFik with a frequency of 10.7MH2. The intermediate frequency signal fH is supplied to the intermediate frequency amplification circuit 5 via the second and third terminals.

Next, the AM front end IIK will be described.

A 12-piece AM receiving antenna is used, and the receiving groove 7' (the AM signal fll is supplied to the high frequency amplifier circuit 13 via the 11th terminal.The high frequency amplifier circuit 13, the mixing circuit 14, and the local oscillation circuit 15 are Basically, the circuit operation is the same as each circuit of the 7M front end 1 described above. However, the frequency signal f13 oscillated from the local oscillation circuit 15 has a frequency lower than that of the received signal f12 by, for example, 455 KH2. Then, from the mixing circuit 14, the frequency is 455KH.
An intermediate frequency signal fH' of z is obtained and supplied to the intermediate frequency circuit 15 via the 12th and 13th terminals.

By the way, Qui 1. SW, FM70 end 1,
7 for AM front end 11, power +vo.

This is for selectively supplying. That is, if the switch SW is switched to the F'M side as shown in the figure,
7M front end 1 becomes operational.

Then, FM reception operation is performed:1. AM reception is not performed.

1fr, switch SW is switched to AM side,
AM front end 11 becomes operational.

Then, AM reception operation is performed, but FM reception is not performed. Therefore, during FM reception, the intermediate frequency signal fH is supplied to the intermediate frequency amplification circuit 5. Further, during AM reception, the intermediate frequency signal f■' is supplied to the intermediate frequency amplification circuit 15.

Note that the switch SW is switched in conjunction with a switch 8Wt shown in FIGS. 1 and 2 and described later.

Next, the circuit operations of the intermediate frequency amplification circuit 5.15, audio circuit, etc. will be described.

The intermediate frequency amplification circuit 5 is constituted by a plurality of differential amplifiers AH-Al, as shown in FIG.

The intermediate frequency signal fH is supplied to the positive phase input terminal 10 of the first stage differential amplifier A, and the base voltage vR is supplied to the negative phase input terminal 10.
E month is supplied. In addition, it is assumed that there are five intermediate frequency amplification circuits, a limit circuit, and two output circuits (not shown).

When receiving an FM broadcast, the intermediate frequency signal fTl is amplified by the intermediate frequency circuit 5 and supplied to the final stage amplifier circuit 21. The amplifier circuit 21 is also used during AM reception. Output signals VOI and VO2 obtained from the amplifier circuit 21 are supplied to a detection circuit 22 and a balance circuit 23.

By the way, the detection circuit 22 shown in FIG. 1 is shown in 1/2 for convenience between stations.

Actually, as shown in FIG. 2, the FM detection circuit 22a, AM
It is constituted by a detection circuit 22b.

Note that a quadrature detection circuit is used as the FM detection circuit 22, and an emitter follower detection circuit is used as the AM detection circuit.

The quadrature detector circuit 22a is comprised of a phase shifter, a multiplier, and a low-pass filter (not shown). Although the circuit configuration and circuit operation are already known to those skilled in the art, the circuit configuration will be briefly described in order to understand the present invention.

The FM signal to be detected, ie, the output signal V shown in FIG.

At the same time, when VO2 is supplied to the multiplier,
Also supplied to the phase shifter. Then, L7, the large signal whose phase is delayed by the phase shifter is supplied to the second input terminal of the multiplier. In the multiplier, the output signal v01 % VO
2 and the delayed signal by 17'l to obtain a vertically symmetrical compression wave signal'! i-Convert into a signal with a waveform that has a combination of sparse and dense in one direction.

This converted large signal is supplied to a low-pass filter,
Original audio signal f. You can get it.

While the PM detection operation is being performed as described above, the balance circuit 23 operates as described below.

Transistor Q I % Q * is the output signal V. 1,
A voltage-current conversion operation is performed for Vat. Diode D
,,) Is transistor Q3 a current mirror circuit? Configure 1
, W performs current-voltage conversion operation.

For now, the output signal is V. Output signal V for I. .

Suppose that the voltage level of is a low level. Transistor Q! operates in the on state, and 2, from the +v00 power supply, the constant current circuit O83, the transistor Q! , diode D3, 1i flow to the ground line, or flow. However, transistor 0
．． 1, it is not possible to supply the same amount of current to transistor Q3 through transistors Q and t. Therefore, the collector of the transistor Q3 has a capacitor O,
The prodigy! The stagnation is supplied via the No. 4 terminal, resistor MR+. Then, the same amount of N yodo 2 as the above W yodo 2 flows through the transistor Q2.

On the other hand, the output signal V. If the voltage level of the output signal vo is high with respect to iK, the transistor Ql operates in an on state. In this case, the transistor is in the off state and the current is off! does not flow. Therefore, transistor Q3 is also turned off.

However, since the transistor QI is in the on state, the output tl current of the constant current circuit O8K is applied to the capacitor C1 via the transistor Q1, the resistor R1, and the No. 4 terminal. That is, corresponding to the difference in the voltage levels of the output signals v01 and VO2, the direction of the current flowing in the resistor R+' (I-) is different. - The difference in the measured angle feedback, in other words, the change in the amount of negative feedback is transmitted to the first stage amplifier circuit Al via the resistor R2'?

Therefore, the intermediate frequency circuit 5, the amplifier circuit 21, the balance circuit 23, and the resistor constitute a closed loop circuit. Then, the DC voltages of the output signals v01% v112 are balanced by the circuit operation of the closed loop circuit.

The quadrature detection circuit 22a receives a DC balanced output signal V. 1. Vow is supplied, and the detected output fo is supplied to the amplifier circuit 24 via the switches sw and '1. Output signal V of the amplifier circuit 24. ut is supplied to the speaker Sp via the No. 5 terminal, and audio output is obtained.

Next, the circuit operation when receiving AM broadcasting will be described.

In this case, switch day Wl, 8W! , and switch to the AM side in conjunction. The intermediate frequency signal fH' is the output signal of the intermediate frequency amplification circuit 15, and the intermediate frequency signal fH' is the output signal of the intermediate frequency amplifier circuit 15,
The signal is then supplied to the amplifier circuit 21.

Note that the intermediate frequency amplification circuit 15 may have the same circuit configuration as the FM intermediate frequency circuit 5, so detailed illustration thereof will be omitted. In addition, VRWF2 corresponds to the standard pressure VRFi month.
is set up ≠ the reference voltage VFIEFIk
May be shared.

Then, the output signal ■ from the amplifier circuit 21. 1. VOZ is obtained, but the balance circuit 23 performs the same circuit operation as described above. Therefore, the current 2o flows through the resistor R1 in the same manner as described above.

What should be noted here is that the current amount is 0 and the two output signals V
This is the point where OI and VOW are combined and the next output signal, and the amount of current. The difference in flow direction corresponds to the polarity of the AM component. Therefore, the current ■.

AM detection output can be obtained from.

Next, I will explain the AM detection operation.

The pace voltage of transistor Q is the reference voltage vRmF+
is defined at a predetermined voltage level by Therefore,
Transistor 0.3 is turned off and the amount of current. When current is flowing in the direction to charge the capacitor C+, the base current is also supplied to the transistor Q1□.
The output current of 2 is the transistor Q,! 2. Resistance Rtr
The current flows to the ground line through k.

On the other hand, the transistor Q3 operates in the on state, and the amount of current increases due to the discharge of the capacitor C1. When flows, the current I.

is supplied to the transistor Q1□(7)-"-.

Then, the transistor Ql11 is turned on, and current flows through the resistor R21 in the same manner as described above.

As a result of the circuit operation such as a sub-connection, an amount of current x always flows through the resistor MR11. Moreover, the amount of current x is
The amount of current when the amount of current is 0, in other words, the output signal vol, V
It changes in response to the O2 voltage difference.

Therefore, the voltage drop Vo across the resistor R2I has a unidirectional polarity, and its voltage level changes in accordance with the voltage difference between the output signals VOI and VOW.

Voltage ■. This is the output voltage of the detection circuit 22'b, and is smoothed by the h-sized smoothing capacitor c2 connected via the No. 6 terminal. Therefore, the voltage v0 becomes an audio component and is supplied to the audio amplifier 24 via switches SW and '6. The output signal Vout of the audio amplifier 24 is supplied to the speaker sp via the No. 5 terminal, and audio output is produced.

Even during AM reception, the intermediate frequency amplification circuit 15
, an amplifier circuit 21, a balance circuit 23, a resistor SR, and an R-th closed loop circuit. Therefore, the output signal V as in the case of F'M low signal. I%VO4! DC balance is achieved.

Note that during AM reception, the output voltage V of the detection circuit 22b. By A()CIWEF? Obtainable.

That is, the output voltage V. Is the resistor R22? Through engineering F-
It is supplied to an AGO circuit (not shown) for performing AGO or RF-AGO. Therefore, the AGO lightning pressure obtained from the resistor vIFtt2 is the output signal ■. 1. It changes in response to the voltage level difference of vo2. In addition, in response to the change, output signals vo1, vo! each voltage level will be controlled.

Furthermore, according to the above circuit configuration, the voltage level at point A during FM reception is approximately the same voltage level as the reference voltage VRBF+. Also, during AM reception, the reference voltage vyt
The voltage level is almost the same as KF2.

[Effect] (1) In the balance circuit in general, the two output signals obtained from the intermediate frequency amplification circuit are changed to one feedback signal, so only one external connection terminal for the feedback signal is required. .

(2), From (1) K above, when making semiconductor integrated circuits,
The degree of integration is improved.

(3) According to (1) above, the number of externally connected parts can be reduced.

(4) Due to the above (1) and (2), production costs can be reduced.

(5) From (1) K above, balance the DC balance of the two output signals that cannot be obtained from the intermediate frequency amplifier circuit.
can be done.

(6) According to (5) above, the detection characteristics of the quadrature detection circuit using two input signals as the core wall become good.

(7) According to (1) and (5) above, a detection circuit that requires two input signals and a detection circuit that operates with one input signal can be used together.

(8) From the above (7)K, a receiver capable of receiving FM/AM can be configured in an additional semiconductor integrated circuit.

(9) Since the output signal of the 7277 circuit becomes the feedback signal, the feedback impedance (resistance MRI) can be used as a load of the balance circuit, and the circuit configuration is simplified.

Since the feedback operation is performed based on the reference voltage, the reference voltage and the voltage level of the feedback signal can be matched.

An invention made by Nagisa on this invention? Although the present invention has been specifically explained based on the embodiments, it goes without saying that the present invention is not limited to the above-mentioned embodiments, and can be modified in various ways without departing from the gist thereof.

For example, FM/AM reception switching is performed by +vo, supplying and cutting off power, but instead of kneading, supplying and cutting off an intermediate frequency signal may be used. Furthermore, resistance
In place of ifRt, an impedance circuit including a coil, a capacitor, etc. may be provided outside the circuit.

[Field of Application] In the above explanation, the field of application which is the background of the invention made by Nagisa, FM/
Although the IJI combination has been described as applied to an AM radio receiver, the present invention is not limited to this, and can also be applied to, for example, a television receiver.

Furthermore, it can be applied to various types of radio equipment.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an FM/AM receiver showing one embodiment of the present invention, and FIG. 2 is a circuit diagram showing the circuit configuration of the main parts of the same. 1.11...Front end, 2.12...Receiving antenna, 5.15...Intermediate frequency amplification circuit, 21...
Amplification circuit, 22a, 221)...Detection circuit, 23
...Balance circuit, SWI, 8 Vlz...
・Switch, VFtlllFI-vRIllF2...
Reference voltage, fH, fH'... intermediate frequency signal, flll
, ■0 ”'detection output, v n ut ”'output signal, ■o! ,■o2...Two output signals, King! , Engineering 2,
Equation 0, Equation
, R21"'Resistance, cl % cl"'Capacitor, I
C...Semiconductor integrated circuit.

Claims (1)

[Claims] 1. Detecting the voltage level difference between two output signals obtained from the amplifier circuit and converting it into a single output signal, and using the converted six signals as a feedback signal to the input of the amplifier circuit, Above 2
An electronic circuit characterized by completely correcting the voltage difference between two output signals. 2. Detecting the voltage level difference between the two output signals obtained from the intermediate frequency amplification circuit and converting it into a single output signal, correcting the voltage difference between the two output signals using this converted fC signal as a feedback signal, An electronic circuit characterized in that a first detection output is obtained using the two output signals, and a second detection output is obtained using the converted signal.