JPS59204201A - Thick film resistor array and method of producing same - Google Patents

Thick film resistor array and method of producing same

Info

Publication number
JPS59204201A
JPS59204201A JP58079329A JP7932983A JPS59204201A JP S59204201 A JPS59204201 A JP S59204201A JP 58079329 A JP58079329 A JP 58079329A JP 7932983 A JP7932983 A JP 7932983A JP S59204201 A JPS59204201 A JP S59204201A
Authority
JP
Japan
Prior art keywords
thick film
layer
film resistor
substrate
layer conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58079329A
Other languages
Japanese (ja)
Other versions
JPH0430161B2 (en
Inventor
泰男 井口
柴田 勲夫
高橋 良郎
勝 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP58079329A priority Critical patent/JPS59204201A/en
Publication of JPS59204201A publication Critical patent/JPS59204201A/en
Publication of JPH0430161B2 publication Critical patent/JPH0430161B2/ja
Granted legal-status Critical Current

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  • Non-Adjustable Resistors (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (技術分野) 本発明は厚膜抵抗体プレイならびにその製造方法に関す
るものであシ、特に抵抗体を高密度に配列することので
きる厚膜抵抗体プレイならびにその製造方法に関するも
のである。
Detailed Description of the Invention (Technical Field) The present invention relates to a thick film resistor play and a method for manufacturing the same, and more particularly, a thick film resistor play that allows resistors to be arranged in high density and a method for manufacturing the same. It is related to.

(従来技術) 第1図は従来の厚膜抵抗体アレイの構成を説明する平面
図であるが、lはセラミック基板、2は電極、3は厚膜
抵抗体である。図示するようにセラミック基板l上に厚
膜印刷法によシ、厚膜抵抗体3の両端2′、2′で電極
2,2が接続されるよう、セラミ、り基板1上に一重構
造で被着されて横方向に複数配列される構成であった。
(Prior Art) FIG. 1 is a plan view illustrating the configuration of a conventional thick film resistor array, in which 1 is a ceramic substrate, 2 is an electrode, and 3 is a thick film resistor. As shown in the figure, a single layer structure is formed on the ceramic substrate 1 using the thick film printing method so that the electrodes 2, 2 are connected at both ends 2', 2' of the thick film resistor 3. It had a structure in which a plurality of them were adhered and arranged in a horizontal direction.

しかるに厚膜印刷法によるこのような構成では、隣接の
導体間のピッチは、図上4に示さるものであるが、実現
できるのは0.2 Inm程度であって電子機器の小型
化等に伴ない厚膜、抵抗体アレイを更に高密度化するこ
とが困難であるという欠点があった。
However, in such a configuration using the thick film printing method, the pitch between adjacent conductors, as shown in 4 in the figure, can only be achieved at around 0.2 Inm, which is difficult to achieve in order to miniaturize electronic devices. The drawback is that it is difficult to further increase the density of the resistor array due to the thick film.

(発明の目的) 本発明の目的はこの前記欠点を解決したものであって、
厚膜抵抗体の両電極を二層構造と々るように構成し各層
の電極よシ引出しするとともに配列を高密度化したこと
を特徴とする厚膜抵抗体ア゛レイならびにその製造方法
を得るようにしたものであシ、以下図面によシ詳細説明
する。
(Object of the invention) The object of the present invention is to solve the above-mentioned drawbacks,
To obtain a thick film resistor array and a method for manufacturing the same, characterized in that both electrodes of the thick film resistor are constructed so as to have a two-layer structure, the electrodes of each layer are drawn out, and the arrangement is made denser. This will be explained in detail below with reference to the drawings.

(発明の構成) JY膜抵抗体とその電極を厚膜印刷法により基板上に形
成するようにして、基板上に設けた第1層導体と該第1
層導体のたて方向延長線上で基板上に設け/ζ絶縁層上
の第2層導体とを連結してなる第[厚膜抵抗体と、基板
上に設けた絶縁層上の第2層導体と該第2層導体のたて
方向延長線上で基板上に設けた第1層導体とを連結して
なる第2厚膜抵抗体とを、互に隣接して横方向に複数個
配列するように構成した厚膜抵抗体アレイおよび、第一
二[程から第五工程により製造されるその製造方法から
構成される。
(Structure of the Invention) A JY film resistor and its electrodes are formed on a substrate by a thick film printing method, and a first layer conductor provided on the substrate and the first layer conductor are formed on the substrate by a thick film printing method.
A thick film resistor formed by connecting a second layer conductor provided on the substrate/ζ insulating layer on the vertical extension line of the layer conductor and a second layer conductor provided on the insulating layer provided on the substrate and a first layer conductor provided on the substrate on the vertical extension line of the second layer conductor, and a plurality of second thick film resistors are arranged adjacent to each other in the horizontal direction. The present invention is composed of a thick film resistor array constructed as shown in FIG.

(実施例) 第2図は本発明の1実施例の構成を説明する平面図であ
る。第3図は第2図のA −A’の切断図である。第4
図は本発明の1実施例の製造方法の説明図である。
(Embodiment) FIG. 2 is a plan view illustrating the configuration of an embodiment of the present invention. FIG. 3 is a cutaway view taken along line A-A' in FIG. Fourth
The figure is an explanatory diagram of a manufacturing method according to an embodiment of the present invention.

図において11はセラミック基板、12は第1層導体、
13は絶縁層、14は第2層導体、15は厚膜抵抗体、
16は第1厚膜抵抗体、ノアは第2厚膜抵抗体である。
In the figure, 11 is a ceramic substrate, 12 is a first layer conductor,
13 is an insulating layer, 14 is a second layer conductor, 15 is a thick film resistor,
16 is a first thick film resistor, and Noah is a second thick film resistor.

セラミ、り基板lノ」二に厚膜抵抗体15の片側の電極
として第1層導体12を、第4図の第一工程に示すよう
に、厚膜印刷法で千鳥状に形成した後、結晶化ガラスの
絶縁層13を第二工程に示すように、厚膜印刷法により
、第1層導体J2上に一体的に形成する。この時第1層
導体12の電極部分12′は露出するようにする。つぎ
に、厚膜印刷法により、厚膜抵抗体15の他の側の電極
として第1層導体12のたて方向延長線上で第三工程に
示す如く、第1層導体12に対応するように第2層導体
14を絶縁層13上に形成する。
After forming a first layer conductor 12 as an electrode on one side of a thick film resistor 15 on a ceramic substrate 12 in a staggered manner by a thick film printing method, as shown in the first step of FIG. As shown in the second step, an insulating layer 13 of crystallized glass is integrally formed on the first layer conductor J2 by a thick film printing method. At this time, the electrode portion 12' of the first layer conductor 12 is exposed. Next, by using a thick film printing method, as an electrode on the other side of the thick film resistor 15, an electrode is formed on the vertical extension line of the first layer conductor 12 so as to correspond to the first layer conductor 12, as shown in the third step. A second layer conductor 14 is formed on the insulating layer 13.

つぎに、第四工程に示す如く、厚膜抵抗体15を、厚膜
印刷法によシ、第1層導体12の電極部分と第2層導体
14の電極部分に接続するように一体的に全面に被着さ
せる。
Next, as shown in the fourth step, the thick film resistor 15 is integrally connected to the electrode portion of the first layer conductor 12 and the electrode portion of the second layer conductor 14 by a thick film printing method. Cover the entire surface.

つぎに、第五工程に示す如く、レーザー光もしくはグイ
シングツ−の切断方法によシ、一体的に全面に被着した
部分の厚膜抵抗体15を個別の抵抗体に分離して、基板
上に設けた第1層導体12、と該第1層導体12のたて
方向延長線上で基板上に設けた絶縁層13上の第2層導
体13とを連結してなる第1厚膜抵抗体16と、基板」
二に設けた絶縁層上の第2層導体と該へ)2層導体のた
て方向延長線上で基板上に設けた第1層導体とを連結し
てなる第2厚膜抵抗体17とを、互に隣接して俵数個配
列しだ厚膜抵抗体アレイを製造することができた。
Next, as shown in the fifth step, the thick film resistor 15 that has been integrally adhered to the entire surface is separated into individual resistors using a laser beam or cutting tool cutting method, and then the thick film resistor 15 is separated into individual resistors and placed on the substrate. A first thick film resistor 16 formed by connecting the provided first layer conductor 12 and the second layer conductor 13 on the insulating layer 13 provided on the substrate on the vertical extension line of the first layer conductor 12. And the board.”
A second thick film resistor 17 is formed by connecting a second layer conductor on the insulating layer provided on the second layer and a first layer conductor provided on the substrate on the vertical extension line of the second layer conductor. By arranging several bales adjacent to each other, a thick film resistor array could be manufactured.

なお上記の切断方法での各個別抵抗間の中心部16での
切断幅はレーザー光、グイシングンー共に約20μ?n
程度であった。又抵抗値の調整を必要とする場合にはレ
ーザートリミング装置によりトリミングが可能である。
In addition, in the above cutting method, the cutting width at the center 16 between each individual resistor is approximately 20μ for both laser beam and Guisingon. n
It was about. Further, if the resistance value needs to be adjusted, trimming can be performed using a laser trimming device.

かくして、本実施例においては以上の構成をとったので
第1図に示した従来の厚膜抵抗体アレイにおいては隣接
の導体間のピッチ4が02%程度であったものが、本実
施例ではピッチ2oが02%程度であるのでピッチ21
は01%程度の半分となり厚膜抵抗体アレイの高密度化
を達成することが可能となった。
Thus, since this embodiment has the above configuration, the pitch 4 between adjacent conductors was approximately 0.2% in the conventional thick film resistor array shown in FIG. Since pitch 2o is about 0.2%, pitch 21
is about half of 0.01%, making it possible to achieve high density thick film resistor arrays.

(発明の効果) 以上詳細に説明したように厚膜抵抗体アレイの電極を2
層構造とすることにより、厚膜抵抗体のピッチを従来の
ものの半分程度に形成できるので、高密度の厚膜抵抗体
アレイが形成できるという効果がある。
(Effect of the invention) As explained in detail above, the electrodes of the thick film resistor array are
By forming a layered structure, the pitch of the thick film resistors can be reduced to about half that of a conventional one, so that a high-density thick film resistor array can be formed.

壕だ電極の取り出し方も第1層導体を千鳥状配置に、第
2層導体を絶縁層上としたためどの厚膜抵抗体の電極も
片側は第1層導体、他の側は第2層導体となるので抵抗
値のバラツキを小さくできるという効果がある。
The way the trench electrodes are taken out is that the first layer conductor is arranged in a staggered manner and the second layer conductor is placed on the insulating layer, so the electrode of any thick film resistor has the first layer conductor on one side and the second layer conductor on the other side. Therefore, there is an effect that the variation in resistance value can be reduced.

また本発明は、厚膜抵抗体アレイの電極を2層構造とし
第1層導体を千鳥状配置に第2層導体を絶縁層上とした
ため高密度で抵抗値バラツキの小さい厚膜抵抗体アレイ
が形成できるので、チップ抵抗および厚膜ハイブリッド
IC等に利用することができるという効果がある。
In addition, the present invention has a two-layer structure for the electrodes of the thick film resistor array, with the first layer conductors arranged in a staggered manner and the second layer conductors placed on the insulating layer. Since it can be formed, it has the advantage that it can be used for chip resistors, thick film hybrid ICs, and the like.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の厚膜抵抗体アレイの平面図、第2図は本
発明の1実施例の平面図、第3図は第2図のA −A’
の切断図、第4図は本発明の1実施例の製造方法の説明
図である。 1、セラミ、り基板、2:電極、3:厚膜抵抗体、11
:セラミ、り基板、12.第1層導体、13:絶縁層、
14:第2層導体、l 5: I!j膜抵抗体、16:
第1厚膜抵抗体、17:第2厚膜抵抗体。 第1図 第2図 11 第3図
FIG. 1 is a plan view of a conventional thick film resistor array, FIG. 2 is a plan view of an embodiment of the present invention, and FIG. 3 is A-A' in FIG.
FIG. 4 is an explanatory diagram of a manufacturing method according to an embodiment of the present invention. 1. Ceramic substrate, 2: Electrode, 3: Thick film resistor, 11
: Ceramic, substrate, 12. 1st layer conductor, 13: insulation layer,
14: Second layer conductor, l 5: I! j membrane resistor, 16:
1st thick film resistor, 17: second thick film resistor. Figure 1 Figure 2 11 Figure 3

Claims (1)

【特許請求の範囲】 」、厚膜抵抗体とその電極を厚膜印刷法にょシ基板上に
形成するようにした厚膜抵抗体アレイにおいて、 基板上に設けた第1層導体と該第1層導体のたて方向延
長線上で基板上に設けた絶縁層上の第2層導体とを連結
してなる第1厚膜抵抗体と、基板上に設けた絶縁層上の
第2層導体と該第2層導体のたて方向延長線上で基板上
に設け/と第1層導体とを連結してなる第2厚膜抵抗体
とを、互に隣接して横方向に複数個配列するように構成
したことを特徴とする厚膜抵抗体アレイ。 2、基板」二に厚j摸抵抗体とその電極を厚膜印刷法に
よシ形成するようにした厚膜抵抗体アレイの製造方法に
おいて、複数個の第1層導体を基板上に所定の距離と同
一の間隔で千鳥状に隣接して配列するようにした第一工
程と、 つぎに、前記の複数個の第1層尋体の端部に露出部分を
設けるとともにその他の部分の上面に絶縁層を一体的に
被着するようにした第二工程と、つぎに、前記の複数個
の第1層導体の夫々のたて方向延長線上の所定の距離の
前記絶縁層上に第2層導体を設けるようにした第三工程
と、つぎに前記の複数個の第1層導体の端部と前記第2
層導体の端部とが連結されるよう厚膜抵抗体を一体的に
被着するようにした第四工程と、つぎにレーザー光もし
くはグイシングツ−による切断方法によシ前記厚膜抵抗
体を個別の抵抗体に分断1形成する第五工程とからなる
厚膜抵抗体アソイの製造方法
[Claims] ``A thick film resistor array in which thick film resistors and their electrodes are formed on a substrate using a thick film printing method, comprising: a first layer conductor provided on a substrate; A first thick film resistor formed by connecting a second layer conductor on an insulating layer provided on a substrate on a vertical extension line of the layer conductor, and a second layer conductor on an insulating layer provided on the substrate. A plurality of second thick film resistors provided on the substrate on the vertical extension line of the second layer conductor and connected to the first layer conductor are arranged in a horizontal direction adjacent to each other. A thick film resistor array characterized in that it is configured as follows. 2. Substrate" In a method for manufacturing a thick film resistor array in which thick-film resistors and their electrodes are formed on a substrate by thick film printing, a plurality of first layer conductors are formed on a substrate in a predetermined manner. A first step of arranging the plurality of first layer panels adjacent to each other in a staggered manner at intervals equal to the distance; a second step of integrally depositing an insulating layer; and then a second step of depositing a second layer on the insulating layer at a predetermined distance on the vertical extension line of each of the plurality of first layer conductors. A third step of providing a conductor, and then connecting the ends of the plurality of first layer conductors and the second
The fourth step is to integrally apply the thick film resistor so that the ends of the layer conductor are connected to each other, and then the thick film resistor is individually attached using a cutting method using a laser beam or a cutting tool. A method for manufacturing a thick-film resistor asoy, which comprises a fifth step of forming a resistor into sections 1.
JP58079329A 1983-05-09 1983-05-09 Thick film resistor array and method of producing same Granted JPS59204201A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58079329A JPS59204201A (en) 1983-05-09 1983-05-09 Thick film resistor array and method of producing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58079329A JPS59204201A (en) 1983-05-09 1983-05-09 Thick film resistor array and method of producing same

Publications (2)

Publication Number Publication Date
JPS59204201A true JPS59204201A (en) 1984-11-19
JPH0430161B2 JPH0430161B2 (en) 1992-05-21

Family

ID=13686841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58079329A Granted JPS59204201A (en) 1983-05-09 1983-05-09 Thick film resistor array and method of producing same

Country Status (1)

Country Link
JP (1) JPS59204201A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453506A (en) * 1987-08-25 1989-03-01 Rohm Co Ltd Manufacture of printed circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453506A (en) * 1987-08-25 1989-03-01 Rohm Co Ltd Manufacture of printed circuit

Also Published As

Publication number Publication date
JPH0430161B2 (en) 1992-05-21

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