JPS59198022A - Ramp voltage generator - Google Patents

Abstract

PURPOSE:To set accurately and easily the slope by using an output current of a current output type digital/analog converter so as to charge a capacitor. CONSTITUTION:The slope of a ramp (sawtooth wave) output voltage is set numerically by a digital switch SR1. When a start signal is inputted from a switch S2 to a control processing section CP1, a switch S1 is opened and also a current proportional to the set value of a switch SR1 is outputted from the current output type digital/analog converter (DAC)DA1. A capacitor C1 is charged at a slope set by the switch SR1 by the current from the converter DA1. Since the capacitor C1 is charged by 2<n> kinds of current values when the switch SR1 sets a numeral of binary n-bit, the slope of the ramp voltage is adjusted accurately and minutely.

Description

Detailed Description of the Invention This invention applies a ramp pressure (also referred to as a sawtooth wave voltage, but referred to as a ramp in this specification) that increases with the passage of μ time.
Conventionally, there was a device shown in Figure 1, which is related to a lamp voltage generator that generates a voltage (referred to as voltage). In the figure, Tl is a transistor, R1 is a resistor, C1 is a capacitor, and FEB + kCB are each The power supply, 81 switch, VC is the ramp voltage developed across capacitor C1. In addition, the voltage values of sources EF and B IECB are indicated by EEB and EcB, respectively, and the resistance value of R1 is tR□
, CI's static value is C□.

Since the transistor TRI is grounded, its collector current is kept at an almost constant value regardless of the load (i.e., current amplification factor E rises linearly as the later collector voltage #L1-αEKI3/R□. When B is reached, i=0 and Vc is almost ECB
is kept at the value of FIG. 2 is a diagram showing the relationship between time t and Vc.

As is clear from equation (1), the slope of the lamp voltage VC is α
determined by the value of r EEB + C1 + Rt,
In order to finely adjust this slope, E[B r C1p
Although it is necessary to finely adjust the value of ktx etc.,
There is a drawback that a complicated adjustment circuit is required to finely and accurately adjust these values over a wide range yC.

There are cases where the slope of the lamp voltage output from a computer or sequencer to the plant is required to be finely and accurately adjusted, and conventional equipment cannot achieve this level of comfort. However, this invention has the drawback that it is difficult to satisfy the above-mentioned current output type digital analog converter (hereinafter abbreviated as DAC) to charge a capacitor using the output Φ current. Accordingly, it is an object of the present invention to provide a lamp voltage generator that can easily set an accurate slope value.

An embodiment of the present invention will be described below. Fig. 3 is a block diagram showing an embodiment of the present invention. The same reference numerals as in Fig. 1 indicate the same or corresponding parts, and SRI indicates the slope of the lamp output voltage numerically. CPl is the control processing unit, υB1 is the data bus, DAI is the current output type D
AC and AI are amplifiers, S2 is a switch that provides a start signal to the control processing unit CPI, and RPI and RP2 are pull-up resistors, respectively.

1) Since the operation of AC is well known, I will omit the explanation, but 1. DAI U Digital Switch is a current output type 1) AC that outputs a current proportional to the value set in SRI.

The switch 81 is kept on and the initial value of Vc is zero. In this state, when the control processing unit CP1 is activated, the switch S1 is opened, and the first flow of the value proportional to the setting value of the switch SRI is a stone, the outflow output type 1) AC(1) At
) and charges the capacitor Cl, so Vc
changes as shown in FIG.

The slope of the ramp voltage and pressure Vc is ~ outflow type DAC (DAI
), this current is determined by the T#L current from
For example, if the digital switch SR1 can set all binary n-bit values, in steps of "Vx", 0 to
To 1-1/! Since it is possible to take 2n types of current values between 1 and 2, it is possible to accurately and finely adjust the slope of the lamp voltage.The voltage Vc is amplified by the gain stabilized amplifier A1 and output. do.

Although the SKI, CPl, etc. are shown as hardware in FIG. 3, and the setting of the SRI is described as being done manually, it is of course possible to configure these parts using a computer program.

FIG. 5 is a block diagram showing another embodiment of the present invention, in which the same reference numerals as in FIG. Control path, DA2μ city 1 pressure output type LIA
C, DB2 is a data bus that sends input data to DA2, S
3 is a switch that operates in conjunction with Sl.

A voltage output type DAC (DA2) outputs a voltage proportional to the numerical value represented by the digital signal transmitted by the data bus DB2.
The capacitor C1 is charged to that voltage value. At this time, depending on the operation of CPl! 11S1 is open, S3 is connected to the B side contact, and a current proportional to the value represented by the digital signal transmitted by the data node (DBI) charges the capacitor C1 from the current output type DAC (DAI).

FIG. 6 is a diagram showing an example of the voltage change of capacitor C1 shown in FIG. 5. Before t=0, VC=VA is maintained, and t=
It is charged with a predetermined current value from 0 to 1=10, and t=
From tl to t = t2'E, the charging current is zero, and t
= At t2, switch S1 is turned on and VB
t-7JO, t=t3"t'81, t7.83 k
This shows the case where the battery is connected to the contact B side and charged with a larger current than the period 1=0 to 1=1□.

As described above, according to the present invention, since the capacitor is charged with the output current of the current output type DAC, the slope of the lamp voltage can be set accurately and finely.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional device, FIG. 2 is a diagram showing the relationship between the output voltage and time of the circuit in FIG. 1, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. The figure shows the relationship between the output voltage and time of the circuit in Figure 3, Figure 5 is a block diagram showing another embodiment of the invention, and Figure 6 shows the relationship between the output voltage and time of the circuit in Figure 5. FIG. C1...Capacitor, 1) Al...Current output type 1)
A.C. 1) A2...Voltage output type DAC In each figure, the same reference numerals indicate the same or equivalent parts. Agent Masuo Oiwa 1st illustration 20 □ Time t

Claims (1)

[Scope of Claims] (1) A current-type digital-to-analog converter that includes means for setting an initial voltage in a capacitor and a digital code representing an arbitrary value and outputs a small current proportional to the value. and means for charging the capacitor 1M1 with the output current of the digital-to-analog converter. (21) The lamp voltage generator according to claim 1, wherein the means for setting the initial voltage in the capacitor sets an initial voltage of zero by completely discharging the capacitor. 3) The means for setting the initial pressure in the capacitor is a voltage-type digital-analog converter that inputs a digital code representing an arbitrary value and outputs a value proportional to the value, and the output of this digital-analog converter. 2. The lamp voltage generator according to claim 1, further comprising means for setting the voltage based on the initial voltage of the capacitor.