JPS59191915A - Transistor amplifier - Google Patents

Abstract

PURPOSE:To prevent previously the breakdown of an amplifier due to an excessive input by converting a part of the output signal into a DC signal and controlling the input bias or the input gate voltage of the amplifier when the level of said DC signal exceeds the set value. CONSTITUTION:An input signal P1 is supplied to a power amplifying circuit 2 via an amplifying circuit 1 of the preceding stage and delivered through an output terminal P2. The amplitude signal P2 proportional to the output signal is extracted out of the circuit 2 and converted into a DC signal P3 by a wave detecting circuit 3. This signal P3 is amplified by an amplifying circuit 4 and supplied to a threshold value gate circuit 5. When the level of this supplied signal of the circuit 5 exceeds the threshold value set by a constant voltage diode ZD, i.e., the signal P2 has an extremely high level, the signal is delivered to the juncture between resistances R10 and R11. Then the inverted signal is supplied to the gates of FETQ1 and Q2 from an operational amplifier A2, and the gate voltage is suddenly reduced. This can prevent previously the breakdown of an amplifier owing to the escessive input of an FET.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a high frequency, high power amplifier equipped with a transistor destruction prevention circuit.

Conventionally, high-frequency, high-output amplifiers that use transistors often break down when oscillation occurs due to excessive input, or during test and adjustment.

SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a transistor amplifier equipped with a protection circuit that prevents destruction of the transistor amplifier device due to excessive input.

The transistor amplifier of the present invention includes a DC signal conversion means for converting a part of an output signal from a high frequency power amplification semiconductor device into a DC signal, and a gate output signal in response to the DC signal exceeding a set threshold value. a value gate circuit means for outputting the gate output signal; a level adjustment inverting circuit means for inverting and amplifying the gate output signal and adjusting the level with a reference voltage;
and input control means for the high frequency power amplification semiconductor device which uses the output of the level adjustment inversion circuit means as a control signal.

According to the present invention, even in the event of an emergency situation in which the high-frequency power amplifier outputs an abnormal level due to excessive input or other reasons, it is possible to prevent the power amplification transistor in the amplifier from being destroyed.

A detailed explanation will be given below with reference to the drawings.

FIG. 1 is a block diagram showing the main parts of an embodiment of the present invention, which includes a main circuit section 100 that amplifies high-frequency signals and a control circuit section 200 that generates a control signal to prevent destruction of a transistor amplifier device. . The main circuit 100 includes a pre-stage amplifier circuit 1 and a power amplifier circuit 2 that amplify an input signal P1 to an output signal P2.
In addition, the control circuit section 200 includes the power amplifier circuit 2
a detection circuit 3 for converting a part of the output signal P into a DC signal P3, an amplifier circuit 4 for amplifying the DC signal P3 into a DC output signal P4, and the DC output signal P4 exceeding a threshold value.
In response to the level of the gate output signal P. The value gate circuit 5 inverts and amplifies the gate output signal P0 and outputs the control signal P.

and a level adjustment inversion circuit 6 for applying the voltage to the input terminal of the transistor amplification device of the power amplification circuit 2.

(・Well, due to excessive input or other reasons, the power amplifier circuit 2
When an abnormal level output signal P2 appears from the output signal P2, the output level of the DC output signal P4, which is converted into a DC signal P3 by the detection circuit 3 and amplified by the amplifier circuit 4, becomes a threshold level corresponding to the abnormal level of the output signal P2. (・Exceeds the threshold level of the value gate circuit 5. As a result, the value gate circuit 5 outputs the gate output signal P.
The level-inverted control signal P0 is applied to the input terminal of the transistor amplification device of the power amplification circuit 2 via the power amplification circuit 2.

Apart from this, if the transistor amplifier is an insulated gate field transistor, it works to rapidly lower the gate voltage, and if it is a bipolar transistor, it works to sharply increase the bias voltage. Destruction due to runaway can be prevented.

Components in the road map that represent the same things as in FIG. 1 are given the same reference numerals.

The input signal P1 amplified by the pre-stage amplifier circuit 1 enters the power amplifier circuit 2, and is connected to the coupling capacitors C1, C2, Cs and C.
4, an insulated gate field effect transistor (hereinafter F
The power is amplified to an output signal P2 by ET, Q), and C2. Here, C6 and Lo constitute a high-frequency current blocking circuit, and are connected to the power supply voltage Vc through the feedthrough capacitor C3.
c is the above FET Q.

and C2. A part of the output signal P is taken out via a resistor and enters the detection circuit 3, where it is converted into a DC signal B by a detection diode D and passed through the feedthrough capacitor C1.
It enters the amplifier circuit 4 via the resistor R6, and after adjusting the level with the resistor R6, the operational amplifier A1. The signal is amplified into a DC output signal P4 by an amplifier circuit 4 consisting of resistors R, , R, l and a bird. Here, the resistor R4 is a bias resistor of the detection diode D, and the resistor R3 and the capacitor C6 are circuit elements constituting a filter circuit. The DC output signal P4 is input to the cathode of the constant voltage diode ZD of the value gate circuit 5. If the output signal P2 indicates an abnormal level, the output level of the corresponding DC output signal 4 is The voltage exceeds the Zener voltage of the diode ZD, and a gate output signal P is output to the connection point between the resistor R0 and the resistor R0.

This gate output signal P. pulls in the output voltage of the operational amplifier A2, whose operating state has been set to the reference potential ref, to a negative level, and outputs a control signal P0 whose level has been adjusted and whose level has been inverted. This control signal P0 is a resistor B, 1
and the gate terminals of FETQ, C2, and rapidly reduce the respective gate voltages to quickly respond to excessive input or other abnormal conditions and prevent their destruction. Can be done. Therefore, the amplifier circuit 4
DC signal P for.

When the input level of FETQ is normal, the input level of FETQ is slightly lower than the operating range of voltage regulator diode ZD (
- It is necessary to set it to take a value.

Also, considering the thickness of the reference potential Vref applied to the operational amplifier A2, considering the gain and other characteristics of FET Q+ and C2, it is also extremely easy to implement it for an amplifier using a polar Φ transistor, just by adding a simple circuit. It has the effect of protecting transistor amplifier devices such as FETs, which are relatively easy to destroy, from abnormal conditions due to excessive input.

[Brief explanation of drawings]

FIG. 1 is a front connection circuit diagram showing essential parts of an embodiment of the present invention. 1...Main circuit section, n00...Control circuit section, 1...Pre-stage amplifier circuit, 2...
Power amplification circuit, 3...Detection circuit, 4...Amplification circuit, 5...Shiki(・A gate circuit, 6...
...Level adjustment inversion circuit, Pl...Input signal, P, ...Output signal, P, ...DC signal, P4...DC output signal , Po...
Gate output signal, Po...control signal, Q, , Q,...insulated gate field effect transistor, VCC...power supply voltage, vref...
...Reference potential, A, A2... Operational amplifier, D...
...Detection diode, ZD... Constant voltage diode, COy CHs C2* C8* C4s c
, ``'''' Capacitor, C,, C7...Through capacitor, R,, R2, R,. R...R...i...R...R...B,...R...,R
,,,Bird・,R,4・・・・Fixed resistance, Bird, Bird,・
...Variable resistance.

Claims (1)

[Claims] DC signal conversion means for converting a part of the output signal from the high frequency power amplification semiconductor device into a DC signal; and a threshold gate circuit for outputting a gate output signal in response to the DC signal exceeding a set threshold. level adjustment inversion circuit means for inverting and amplifying the gate output signal and adjusting the level with a reference voltage; and input control means for the high frequency power amplification semiconductor device that uses the output of the level adjustment inversion circuit means as a control signal. A transistor amplifier characterized by the following characteristics: