JPS59185005A - Multi-channel reproducing circuit - Google Patents

Multi-channel reproducing circuit

Info

Publication number
JPS59185005A
JPS59185005A JP5684183A JP5684183A JPS59185005A JP S59185005 A JPS59185005 A JP S59185005A JP 5684183 A JP5684183 A JP 5684183A JP 5684183 A JP5684183 A JP 5684183A JP S59185005 A JPS59185005 A JP S59185005A
Authority
JP
Japan
Prior art keywords
terminals
amplifier circuit
circuit
current source
amplifier circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5684183A
Other languages
Japanese (ja)
Inventor
Isao Akitake
秋武 勇夫
Eisaku Akutsu
阿久津 英作
Yukiya Ueki
幸也 植木
Hisanobu Tsukasaki
塚崎 久暢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5684183A priority Critical patent/JPS59185005A/en
Publication of JPS59185005A publication Critical patent/JPS59185005A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/127Structure or manufacture of heads, e.g. inductive
    • G11B5/33Structure or manufacture of flux-sensitive heads, i.e. for reproduction only; Combination of such heads with means for recording or erasing only
    • G11B5/39Structure or manufacture of flux-sensitive heads, i.e. for reproduction only; Combination of such heads with means for recording or erasing only using magneto-resistive devices or effects
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor

Abstract

PURPOSE:To decrease remarkably power consumption by forming a current source of a magnetoresistance effect head and a current of each amplifier circuit with one circuit's share. CONSTITUTION:The circuit consists of n-set differential amplifier circuits 7, 8, 9 whose power terminals are connected in series between a voltage source 10 and ground and n-set of magnetoresistance effect heads 2, 4, 6 picking up a signal depending on the change in a constant current source 1 and a resistor connected in series with the constant current source, and capacitors 11, 12 are connected between each high voltage and each low voltage terminals from the 2nd amplifier circuit 8 to the n-th amplifier circuit 9. On the other hand, both terminals of the magnetoresistance effect heads 2, 4, 6 are connected to differential input terminals of the amplifier circuits 7, 8, 9 respectively via capacitors 13-17. The unbalance of the current generated in the amplifier circuits 7-9 in accordance with the amplitude of the inputted signal is absorbed by capacitors 11-12 inserted between voltage source terminals of each amplifier circuit, allowing to reduce remarkably the power consumption due to the differential amplifier circuit.

Description

【発明の詳細な説明】 (利用分野) 本発明は、省電力化に適した多チヤンネル再生回路に関
する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Application) The present invention relates to a multi-channel reproduction circuit suitable for power saving.

(背 景) 第1図に磁気抵抗効果ヘッドを用いた多チヤンネル再生
回路の例を示す。第1図において、それぞれの磁気抵抗
効果ヘッド2,4.6iζ定電流諒1、3.5が接続さ
れており、また、これらの磁気抵抗効果ヘッドと定電流
源との接続点の各々には増幅器7,8.9の入力側が接
続されている。
(Background) Figure 1 shows an example of a multichannel reproduction circuit using a magnetoresistive head. In FIG. 1, respective magnetoresistive heads 2, 4.6iζ constant current sources 1, 3.5 are connected, and each connection point between these magnetoresistive heads and a constant current source has a The input sides of amplifiers 7, 8.9 are connected.

一般に、磁気効果ヘッドの抵抗直は小さく、しかもその
抵抗変化率も非常に小さい(約1%)。
Generally, the resistance of a magnetic effect head is small, and the rate of change in resistance is also very small (approximately 1%).

このため、該定電流源1,3.5の電流は約10mA〜
20mA流す必要がある。したがって、第1図に示す従
来例のようにチャンネル数だけの定電流源を用いた回路
ではこれらの定電流源で消費される電力が大きくなって
しまうという欠点がある。
Therefore, the current of the constant current sources 1 and 3.5 is approximately 10 mA to
It is necessary to flow 20mA. Therefore, a circuit using constant current sources equal to the number of channels, such as the conventional example shown in FIG. 1, has the disadvantage that the power consumed by these constant current sources becomes large.

また該磁気抵抗効果ヘッドの抵抗変化率が小さいため、
該磁気抵抗効果ヘッド2,4.6に現われる信号電圧は
数百μV程度である。したがって、該増幅回路7,8.
9のダイナミックレンジは小さくてすむ。しかしながら
、第1図の従来回路では該増幅回路?、8.9の電源を
電圧源10よシ並列に供給しているため、上述した該定
電流源と同様にこれらの増幅回路で消費される電力が太
きいという欠点がある。
In addition, since the rate of resistance change of the magnetoresistive head is small,
The signal voltage appearing on the magnetoresistive head 2, 4.6 is on the order of several hundred μV. Therefore, the amplifier circuits 7, 8 .
9 has a small dynamic range. However, in the conventional circuit shown in Fig. 1, is the amplifier circuit? .

(目  的) 本発明の目的は、前記した従来技術の欠点を除去し、多
チヤンネル再生回路の省電力化を提供することにある。
(Objective) An object of the present invention is to eliminate the drawbacks of the prior art described above and to provide power saving of a multi-channel reproduction circuit.

(概 要) 本発明の特徴は電圧源と接地間に、型温端子が直列に接
続されたn個(ただし、nは2以上の整数)の差動増幅
回路、定7a流源、該定電流源に直列接続された抵抗の
変化で信号をピックアップするn個の手段、前記n個の
差動増幅回路の2人力に、前記抵抗の変化で信号をピッ
クアンプするn個の手段のそれぞれの両端の端子を接続
する手段、ならびに少くとも前記電圧源に接続された第
1の差動増幅回路を除く前記差動増幅回路の高電圧体−
低電圧側電源端子間に接続された′、B量を具備した点
にある。
(Overview) The features of the present invention include n differential amplifier circuits (where n is an integer of 2 or more) in which type temperature terminals are connected in series between a voltage source and ground, a constant 7a current source, and a constant 7a current source. n means for picking up a signal by changing a resistance connected in series with a current source; n means for picking up a signal by changing the resistance; means for connecting terminals at both ends, and at least a high voltage body of the differential amplifier circuit other than the first differential amplifier circuit connected to the voltage source;
The present invention is characterized in that it has a quantity ' and B connected between the low voltage side power supply terminals.

(実施例) 以下、本発明の一実施列を第2図によシ説明する。第2
図において、第1図と同−物又は同等物には同一符号が
記されている。
(Example) Hereinafter, one embodiment of the present invention will be explained with reference to FIG. Second
In the figures, the same or equivalent parts as in FIG. 1 are designated by the same reference numerals.

まず、本実施例の構成を説明する。定電流源1の一端は
′電圧源10に接続されており、その他端は第1の磁気
抵抗効果ヘッド2の一方の端子へ接続されている。該第
1の磁気抵抗効果ヘッド2の他端は第2の磁気抵抗効果
ヘッドの一方の端子へ接続されている。以下、同様に第
n番目の磁気抵抗効果ヘッド6まで直列に接続されてお
シ、該第n番目の磁気抵抗効果ヘッド6の他端は接地さ
れている。
First, the configuration of this embodiment will be explained. One end of the constant current source 1 is connected to a voltage source 10, and the other end is connected to one terminal of the first magnetoresistive head 2. The other end of the first magnetoresistive head 2 is connected to one terminal of a second magnetoresistive head. Thereafter, they are similarly connected in series up to the nth magnetoresistive head 6, and the other end of the nth magnetoresistive head 6 is grounded.

次に、増幅回路7〜9も上記と同様に接続されている。Next, amplifier circuits 7 to 9 are also connected in the same manner as above.

すなわち、第1の増幅回路7の高圧側電圧端子が電圧源
10と接続され、低圧側電圧端子は第2の増幅回路8の
高圧側電圧端子と接続されている。該第2の増幅回路8
の低圧(111!圧端子は角箱3め増幅回路の高圧側電
圧端子に接続され、以下同様に順次増幅回路は直列接続
されている。そして第n番目の増幅回路9の低圧側電圧
端子は接地されている。
That is, the high voltage side voltage terminal of the first amplifier circuit 7 is connected to the voltage source 10, and the low voltage side voltage terminal is connected to the high voltage side voltage terminal of the second amplifier circuit 8. The second amplifier circuit 8
The low voltage (111! voltage terminal) is connected to the high voltage side voltage terminal of the third square box amplifier circuit, and the following amplifier circuits are connected in series in the same way.Then, the low voltage side voltage terminal of the nth amplifier circuit 9 is Grounded.

また、第2番目の増幅回路8から第n番目の増幅回路9
の各々の高電圧−低電圧端子間には容量が接続されてい
る。一方、該増幅回路7,8.9のそれぞれの差動入力
端子には、それぞれ対応した磁気抵抗効果ヘッド2,4
.6の両端子がそれぞれ容量13〜17を介して接続さ
れている。
Moreover, the second amplifier circuit 8 to the n-th amplifier circuit 9
A capacitor is connected between each high voltage and low voltage terminal. On the other hand, the respective differential input terminals of the amplifier circuits 7, 8.9 are connected to the corresponding magnetoresistive heads 2, 4.
.. Both terminals of 6 are connected via capacitors 13 to 17, respectively.

次に、本実施例の動作について説明する。直列に接続さ
れたn個の磁気抵抗効果ヘッド2〜6に、定電流源1か
ら例えば10mAの電流が供給されている。このため、
磁気抵抗効果ヘッド2〜6が図示されていない磁気テー
プから信号をピックアップすると、該ピックアップされ
た信号は、各増幅回路7〜9の入力端子に接続されたコ
ンデンサ13〜17 を介して、増幅回路7〜9のそれ
ぞれに入力する。各増幅回路7〜9は、入力してきた信
号を増幅し、それぞれの出力端から増幅された信号を出
力する。
Next, the operation of this embodiment will be explained. A current of, for example, 10 mA is supplied from a constant current source 1 to n magnetoresistive heads 2 to 6 connected in series. For this reason,
When the magnetoresistive heads 2 to 6 pick up signals from a magnetic tape (not shown), the picked up signals are sent to the amplifier circuits via capacitors 13 to 17 connected to the input terminals of each of the amplifier circuits 7 to 9. Enter each of 7 to 9. Each of the amplifier circuits 7 to 9 amplifies the input signal and outputs the amplified signal from its respective output terminal.

この時、入力してきた信号の大きさに応じて増幅回路7
〜9で発生する電流の不平衡は、各増幅回路の電圧源端
子間に挿入された各章11〜12により吸収される。
At this time, the amplifier circuit 7
The unbalance of the current generated at points 9 to 9 is absorbed by each section 11 to 12 inserted between the voltage source terminals of each amplifier circuit.

例えば、第1の増幅回路7に流れる交流電流(信号電流
)が大きく、そして第2の増幅回路8に流れる交流電流
が小さい場合には、その差分の電流に比例した電荷が容
量11に蓄積される。逆に、第2の増幅回路8に流れる
交流電流が大きい場合には、第1の増幅回路7から供給
される電流が小さいため、その差分の電流が該容量11
から供給される。このようにして常に各増幅回路の電流
が平衡に保たれ、安定した動作が行なわれる。
For example, when the alternating current (signal current) flowing through the first amplifier circuit 7 is large and the alternating current flowing through the second amplifier circuit 8 is small, a charge proportional to the difference in current is accumulated in the capacitor 11. Ru. Conversely, when the alternating current flowing through the second amplifying circuit 8 is large, the current supplied from the first amplifying circuit 7 is small, and the difference in current is applied to the capacitor 11.
Supplied from. In this way, the currents of each amplifier circuit are always kept balanced, and stable operation is performed.

本実施例によれば、n個の磁気抵抗効果ヘッド。According to this embodiment, there are n magnetoresistive heads.

2〜6のそれぞれの両端が後段の差動増幅回路の2つの
入力端子へ接続されているので、該差動増幅回路では対
応した磁気抵抗効果ヘッドで発生した信号を正確に増幅
することができる。
Since both ends of each of 2 to 6 are connected to the two input terminals of the differential amplifier circuit in the subsequent stage, the differential amplifier circuit can accurately amplify the signal generated by the corresponding magnetoresistive head. .

また、n個の磁気抵抗効果ヘッドに1個の定電流源から
電流を供給しているため、定電流源による電力消費が前
述した従来装置の1/nになる。さらに、1個の電圧源
10からn個の差動増幅回路7〜9に電力を供給してい
るので、差動増幅回路による電力消費を大幅に削減する
ことができる。
Further, since current is supplied to n magnetoresistive heads from one constant current source, power consumption by the constant current source is reduced to 1/n of that of the conventional device described above. Furthermore, since power is supplied from one voltage source 10 to the n differential amplifier circuits 7 to 9, power consumption by the differential amplifier circuits can be significantly reduced.

なお、前記した実施例では入力手段として磁気抵抗効果
ヘッドを例にあげて説明したが、本発明はこれに限定さ
れることなく、いかなる入力手段lζも適用することが
できる。
Although the above embodiments have been described using a magnetoresistive head as an example of the input means, the present invention is not limited thereto, and any input means lζ can be applied.

(効 果) 以上のように、本発明によれば、磁気抵抗効果ヘッドの
電流源およびそれぞれの増幅回路の電流を1回路分で構
成できる。このため、消費電力を大幅に小さくでき、多
チヤンネル構成を必要とする回路に非常な効果がある。
(Effects) As described above, according to the present invention, the current source of the magnetoresistive head and the current of each amplifier circuit can be configured by one circuit. Therefore, power consumption can be significantly reduced, which is very effective for circuits that require a multi-channel configuration.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は磁気抵抗効果ヘッドを用いた従来の多チヤンネ
ル再生回路の一実施例の回路図、第2図は本発明の一実
施例の回路図を示す。 1.3.5・・・定電流源、 2,4.6・・・磁気抵
抗効果ヘッド、  ?、8.9・・・差動増幅回路、1
1.12・・・コンデンサ 代理人弁理士 平 木 道 人
FIG. 1 is a circuit diagram of an embodiment of a conventional multi-channel reproducing circuit using a magnetoresistive head, and FIG. 2 is a circuit diagram of an embodiment of the present invention. 1.3.5...Constant current source, 2,4.6...Magnetoresistive head, ? , 8.9...Differential amplifier circuit, 1
1.12...Michihito Hiraki, patent attorney representing capacitors

Claims (1)

【特許請求の範囲】 (1111圧源と接地間に、電源端子が直列に接続され
たn個(ただし、nは2以上の整数)の差動増幅回路、
定電流源、該定電流源に直列接続された抵抗の変化で信
号をピックアップするn個の手段、前記n個の差動増幅
回路のそれぞれの2人力に、前記抵抗の変化で信号をピ
ックアップするn個の手段のそれぞれの両端の端子を接
続する手段、ならびに少なくとも前記電圧源に接続され
た第1の差動増幅回路を除く前記差動増幅回路の高電圧
側−低電圧側電源端子間に接続された容量を具備したこ
とを特徴とする多チヤンネル再生回路。 (2)前記抵抗の変化で信号をピックアップする手段が
磁気抵抗効果素子であることを特徴とする特許 回路。
[Claims] (N differential amplifier circuits in which power terminals are connected in series between a 1111 pressure source and ground (n is an integer of 2 or more);
a constant current source, n means for picking up a signal by changing a resistance connected in series with the constant current source, and picking up a signal by changing the resistance in each of the n differential amplifier circuits. means for connecting the terminals at both ends of each of the n means, and between the high voltage side and low voltage side power supply terminals of the differential amplifier circuits excluding at least the first differential amplifier circuit connected to the voltage source; A multi-channel reproducing circuit characterized by having connected capacitors. (2) A patented circuit characterized in that the means for picking up a signal by a change in resistance is a magnetoresistive element.
JP5684183A 1983-04-02 1983-04-02 Multi-channel reproducing circuit Pending JPS59185005A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5684183A JPS59185005A (en) 1983-04-02 1983-04-02 Multi-channel reproducing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5684183A JPS59185005A (en) 1983-04-02 1983-04-02 Multi-channel reproducing circuit

Publications (1)

Publication Number Publication Date
JPS59185005A true JPS59185005A (en) 1984-10-20

Family

ID=13038622

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5684183A Pending JPS59185005A (en) 1983-04-02 1983-04-02 Multi-channel reproducing circuit

Country Status (1)

Country Link
JP (1) JPS59185005A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0470687A2 (en) * 1990-08-07 1992-02-12 Seagate Technology International Magneto-resistive sensor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0470687A2 (en) * 1990-08-07 1992-02-12 Seagate Technology International Magneto-resistive sensor

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