JPS59182390A - Temperature detecting circuit of electronic timepiece - Google Patents

Temperature detecting circuit of electronic timepiece

Info

Publication number
JPS59182390A
JPS59182390A JP5294884A JP5294884A JPS59182390A JP S59182390 A JPS59182390 A JP S59182390A JP 5294884 A JP5294884 A JP 5294884A JP 5294884 A JP5294884 A JP 5294884A JP S59182390 A JPS59182390 A JP S59182390A
Authority
JP
Japan
Prior art keywords
temperature
circuit
detecting circuit
resistances
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5294884A
Other languages
Japanese (ja)
Other versions
JPS6142205B2 (en
Inventor
Masao Akaha
赤羽 正雄
Kikuo Oguchi
小口 紀久雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP5294884A priority Critical patent/JPS59182390A/en
Publication of JPS59182390A publication Critical patent/JPS59182390A/en
Publication of JPS6142205B2 publication Critical patent/JPS6142205B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F5/00Apparatus for producing preselected time intervals for use as timing standards
    • G04F5/04Apparatus for producing preselected time intervals for use as timing standards using oscillators with electromechanical resonators producing electric oscillations or timing pulses
    • G04F5/06Apparatus for producing preselected time intervals for use as timing standards using oscillators with electromechanical resonators producing electric oscillations or timing pulses using piezoelectric resonators

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Clocks (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To realize a fully integrated temperature detecting circuit by forming two kinds of resistance which generate different temperature signals on the same semiconductor substrate for a temperature detecting circuit which used a thermistor. CONSTITUTION:The temperature detecting circuit is only formed on the same semiconductor substrates monolithically by generating two kinds of different temperature signal. Namely, a switch 101 which uses a P-ch, MOSFET, or PNP bipolar transistor, resistance element 102, resistance elements 103-105 which differ in temperature signal from the resistance element 102, and inverters 106- 108 for temperature detection are arranged properly. A converting circuit 109 which performs temperature conversion from binary logical outputs of the elements 106-108 is also formed on the same semiconductor substrate. The elements 102 and 103-105 are made different in temperature precision only by using resistances which differ in temperature signal such as low-density diffused resistances, high-temperature diffused resistances, and MOS resistances.

Description

【発明の詳細な説明】 本発明は、温度補漬機0ヒを備えた電子時計における孟
度検出回路に係わシ、更に詳しくは、温度係数のダ゛4
なる複数個の抵抗とCMOSインバータ+14:により
構成される電子時dt用温度検出回路番て関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a temperature coefficient detection circuit in an electronic watch equipped with a temperature compensation device, and more specifically,
The temperature detection circuit for electronic time dt is composed of a plurality of resistors and a CMOS inverter +14.

本発明の目的は、簡便表電子時計用温度検出回路を提供
することであり、又、前記検出回路は、集積化され得る
回路構成とすることにある。
An object of the present invention is to provide a simple temperature detection circuit for an electronic timepiece, and also to provide the detection circuit with a circuit configuration that can be integrated.

現在、電子時計の時間標準となる水晶振動子−は、ヤン
グ率の温度特性K特に依存した温度特性を待って訃り、
例えば5°×カツトの屈曲振動子の場合には、負の二次
係数(−10〜10740g )を持つ二次曲線となる
。従って水晶振動子の温度特性は、水晶式電子時計にと
って最も大きな対環境誤差原因となる。
At present, the crystal oscillator that is the time standard for electronic watches has died after waiting for the temperature characteristic K, which is particularly dependent on the temperature characteristic of Young's modulus.
For example, in the case of a 5°×cut bending vibrator, it becomes a quadratic curve with a negative quadratic coefficient (-10 to 10740 g). Therefore, the temperature characteristics of the crystal oscillator are the biggest cause of environmental errors for quartz electronic watches.

従来より、この温度誤差を補正する為、!1μlf ’
6量変化のある磁器コンデンサを用いる方法−や、時間
標準となる水晶発振器と、もう一つ別の発:最冷とを設
け、両°者の温度−周波数特性の違い力・ら、温度検出
し、基準信号発生・原の温度−周波数特性を補正する方
法等が使用されている。
Conventionally, in order to correct this temperature error,! 1μlf'
A method using a ceramic capacitor with a variable quantity, a crystal oscillator that serves as a time standard, and another oscillator (the coldest one) is used to detect the temperature due to the difference in temperature-frequency characteristics between the two. However, methods of generating a reference signal and correcting the original temperature-frequency characteristics are used.

磁器コンデンサを使用する方法においては、補正精度は
言うまでもなく、水晶振動子と磁器コンデンサとの温度
特性の兼合いで決定される。従つて、精度を向上させよ
うとすれば、各々の特性の均一化、合せ込みの努力等、
極端に重荷となってく る。
In the method using a magnetic capacitor, the correction accuracy is determined, of course, by the temperature characteristics of the crystal resonator and the magnetic capacitor. Therefore, in order to improve accuracy, it is necessary to make efforts to equalize and match each characteristic, etc.
It becomes an extremely heavy burden.

父、ニー)の発振器による補正の場合、6丑器コンデン
プに用の、場合に比べて、A′a度面では多大の効果が
J舅待できる。しかし午ら、温度検出の為、基準1ゴ号
発生源の他に、もう−個の発振器が必要で心るへ1、温
度検出r(際し−C1二つの発振周波数の周θU数弗等
を検出する検出回路を始めとする付加同品が必要であり
、それに伺属する制御回路も必要となり、補正回路自体
が大規模になってくる欠点をもっている。
In the case of correction using the oscillator of the first and second oscillators, a greater effect can be obtained in terms of the A'a degree than in the case of the 6-meter condenser. However, in order to detect the temperature, in addition to the reference 1 G source, we need one more oscillator. This method requires additional components such as a detection circuit for detecting , and also requires a corresponding control circuit, which has the disadvantage that the correction circuit itself becomes large-scale.

そこで、最も簡便で一般的な方法は、サーミスタ等の感
温素子を用いる方法であるが、サーミスタは他の回路と
同一の半導体基板上に形成することができず、外付けと
しなければならない、このため小さね時計に組み込んだ
際に困難を伴なうと共に、製造コスト、部品コストの上
昇の原因となってい几。そこで本発明は同一半導体基板
上に温1lia号の異なる二種類の信号を形成して温度
検出回路をモノリシックに形成するものでちる。第1図
は本発明の実施1+すでちシ、101はP−ch1Ao
sygT又(I′j:P N Pバイポーラトランジス
タ等によるスイッチである。102は抵抗素子、403
〜105(グ102の抵抗素子とは温度信号の異なる抵
抗素子、106〜108は温度検出用C−MOSインバ
ータである。109は前記106〜108の二値論理出
力から温度変換する為の変換回路であジ、これらは同一
半導体基板上に形成される。
Therefore, the simplest and most common method is to use a temperature-sensitive element such as a thermistor, but the thermistor cannot be formed on the same semiconductor substrate as other circuits and must be attached externally. For this reason, it is difficult to incorporate it into a small clock, and it also causes an increase in manufacturing costs and component costs. Therefore, the present invention forms a temperature detection circuit monolithically by forming two types of signals of different temperatures on the same semiconductor substrate. FIG. 1 shows implementation 1+ of the present invention, 101 is P-ch1Ao
sygT or (I'j: A switch using a P N P bipolar transistor, etc. 102 is a resistive element, 403
~ 105 (The resistance element of 102 is a resistance element with a different temperature signal, 106 to 108 are C-MOS inverters for temperature detection. 109 is a conversion circuit for converting the temperature from the binary logic output of 106 to 108. Furthermore, these are formed on the same semiconductor substrate.

102の抵抗と103〜105の抵抗の温度精度を異な
らせるには、低濃度拡散抵抗、高温度拡散抵抗、MO8
抵抗等の温度信号の異なる抵抗を用いればよい。
To make the temperature accuracy of the resistor 102 and resistors 103 to 105 different, low concentration diffused resistor, high temperature diffused resistor, MO8
It is sufficient to use a resistor such as a resistor that has a different temperature signal.

次に動作を説明する。t(℃)Kおける、1[]2〜線
で示している。尚第2図、第6図、第5図、第7図にお
いて、温度による、ヘルミ準位の変化等によるVtrの
温度変化は無視して書かれている。
Next, the operation will be explained. It is shown by the 1[]2 to line at t(°C)K. Note that in FIGS. 2, 6, 5, and 7, temperature changes in Vtr due to changes in the Helmi level and the like due to temperature are ignored.

又、106〜108の0−MOSインバータの出力値を
H(日igh出力)又uL (Low出力)のI記号で
、各温度域に対して次表に示した。
In addition, the output values of the 0-MOS inverters 106 to 108 are shown in the following table for each temperature range using the I symbol of H (high output) or uL (low output).

以上のように本発明によればサーミスタを使用すること
なく集積化された温度検出回路が実施できる。次に、本
発明の他の実施例を説明する。一般に?−ミスタは負の
温度係数を持ち、抵抗が正の温度特性を持つのに対し、
集積化されfC場合、温度係数は僅かに異なるが、共に
正の温度係数を持っている。その結果、集積化すること
によシ、温度変化に対する、V23 、 V34 * 
V45 等(7) C−MOSインバータへの入力値の
変化が少なくなる。その結果、105の抵抗の抵抗値を
順次、R2(t) 、 R3(t)。
As described above, according to the present invention, an integrated temperature detection circuit can be implemented without using a thermistor. Next, another embodiment of the present invention will be described. in general? - A mister has a negative temperature coefficient, whereas a resistor has a positive temperature characteristic.
In the case of integrated fC, the temperature coefficients are slightly different, but both have positive temperature coefficients. As a result, by integrating V23 and V34* against temperature changes,
V45 etc. (7) Changes in the input value to the C-MOS inverter are reduced. As a result, the resistance values of the 105 resistors are sequentially R2(t) and R3(t).

R4(t) 、 Rs(t)とし、父、102と103
の接合部(NODB)’(i)V23という如< V3
4 + V45を定めよう。
R4(t), Rs(t), father, 102 and 103
Junction (NODB)' (i) V23 < V3
Let's determine 4 + V45.

すれば、R(t)−Rz (t)+ Ra (t)+R
a (t)十Rs (t)としたとき電源′電圧をVD
Dとすると、 V23−V DD (R3(t)+ R4(t) + 
Rs (t) )/R(t)V34= ’1’DD (
R4(t)+R5<t) )R(t)v45−vDD−
R5(t)/R(t)となる。
Then, R(t)−Rz(t)+Ra(t)+R
a (t) When 1Rs (t), the power supply voltage is VD
D, V23-V DD (R3(t)+R4(t)+
Rs (t) )/R(t)V34='1'DD (
R4(t)+R5<t) )R(t)v45-vDD-
R5(t)/R(t).

更に、t(匂のときの106〜108のC−MOSイン
バータの入力値を、Vtr(t)とする。そして以下の
ように102〜106の抵抗の値を設定する。
Furthermore, let the input value of the C-MOS inverter 106 to 108 at the time of t(off) be Vtr(t).Then, the value of the resistor 102 to 106 is set as follows.

t<t、    vtrr(t)> V23 (t)>
 V34(t) > v45(t)t1≦t<t2■2
3(t)≧Vtr (t) > V34(t)>V4s
(t)t2≦t < t3V23 (t) > V34
 (t)≧Vtr (t) > V4 s (”)t3
≦t    v23(t) > ■34 (”) > 
V45(t)≧vtr(t)第2図に、この様に設定さ
れた場合の温度変化に対する、Vtr l V23 、
 v341 ’V45 (7)変化117)[略を直1
05の抵抗の抵抗値を順次、R2(t) 、 R3(t
) 、 R4(t) 。
t<t, vtrr(t)> V23 (t)>
V34(t) > v45(t) t1≦t<t2■2
3(t)≧Vtr(t)>V34(t)>V4s
(t) t2≦t < t3V23 (t) > V34
(t)≧Vtr (t) > V4 s (”)t3
≦t v23 (t) > ■34 (”) >
V45(t)≧vtr(t) In Fig. 2, Vtr l V23,
v341 'V45 (7) Change 117) [Abbreviation 1
The resistance values of resistor 05 are sequentially determined as R2(t), R3(t
), R4(t).

R5(t)とし、又、102と103の接合部(NoD
Fl:)をV23という如< V34 、 V45を定
めよう。
R5(t), and the junction of 102 and 103 (NoD
Let's define V34 and V45 as Fl:) is called V23.

すれば、R(t) = R2(1;) + Ra (t
)十R4(t)十R5(t)としたとき、電源電圧をV
DDとすると、 V23  =  VDD  (R3(t)十R4(t)
十Rs(t)  )/R(をンVa4 = VDD <
 R4(t)十R5(t) > R(t)V45−VD
D・Fts (t)/R(t)となる。
Then, R(t) = R2(1;) + Ra (t
) 1R4(t) 1R5(t), the power supply voltage is V
Assuming DD, V23 = VDD (R3(t) + R4(t)
1Rs(t) )/R(Va4 = VDD <
R4(t) +R5(t) > R(t)V45-VD
D・Fts (t)/R(t).

更に、t(匂のときの、106〜108のC−MOSイ
ンバータの入力閾値を、V t r (t)とする。
Furthermore, the input threshold value of the C-MOS inverters 106 to 108 at the time of t (smell) is assumed to be V tr (t).

ここでVtr(t)は0−MOSインバータの出力が反
転する時の入力電圧であり、たとえばvz3(t)がV
tr(t)より大きくなるとインバータ106の出力は
HからLK反転する。そして以下のよう(て106〜1
06の抵抗の値を設定する。
Here, Vtr(t) is the input voltage when the output of the 0-MOS inverter is inverted; for example, when vz3(t) is V
When it becomes larger than tr(t), the output of the inverter 106 is inverted from H to LK. And as follows (te106~1
Set the value of resistance 06.

t; < tl    vtr(t)>Vz3(t)>
Va4(t)> V45(t)t1≦t<t2v23(
t)≧vtr(t)>Va、t(t)>V4s(t)t
2≦t<t3  V23(t)>Va4(t)、、=V
tr(t)>V45(t)t3 ≦tV23(t)> 
va4ft)>V4s(t)gVtr(t)第2図に、
この様に設定された場合の温度変化に対する、”” ■
23 r Va4 + v45の変化の概略を直102
〜105の抵抗値の決定に余裕がなくなることがある。
t; <tl vtr(t)>Vz3(t)>
Va4(t)>V45(t)t1≦t<t2v23(
t)≧vtr(t)>Va, t(t)>V4s(t)t
2≦t<t3 V23(t)>Va4(t),,=V
tr(t)>V45(t)t3≦tV23(t)>
va4ft)>V4s(t)gVtr(t) In Figure 2,
”” ■
23 r The outline of the change in Va4 + v45 is directly 102
There may be no margin in determining the resistance value of ~105.

第5図の実施例では温度上昇に対して、0−MOSイン
バータの閾値を順次、変化してゆく様に制御するもので
ある。
In the embodiment shown in FIG. 5, the threshold value of the 0-MOS inverter is controlled to be changed sequentially as the temperature rises.

第5図に於いて、402〜405は拡散抵抗又はMOS
抵抗であって、例えば402全高磯度−拡散抵抗、40
6〜405を低濃度−拡散抵抗で作製したとすれば、v
23 + Va4 * V45  は、温度上昇と共に
増加する特性全書ることが出来る。一方、409〜41
4も集積化された抵抗であって、例えば409=、41
1及び413を低濃度−拡散抵抗41 tl 、 41
2及び414を高濃度−拡散抵抗で作製したとすれば0
−MOSインバータ406〜408のP c h 1l
llソ一ス電位は、温度上昇と共に減少する特性を得る
。その結果、温度検出用0−MOSインバータの入力閾
値電圧は温度上昇と共に減少する事(てなり、入力電圧
V23 、 Va4 、 V45の増加とによシ相乗効
果を持たせる事が出来る。
In Fig. 5, 402 to 405 are diffused resistors or MOS
resistance, for example 402 total height - diffusion resistance, 40
If 6 to 405 were made with low concentration and diffused resistance, v
23 + Va4 * V45 can be written as a characteristic that increases with increasing temperature. On the other hand, 409-41
4 is also an integrated resistor, for example 409=, 41
1 and 413 as low concentration-diffused resistance 41 tl, 41
If 2 and 414 are made with high concentration and diffused resistance, then 0
- P c h 1l of MOS inverters 406 to 408
The Il source potential has a characteristic of decreasing as the temperature rises. As a result, the input threshold voltage of the 0-MOS inverter for temperature detection decreases as the temperature rises, creating a synergistic effect with increases in the input voltages V23, Va4, and V45.

第4図は、第6図の回路を使用したときの第2図面等図
である。
FIG. 4 is a second drawing etc. when the circuit of FIG. 6 is used.

第4図及び第6図において、VDD 、 vss 、 
Vtrのカッコ内の添字は各々第3図及び第5図のC−
MOE+インバータに関するP−ch、ンース屯圧n 
−Ohソース電圧、入力閾値IE圧である。
In FIGS. 4 and 6, VDD, vss,
The subscripts in parentheses for Vtr are C- in Figures 3 and 5, respectively.
P-ch related to MOE + inverter, tonne pressure n
-Oh source voltage, input threshold IE voltage.

第5図は、第3図の回路に615〜620の抵抗を加え
第2の分圧回路を4成することによシ、温IW検出用の
C−MOSインバータのn −cり側、ソース電位をも
温度上昇と共に減少させ、第3図の場合以上に入力閾値
電圧の温度変化を大きくした本発明の実施例である。
FIG. 5 shows that by adding resistors of 615 to 620 to the circuit of FIG. 3 to form a second voltage dividing circuit of 4, This is an embodiment of the present invention in which the potential is also decreased as the temperature rises, and the temperature change in the input threshold voltage is greater than in the case of FIG. 3.

第6図(は、箒5図の回路を使用した場合の第1区間等
図である。第5図の実施列の方が、素子数が多くなる不
利を有するが、効果は第5図の実施・列に比べて太きい
。又、n−を基板とする通常のC−MOSにおいてはn
ch狽1jのサブストレートの分離には工程増加となる
が、5os(シリコンオンサファイア)(+−用いれば
6易r(なる。
Figure 6 is the first section isometric diagram when the circuit in Figure 5 is used. The implementation array in Figure 5 has the disadvantage of having more elements, but the effect is It is thicker than the implementation/column.Also, in a normal C-MOS with an n- substrate, the n
Separation of the substrate of channel 1j requires an additional step, but if 5os (silicon on sapphire) (+-) is used, it will be 6 eas.

以上の如く、本発明は、従米果債化の要求を待ちながら
も、サーミスタを使用していた温度検出回路ケ温1更信
号の異なる2種類の抵抗金回−半導体基板上に形成する
ことにより、完全集積化温度検出回路を実現し良もので
、これにより小型化への要求の晶い電子時計に装、・u
を可能にし、高精度電子時計の提供に貝1吠することか
できた。
As described above, the present invention has been developed by forming two types of resistors with different temperature signals on a gold-semiconductor substrate, in order to replace the temperature detection circuit that used a thermistor, while waiting for the demand to become more flexible. , a fully integrated temperature detection circuit has been realized, which makes it possible to install it in electronic watches that are increasingly required to be miniaturized.
This made it possible to provide high-precision electronic clocks.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(は、本発明の温度検出回路の一実施例である。 第2図は、第1図の回路の温度−電圧!特性である。 第3図は、本発明の他の実施例となる温度検出回路であ
る。 第4図は、第3図の回路のa度−゛電圧特性である。 第5図は、本発明の他の実施例である。 化6図は、第5図の回路の温度−電圧特性である。。 以   上 出願人 株式会社 諏訪精工舎 代理人 弁理士最上  務
FIG. 1 (shows one embodiment of the temperature detection circuit of the present invention). FIG. 2 shows the temperature-voltage characteristics of the circuit of FIG. 1. FIG. 3 shows another embodiment of the present invention. FIG. 4 shows the a-degree-voltage characteristics of the circuit shown in FIG. 3. FIG. 5 shows another embodiment of the present invention. These are the temperature-voltage characteristics of the circuit shown in the figure.Applicant Suwa Seikosha Co., Ltd. Agent Patent Attorney Tsutomu Mogami

Claims (1)

【特許請求の範囲】[Claims] (]1 温度検出回路からの出力毎号に基づいて、基準
・、′8号発生源の温度−周波数特性?補償する電子’
I′i’ tl’ l’ζおいて、前記温度ノ次出回路
ケよ、異なる温ly係故全もつ抵抗群よりなり複数の分
圧点を有する1j71の分圧回路、前記第1の分圧回路
の複数の分圧点かLり〆0出力をゲート入力とする醸成
のC−MOSインバータ及び前3Q O”’ M OS
インバータの出力を温変信号Vζ変換する変換112+
届よりなることを特徴とする電子時計用温度検出回路。
(]1 Based on each output from the temperature detection circuit, the reference... '8 Temperature-frequency characteristics of the source? Compensating electrons'
I'i'tl'l'ζ, the temperature output circuit is a 1j71 voltage divider circuit which is made up of a group of resistors with different temperature coefficients and has a plurality of voltage dividing points; A C-MOS inverter and front 3Q O"' MOS that use multiple voltage division points of the pressure circuit as gate inputs and the low output and 0 outputs as gate inputs.
Conversion 112+ that converts the output of the inverter into a temperature change signal Vζ
A temperature detection circuit for an electronic watch, characterized by comprising:
JP5294884A 1984-03-19 1984-03-19 Temperature detecting circuit of electronic timepiece Granted JPS59182390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5294884A JPS59182390A (en) 1984-03-19 1984-03-19 Temperature detecting circuit of electronic timepiece

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5294884A JPS59182390A (en) 1984-03-19 1984-03-19 Temperature detecting circuit of electronic timepiece

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP51158587A Division JPS6020924B2 (en) 1976-12-28 1976-12-28 Temperature detection circuit for electronic watches

Publications (2)

Publication Number Publication Date
JPS59182390A true JPS59182390A (en) 1984-10-17
JPS6142205B2 JPS6142205B2 (en) 1986-09-19

Family

ID=12929096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5294884A Granted JPS59182390A (en) 1984-03-19 1984-03-19 Temperature detecting circuit of electronic timepiece

Country Status (1)

Country Link
JP (1) JPS59182390A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01110002U (en) * 1988-01-18 1989-07-25

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49110391A (en) * 1973-02-20 1974-10-21
JPS5162964A (en) * 1974-11-29 1976-05-31 Citizen Watch Co Ltd ONDOHOSHOSUISHOHATSUSHINKAIRO

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49110391A (en) * 1973-02-20 1974-10-21
JPS5162964A (en) * 1974-11-29 1976-05-31 Citizen Watch Co Ltd ONDOHOSHOSUISHOHATSUSHINKAIRO

Also Published As

Publication number Publication date
JPS6142205B2 (en) 1986-09-19

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