JPS59178744U

JPS59178744U - Display instruction circuit

Info

Publication number: JPS59178744U
Application number: JP5405284U
Authority: JP
Inventors: 木内　幸男; 宇敷　辰男; 伊東　俊紀
Original assignee: 富士通株式会社; 日本電信電話株式会社; 日本電気株式会社
Priority date: 1984-04-12
Filing date: 1984-04-12
Publication date: 1984-11-29

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of the drawing]

第１図は従来の表示指示回路の一例のブロック　、図、
第２図は第１図と異る従来回路の一例のブロック図、第
３図は本考案の一実施例のブロック図である。ＣＮＳ・・・保守パネル装置、ＣＣ・・・中央処理装置
、ＭＭ・・・主記憶装置、Ｌｌ、　Ｌ２〜Ｌｎ・・・表
示素子（ランプ）、ＲＥＧ・・・汎用レジスタ、ＣＬ・
・・制御線、ＩＬ・・・情報線、ＳＦＲ□〜５ＦＲ４・
・・シフトレジスタ、ＳＷ□〜ＳＷ４・・・スイッチ、
ＦＦ・・・クリップフロップ、ＡＧ、〜ＡＧ３・・・ア
ンドゲート、ＯＲ・・・オアゲート、Ｔ・・・タイマ（
パルス信号の周期的発生器）、ＲＯＴ・・・ロータリス
イッチ、ＥＮＣｌ、ＥＮＣ２・・・エンコーダ、ＯＧ・
・・割込み信号作成回路、ＣＫｏ、　ＣＫ１・・・転送
用クロック。FIG. 1 is a block diagram of an example of a conventional display instruction circuit.
FIG. 2 is a block diagram of an example of a conventional circuit different from FIG. 1, and FIG. 3 is a block diagram of an embodiment of the present invention. CNS...Maintenance panel device, CC...Central processing unit, MM...Main memory, Ll, L2~Ln...Display element (lamp), REG...General purpose register, CL/
...Control line, IL...Information line, SFR□~5FR4・
・・Shift register, SW□～SW4・・Switch,
FF... Clip flop, AG, ~AG3... AND gate, OR... OR gate, T... Timer (
periodic generator of pulse signals), ROT... rotary switch, ENCl, ENC2... encoder, OG...
...Interrupt signal generation circuit, CKo, CK1...Transfer clock.

Claims

[Scope of utility model registration request]

It is equipped with an information processing device and a maintenance panel device connected to the information processing device, and receives control information from the maintenance panel device including a command to display the contents of an internal display location and information specifying an internal display location where the content should be displayed. Upon receiving the control information, the information processing device serially sends back the contents of the designated internal display area to the maintenance panel device and stores them in a shift register, and the contents of this shift register are transmitted to the maintenance panel device. 1. A display instruction circuit characterized in that a display instruction for instructing the occurrence of a display process to be displayed on a display device is given by a pulse signal of a timer provided in a maintenance panel device and that periodically generates a pulse signal. −