JPS59176986A - Digital data transmission device - Google Patents

Abstract

PURPOSE:To attain spread of burst error widely with a simple hardware by applying interleave in the unit of blocks. CONSTITUTION:The interleave in the unit of blocks is attained by an interleave circuit 5 by taking matrix constitution arranging Wi-word in horizontal direction and 10-set of the Wi words in vertical direction as a unit, when one sample (8- bit) of a digital video signal is taken as 1 word. Further, a code length is taken as 5 words. The inverse conversion is performed in a de-interleave circuit 12. If a burst error over 5 consecutive blocks takes place due to dropout, the error is spread by the de-interleave circuit 12, and each set consisting of 5-word has only one error word and the error word is corrected by an error correcting circuit 13.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital data transmission device applied to a digital VTR that records and reproduces digital video signals using a rotating head.

"Background Art and its Problems" When transmitting digital data, interleaving is known in which the data is rearranged in order to reduce the effects of burst errors occurring on the transmission path. This interleaving is combined with an error correction code. In other words, if a code capable of correcting burst errors of length b is interleaved by distance d, burst errors up to length db can be corrected.

Conventional interleaving devices perform interleaving on a word-by-word basis so that multiple words included in a block of the same error correction/correction code are separated from each other.Due to hardware constraints, the interleaving distance d is limited.
There was a problem that it was not possible to increase the value of .

``Object of the Invention'' The object of the present invention is to provide a digital transmission device that can widely disperse burst errors using simple hardware.

``Summary of the Invention'' This invention comprises a plurality of symbols located at predetermined intervals in a digital data series including redundant data of error and correction codes, and forms one block in chronological order using this block as a unit. This is a digital data transmission device that performs interleaving to rearrange and transmit data.

"Embodiment" An embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of the code circuit of this embodiment. In FIG. 1, an analog video signal is supplied to an input terminal indicated by 1, and is converted by an A/D converter 2 into 8 bits per sample.

This digital video signal is input to one side of the multiplexer 3, and is also supplied to the parity generation circuit 4B. This parity generating circuit 4 generates the harness of the error correction code, and this parity is inputted to the other input of the multiplexer 3. At the output of the multiplexer 3, digital data with parity added appears.

This digital data is supplied to an interleave circuit 5, and its arrangement is changed to a different order from the original order. A rotary head (not shown) is connected to the output terminal 6 of the dinterleave circuit 5 via a recording amplifier, and the digital data subjected to error correction encoding and interleaving processing is transferred to the magnetic tape by the rotary head. recorded.

Digital data reproduced from the magnetic tape is supplied to an input terminal 11 of a decoding circuit shown in FIG. 2 via a reproduction amplifier (not shown). This manual terminal 11 is connected to an input terminal of a dinterleave circuit 12, and reproduced data is dinterleaved. Dinterleave performs rearrangement processing that is the reverse of the interleave circuit 5.
The reproduced data that has been dintered is sent to the error correction circuit 1.
3.

In the error correction circuits 1 and 3, the error correction code is decoded and correctable errors are corrected. Then, the digital video signal corrected by the error correction circuit 130 is converted into a D/A
The signal is supplied to the converter 14, converted into an analog video signal, and taken out to the output terminal 15. An error correction circuit may be provided at the next stage of the error correction circuit 13 to correct data that cannot be corrected.

Interleaving and gain interleaving in the embodiment of the present invention described above will be explained.

Assuming that one sample (8 points) of a digital video signal is one word, as shown in Figure 3, we have a matrix configuration of 25 words arranged horizontally and 10 of these 25 words arranged vertically (25x10). Interleave processing is performed as a unit.

Word Wi located in the first row (in the figure, only word number 1 is shown for simplicity), word Wi+25 . 3rd line, 4th line... words Wi + 50, Wi + 75 located in the 10th line, respectively.
. . . A block B1 is constituted by Wi+226, a total of 10 words. The interleaving circuit 5 performs interleaving in units of blocks. However, in one embodiment of the present invention, the code length is 5 words, and it is possible to correct an error in 1 word within these 5 words.

Interleaving is performed by extracting five blocks with six block numbers apart. That is, the (25×10) matrix configuration shown in FIG. 3 is converted to the (1'0×25) matrix configuration shown in FIG. 4, and each block in this FIG. 4 is recorded in order from the top.

First, block (B□, B7.B13.B□9+
B25) is taken out and the 11th block (B6.B
1□, 8□81 B24185) are taken out, and in the following order: (Btl, Bt□+ B23+84 + '81
G) + (B16+ B22+, B11 B9+
816) + CB21+'Bzr Bsr B1
4r B20 ) are taken out in five blocks at a time. Such interleaving can be performed by controlling the write address and read address of RAIA.

Further, the dinterleave circuit 12 performs the conversion from FIG. 4 to FIG. 3, which is the opposite of the above-described process.

Here, as shown by diagonal lines in FIG. 4, during recording and playback, due to dropout etc.
Consider the case where a burst error occurs over five consecutive blocks of 1 B191825. This burst error is dispersed by the dinterleave circuit 12 as shown by diagonal lines in FIG. In this embodiment, since the code length is 5 words, each set of 5 words contains only one error word, and the error correction circuit 13 corrects this error word.

``Application example'' For the sake of simplicity, the block length was set to 10 words, but
The block length may be made equal to the number of words for one line or T lines.

Furthermore, digital data may be double-encoded to further improve the error correction ability, such as with a product code. Furthermore, the interleaving process according to the present invention may be used in combination with the conventional interleaving process on a word-by-word basis.

"Effects of the Invention" According to this invention, since interleaving is performed on a block-by-block basis, burst errors can be widely dispersed by simple doware compared to the conventional interleaving on a word-by-word basis. . If this invention is applied to video data, it is possible to avoid problems such as error data existing between adjacent lines, making it difficult to correct the error data, or making the error data visible in the reproduced image. Can be done.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an encoding circuit in an embodiment of the invention, FIG. 2 is a block diagram of a decoding circuit in an embodiment of the invention, and FIGS. 3 and 4 are interleaving diagrams in an embodiment of the invention. and a route map used to explain Tinterive. 5...Interleave circuit, 12...Mountain...
...Dinterleave circuit. Agent Masato Sugiura

Claims (1)

[Claims] 1 by a plurality of symbols located at predetermined intervals of a digital data sequence containing redundant data of an error correction code.
A digital data transmission device configured to form blocks and perform ink 17-p to rearrange the chronological order in units of blocks for transmission.