JPS59174756U - PCM signal regenerator - Google Patents
PCM signal regeneratorInfo
- Publication number
- JPS59174756U JPS59174756U JP6931883U JP6931883U JPS59174756U JP S59174756 U JPS59174756 U JP S59174756U JP 6931883 U JP6931883 U JP 6931883U JP 6931883 U JP6931883 U JP 6931883U JP S59174756 U JPS59174756 U JP S59174756U
- Authority
- JP
- Japan
- Prior art keywords
- error detection
- pcm signal
- blocks
- word
- sampled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
- Error Detection And Correction (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はこの考案の対象であるＰＣＭ信号再生−装置と
これの入力を発生するＰＣＭ信号発生系の基本構成を示
すブロック図、第２図は従来の補正回路のブロック図、
第３図は従来の補正回路動作例を示す波形図、第４図は
この考案の一実施例による補正回路の構成を示すブロッ
ク図、第５図はこの考案の補正回路の動作例を示す波形
図である。
各図中同一部材には同一符号を付し、１０はＰＣＭ信号
再生装置、２８はデコーダ、３０は補正回路、３２はＤ
／Ａ変換器、３６及び３８はラッチ回路、４０は演算回
路、４２は信号抽出回路である。FIG. 1 is a block diagram showing the basic configuration of a PCM signal reproducing device and a PCM signal generation system that generates input to this device, which is the object of this invention, and FIG. 2 is a block diagram of a conventional correction circuit.
FIG. 3 is a waveform diagram showing an example of the operation of a conventional correction circuit, FIG. 4 is a block diagram showing the configuration of a correction circuit according to an embodiment of this invention, and FIG. 5 is a waveform diagram showing an example of operation of the correction circuit of this invention. It is a diagram. The same members in each figure are given the same reference numerals, 10 is a PCM signal reproducing device, 28 is a decoder, 30 is a correction circuit, and 32 is a D
/A converter, 36 and 38 are latch circuits, 40 is an arithmetic circuit, and 42 is a signal extraction circuit.
Claims (1)
Ｎは２以上の整数）のブロックに分割されて、各ブロッ
ク単位で符号化されたＰＣＭ信号を入力とし、もとのア
ナログ信号を再生する装置で、上記ＰＣＭ信号を各ブロ
ック単位で復号する復号手段と、この復号処理と同時に
上記ブロック単位で符号誤りを検出する誤り検出手段と
、復号されたＮ個のブロックから１個の標本化ワードを
得るとともに、上記誤り検出手段による誤り検出信号に
応じてその標本化ワードに補正を加える補正手段と、こ
の補正手段で得られた各標本化ワードをアナログ信号に
変換するＤ／Ａ変換手段とを備え、上記補正手段が、１
個の標本化ワードを構成するＮ個のブロックのうち、重
みの大きな所定のＬ個（ＬはＮより小さい１以上の整数
）のブロックについて、その中の１以上のブロックに上
記誤り検出手段で誤りが検出された場合に、その標本化
ワードに補正を加えるように構成されていることを特徴
とするＰＣＭ信号再生装置。Each A/D-converted multi-bit sampling word is N (
A decoding device that receives a PCM signal divided into blocks (N is an integer of 2 or more) and encoded in each block and reproduces the original analog signal, decoding the PCM signal in each block. means, an error detection means for detecting a code error in the block unit at the same time as the decoding process, and obtaining one sampled word from the N decoded blocks and responding to an error detection signal from the error detection means. and a D/A conversion means for converting each sampling word obtained by the correction means into an analog signal;
Of the N blocks constituting the N sampled words, one or more of the predetermined L blocks (L is an integer smaller than N and greater than or equal to N) with large weights is detected by the error detection means. A PCM signal reproducing device characterized in that, when an error is detected, correction is applied to the sampled word.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6931883U JPS59174756U (en) | 1983-05-10 | 1983-05-10 | PCM signal regenerator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6931883U JPS59174756U (en) | 1983-05-10 | 1983-05-10 | PCM signal regenerator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59174756U true JPS59174756U (en) | 1984-11-21 |
Family
ID=30199473
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6931883U Pending JPS59174756U (en) | 1983-05-10 | 1983-05-10 | PCM signal regenerator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59174756U (en) |
-
1983
- 1983-05-10 JP JP6931883U patent/JPS59174756U/en active Pending
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