JPS59174646U - Firmware debugging device - Google Patents

Firmware debugging device

Info

Publication number
JPS59174646U
JPS59174646U JP6746283U JP6746283U JPS59174646U JP S59174646 U JPS59174646 U JP S59174646U JP 6746283 U JP6746283 U JP 6746283U JP 6746283 U JP6746283 U JP 6746283U JP S59174646 U JPS59174646 U JP S59174646U
Authority
JP
Japan
Prior art keywords
firmware debugging
firmware
debugging device
debugged
adapter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6746283U
Other languages
Japanese (ja)
Inventor
修 山根
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP6746283U priority Critical patent/JPS59174646U/en
Publication of JPS59174646U publication Critical patent/JPS59174646U/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案のファームウェアデバッグ装置の一実施例を
示すブロック図である。 1・・・・・・被デバツグ装置、2・・・・・・ファー
ムウェアデバッグ用アダプタ、3・・・・・・表示装置
The figure is a block diagram showing an embodiment of the firmware debugging device of the present invention. 1... Device to be debugged, 2... Firmware debugging adapter, 3... Display device.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デバッグの対象となる被デバツグ装置に、ファームウェ
アデバッグ用アダプタを接続し、該ファームウェアデバ
ッグ用アダプタに表示装置を接続したファームウェアデ
バッグ装置において、該ファームウェアデバッグ装置に
あらかじめ指定した被デバツグ装置内のマイクロプロセ
ッサのレジスタ、入出力ポート、メモリ内容を自動的に
一括表示させることを特徴とするファームウェアデバッ
グ装置。
In a firmware debugging device in which a firmware debugging adapter is connected to a debugged device to be debugged, and a display device is connected to the firmware debugging adapter, a microprocessor in the debugged device specified in advance to the firmware debugging device is displayed. A firmware debugging device characterized by automatically displaying registers, input/output ports, and memory contents all at once.
JP6746283U 1983-05-06 1983-05-06 Firmware debugging device Pending JPS59174646U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6746283U JPS59174646U (en) 1983-05-06 1983-05-06 Firmware debugging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6746283U JPS59174646U (en) 1983-05-06 1983-05-06 Firmware debugging device

Publications (1)

Publication Number Publication Date
JPS59174646U true JPS59174646U (en) 1984-11-21

Family

ID=30197649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6746283U Pending JPS59174646U (en) 1983-05-06 1983-05-06 Firmware debugging device

Country Status (1)

Country Link
JP (1) JPS59174646U (en)

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