JPS59174041A - Signal transmitter for autobicycle - Google Patents

Abstract

PURPOSE:To improve the freedom degree of wiring and to reduce steering force by putting only one signal line into a wire harness and transmitting plural signals with multiplication. CONSTITUTION:A wire harness contains a common line 11, a power supply line 12 and a signal line 13, and a transmitting circuit 14T is connected to a receiving circuit 14R. An output terminal 27c of a transistor circuit 27 is turned on and off as a switch 23 is turned on and off. At the same time, an output terminal 28c of a transistor circuit 28 is turned on and off as a switch 24 is turned on and off. Thus the ON and OFF states of two independent switches 23 and 24 can be transmitted to output terminals 27c and 28c via lines 11-13.

Description

[Detailed Description of the Invention] This invention provides a direct number transmission for two-wheeled vehicles.・5
In addition, the information transmission device for self-help motorcycles has been designed to reduce the number of wire harnesses around the handlebars and tail lights.

As is well known, the two wheels are equipped with an oil pressure switch and a fuel sensor, which monitor each part of the body, and output signals from these switches. is connected to the lamps attached to the meter panel 2 through the wire harness 1 shown in FIG. emanate.

By the way, in the conventional signal transmission device, in order to transmit the output signals of n independent switch means (in this case, 1
If one 1δ wire and one common line are required, and one Kaigen line is added, a wire harness consisting of a total of n+2 lines is required to transmit the 0 type signal. In addition, in the lighting switch 6+, the switch is connected to the line 61, which is a direct load (because this connection draws a large current, a thick cartridge is required. , As the number of wire harnesses increases, the wire harness becomes thicker.
Jj (i- It was the end of the month.

In view of the above-mentioned circumstances, the invention of C provides a multiplier transmission system for motorcycles with the aim of increasing the freedom of wiring and reducing the amount of steering force. The present invention is characterized in that the number of signal lines included in the signal line is 1, and a plurality of signal lines are multiplexed and transmitted by this line.◇ Hereinafter, the implementation of the present invention will be explained based on the drawings.

Figure 8g2 is a circuit diagram showing the configuration of one embodiment of the present invention. In the figure, 11 is the common line, 12 is IJIi
(The 1+'- lines and 13 are signal lines, and the wires constitute the wire harness 1, and the transmitter circuit 14T to the left of the chain line XX in the figure (these 1. and 13 are arranged at the rear of the vehicle) is connected to the receiving circuit 14R on the right side of the chain line YY (these are connected to the lower part (built-in) of the meter panel 2).In other words, the left end of the common line 11 is connected to the battery 15 (first The right end is connected to the common end 16i of the receiving circuit 14, and the left end of the power supply line 12 is connected to the battery 15 via the fuse 17.
The right end is connected to the power source end 20 of the receiving line 141t via the main switch 18 and resistor 9. And thi + of $4420 and common end 16
This 1-discharge Zener diode 20 is connected between 1 and both ends.
The pressure is kept constant. On the other hand, one end of the signal line 13 is connected to the resistor 21.
The other ends of the signal line 22 are connected to the common line 11 (V) via switches 23 and 24E, respectively.The right end of the signal line 13 is connected to the output end of the constant current circuit 25.
On the signal side 13, there is a voltage V when switches 23 and 24 are both on, but when switch 23 is on and switch 24 is off (this voltage is V, but when switch 23 is off and switch 24 is on) When (this voltage is ■), switch 23.
When both 24 are off, voltages 'F and v4 are generated, and these voltages are set to increase sequentially as V, <V2<V, and <V4.Then, the voltages V and ~v4 are When the transistor circuits 27 and 2.8f are supplied, the input stage transistors 27a and 2 of the transistor circuits 27 and 28
8a, output stage transistors 27b and 28b have circuit constants such as on/off T6 as shown in Table 1G.

Table 1 In this case, the transistor 3o is the output stage transistor 27b.
is turned on when it is off, and acts in the direction of lowering the base 4 voltage of the input stage transistor 28a. Therefore, when the intraocular pressure is V, the input stage transistor 28a is turned off, but when the intraocular pressure increases further to 41, the transistor 28a is turned on again. In this way, the switch 23 is turned on/off (this protects the transistor IgJ path 27
The output end 27c of the switch 24 is turned on/off, and the switch 24 is turned on/off.
According to the off state, the output 128c of the transistor circuit 28 turns on/off. In this way, the three lines 11 to 13 can be used to turn on and off the two independent switches 23 and 24 through the output terminals 27c and 28Cf.

Note that the diodes 27d and 28d function as temperature compensation. Further, the constant current circuit 25 has a voltage V.

~Contributes to stabilizing V4 and reduces the effects of rough back and heat.

In the above embodiment, in the case where there are two switch means (I have explained this in detail, in general, the voltages V, , V, . . . , 2n are generated by these n independent switch means).
′ is generated, and these intraocular pressures are transmitted through one signal line, and the transmitted voltage is −V, , V2■2
By performing the discrimination using t' and 2fi comparators and decoding their outputs using a decoder Tn5, it is possible to obtain n on/off signals corresponding to the on/off states of n independent switch means.

Next, FIG. 3 is a circuit diagram showing the configuration of another embodiment of the present invention, in which n switches 31-1, 31-2 are used.
-31-n on/off i It is transmitted by PWM (Pulse Width Modulation) method. First, the chain line
In the left feed (fi circuit 30T (this fl is provided integrally with the handle), 32 is a latch circuit, which turns on/off the switches 31-1, 31-2...3l-II. It latches and outputs the states of komu, et al as a binary value NL. Also, 33 is an n-bit counter, which divides the clock pulse by 1/2L (the number will be explained later). The output pulse signal of the circuit 34 is counted and a count value N Cy- is outputted.The output value NL and the count value NC are compared by an AND gate group 35 and an AND gate 36, and when NL and NC match, No. e is output from the AND gate 36 to the coincidence 1. This coincidence (N No. C) is supplied to the monostable multi-by-break (hereinafter abbreviated as mono-multi) 37 and the AND gate 38.
12. The monomulti 37 is triggered by the rising edge of the coincidence signal e and outputs the sixth signal 37a which remains on for a certain period of time Ts.

Further, the AND gate 38 performs a logical product of the coincidence multiplier e and the pulse 1, and at the start of the logical product, the AND gate 38 performs a logical product of the coincidence multiplier e and the pulse 1.
- Reset and latch the on/off state of the switch 31. Also, the output old edge 37a of the monomulti 37
is supplied to the reset terminal of the counter 33 and the driver 39, and when it falls, the counter 33 is reset (this is inverted and amplified by the driver 391, and becomes the signal S, which is transmitted over the 1g line 31). Ru.

On the other hand, the receiving circuit 30R on the right side of the a-line YY (scary).

is located approximately in the center of the car body (1 & to the right of the source).

), 41 is the or gate, and the
and the (L-1)th bit AL- of the counter 44, which will be described later.
1 (fit No. 44b and or No. 1g and gate 4
2 and the inverter 43 )Km''T/)6 And, while the AND gate 42 supplies the AND signal of the OR signal and the clock pulse gate 6 to the input terminal of the counter 44,
The inverter 43 outputs the inverted signal 43a of the previous t+j OR signal.
Reset terminal of ra-counter 44 and latch circuit 4
This counter 44 is a 10L-bit counter that is reset by the signal 43a+ and counts the clock pulse bar supplied via the AND gate 42, and its count value NA latch circuit 45) as the upper n billatra output signal 44a)
I will supply this. The latch circuit 45 latches the signal 44a (!-) at the falling edge of the signal 43a, and the latched signal 11γw
n output terminals 45-1, 45-2...45-
Turn nf on/off. Note that the above-mentioned clock pulses G0 and G0' have the same period l1lG. It doesn't need to be synchronized. Also, the numbers are the period + f1 of the pulse signal G and the period T. Therefore, it is determined by the relationship of the following formula a9. I'm here.

L =IOg2T, /To(bit)・---(1)
Therefore, for example, when Ip, / T, == 8, l
,==3.O Next, an outline of the operation will be explained. First, the signal S has the configuration shown in FIG. In other words, signal S is start & sex 8T (
The output of the latch circuit 32 has a period T shown in FIG.
The length of switch is 1゛S, and the length of switch polarity SW is Ill
It is l1lS. When such (g number S is transmitted to the receiving port I430G via the 18 line 13, the counter 4
4 is reset at the rising edge of the start polarity 8T 1, first, while the switch engagement SW is being supplied (during the time T-Ts), a clock pulse of 96g is applied to the clock pulse l-, and then G is reset by the correction amount of the start polarity 8T. (Time Ts) Count clock pulses J. In this way, the period of the signal S is converted into the number of clock pulses OJ, and is output as a count direct NA shown in FIG. Furthermore, from equation (1), the frequency of the clock pulse bar is 2L of the frequency of pulse transmission.
Therefore, the current 1-1'JNA is 2L times the output 11*NL of the latch circuit 32. Then, the upper n bits (output ji44a) of the count value NA are latched by the latch circuit 45f, and the output 45-i of the latch circuit 45 is turned on/off in response to the on/off of the switch 31-i.

A specific example of operation will be described below with reference to the flowchart in FIG. This flowchart shows all the switches 31-
1, 31-2, 11-n or off state force 1, pronation (
B) (Assuming that the switch 31-2 is turned on at the time t shown here, the drawing has four lines, so Tr/To=2"
That is, for L=3, it is 6°. Also, the length of the start i property vs is TI/2 (this is set as 0).In such a case, when all the switches 31-1 to 31-n are off,
The output jf (NL of the latch circuit S2 is set to "0" (6th n (o)).

On the other hand, the counter 33 receives the clock pulse from the frequency divider 34 when the clock pulse is 0 ((c) in the same figure) r+/8 (= 1/2")
)) are counted sequentially. The same figure (times t and i shown in kana)
This count value 1'IC/I< [2n-I J rJs
[OJ fCffk conversion f6, value Nl, =, , NC=
1" OJ, and the AND gate 36 outputs a coincidence signal e (6 (c) in the same figure). As a result, the AND gate 38 becomes open (f) (the multi-function multi 37 is triggered and its output signal 37a is #1# becomes the scar and the signal S
is the start i sex 8T + this, (same figure (g), (force, (
)) When the pulse signal falls at time t2, the AND gate 38 joins and the latch circuit 32f
Since J is set and the output value NL - "2", the value NL →
NC occurs and the coincidence signal e falls. On the other hand, Monomulti 37
is around this time (i.e. from time 1 to I temple; use 1
As a result, the output 1 signal 373 falls, and when the signal S rises to the switch polarity f, the counter 33 is reset.Then, the counter 33 continues counting the pulses q31. However, when the count value NC becomes "2" and coincides with the output j11 N L at one temple time t and f, the coincidence signal e rises again to l'f and the monomulti 37 is triggered. From then on, 111 times. Recalling other works similar to the above, only the switch 31-2 remains on (while the period is 2'I'', the signal S is sent to the receiving circuit 3 through the No. 13
0) supplied to t.

On the other hand, in the receiving circuit 30LJ (・L11 temple clock t ~ 1
20) The first value of the counter 44 is set to rv'+. -1 bit A
When I, -1.chi., and L-3, the 1st bit Az (therefore, the signal 44b) always becomes the "0" signal, so that the output signal of the OR gate 41 becomes the "0# signal." This is because the signal 44b is the clock pulse signal J (Fig. 6(N)).
) to 4 (every time you count w Ow~μm''→fo'
0) Length clock pulse ρ. '41 Solid length Kusunawara 4To=T
.

For /2), C is a force 1, and while the start polarity s'r is applied, the signal 44b also becomes 0''.Thus, the output signal of the OR gate 41 is When the switch polarity 8W is supplied at 11 t, it becomes 1 again.
1# signal. As a result, the output of the inverter 43 (
The g number 43a becomes the 6th (shi) (wo) (as shown here) (this short time becomes 1i:1wl'' (it) and at its fall, the latch circuit 451 resets the count before ω (ti N A 6
Tomo Latsuchisu (this counter 44 reset "9-
6 Then, the count of the lock pulse bar at time t, ~t, that is, the switch polarity sw is added to the OR gate 41 is counted, and at time t,
Is the count value NA 112J (rl 1UOJ)? !
: Becomes (Qo in the same figure). When , the signal of the lower 3rd bit is 4
Since 4b is the #11 signal, the count is a straight number 44b.
75f'Q''f, M number (continues until the count value NA reaches "16". Then, slightly before time t4, when the count value NA reaches 116J+, the number is increased as before. The signal 43a becomes 31#, and the clock t
4f falls to 0#.

This (therefore, the upper n bits of count +rj [t
5 (the counter 44 is reset. In this way, the switch 31-2 is turned on, 1tjl).
(The strict descendant switch 31-2 is turned off, its state is latched in the latch circuit 32, and the reception is transmitted in a compressed manner.
The output 45-2 of the latch circuit 45 is kept in the on state until it is latched by the latch circuit 45 (FIG. 6 υ)).

In this embodiment, as shown in FIG. Only 100 s' with the period ゛r mentioned above
It is also possible to use a method of transmitting a signal ('1'' signal) (see No. 7).

Also, when the signal 44b is #1#, the L-1st bit and below are raised by 9 steps, and when it is °0'', the 4L-1st bit and below are truncated. As shown in the figure, even if the signal S is distorted, D, (the correct waveform is indicated by a broken line), the correct count value NA can be obtained, thereby providing a noise-resistant transmission device. If possible, transmit and receive clock pulses lo and lo'f.
It becomes possible to make it independent.

In this way, according to the above embodiment, many switch signals can be transmitted using only one signal line.Furthermore, it is low cost because it can be implemented with a simple circuit centered on a counter. It is easy to increase or decrease the number of switches (this can be done, giving you a great degree of freedom in design).

Next, the circuit shown in FIG. 9 will be explained. This circuit attempts to transmit on/off information of four switches through four lines (two of which are signal lines). Figure 2
When the switch 51-1.ra is turned on, the output voltage vI of the battery 15 is changed to the voltage vI of the battery 15. Trap circuit 52-1. The lamp 53-1 is turned on via the signal line 13-1 and the trap circuit 52-3. Also, the switch 51-2
When is on, the lamp 53-2 is lit in the same way as above.

Next, when the switch 51-3 is on, the output of the low frequency oscillator (hereinafter referred to as OSC) 55 is the voltage V, which is the switch 51-3. the capacitor 56-1. the signal generator 13-1. Lamp 53- through switch unit 57-11, 3.-
Turn on 3. At this time, the voltage V2 is the trap circuit 52-
1, the switch 51-1 is stopped by 52-3.
．． The lamp 53-1 (this is never supplied. Also, when the switch 51-1 is also on, the 1g No. 13-1 is supplied with ゛(6; pressure ■I (DC), ■.

(alternating current) is superimposed, and the paper pressure V causes the lamp 53-1 to
The voltage V turns on each of the lamps 53-3 and 53-3.The circuit diagram of the switch unit 57-1 (57-2) is shown in FIG.
The FEV that has passed through a is applied to the transistor circuit 57d via the voltage doubler rectifier circuit 57b and the smoothing circuit 57c, turning on the relay 57e.
The kff point 57f of 7e is turned on, and the voltage V is supplied to the output terminal.
It is most effective if the center frequencies of 52-4 and bandpass filter 57a match the output frequency f of 08C55. Next, when the switch 51-4 is turned on, the lamp 53-4 is turned on in the same manner as described above.

In this way (according to this circuit), there is only one signal line (the lamp is turned on/off by superimposing alternating current and direct current), so
It is possible to reduce the number of wires in the wiring harness.

In other words, in order to turn four lamps on and off independently, a total of five lines were required: one valley switch, one koto wire, and one common line, but in the above example, One signal line and one common line for each pair of switches
All you need is a book and one power line (C) and four lines. Furthermore, to independently turn on/off a 2n 11iA lamp, conventionally it was safe to use (2n+1) lines, but by applying the above circuit, (n+2) lines are sufficient, and (n- 1) Easy wiring harness layout for two-wheeled vehicles by tying these 9 wires together.
Effects such as a reduction in pressure drop along a certain line ridge (because a thick ridge line can be used for one cycle) can be obtained.

Next (Figure 11 (Circuit shown here) ◆ Let's explain in detail. This circuit is for the vehicle body of the private J motorcycle. (exchange of signals between them):!: A pair of microcomputers (hereinafter abbreviated as CPU) connected by two signal lines.

FIG. 11 (here, reference numerals 61 and 62 are CPUs, and as shown in FIG.
2 is located at the rear of the vehicle body frame (each is placed in the rear part of the vehicle body frame), and between the CPUs 61 and 62 there are two signal lines 63a and 63b.
The cables 63a and 63b form a wire harness/if cable.

In Figure 11, 65 is a stop switch.

66 is a position switch, 67 is a turn signal switch, a stop switch 65r, a lower stop lamp 65b7' on the shallow part of the car body, a switch for decrementing i points, and a position switch 66 is a position lamp 66 on the pU part of the car body.
The blinker switch 67 is a switch that blinks the left blinker lamp 67a and the tail lamp 66b.
) L blinks, and when switched to 10 points R1t;g, the right front blinker lamp 67aR, [and rear blinker lamp 57bi also blink. Also, the rear blinker lamp 67b, t, or 57b
When it is disconnected, the blinker driver 68a
61, and the front blinker lamp 67aL or 67bFL is turned on in response to operation of the blinker switch 67 to the off position. And valley switch 65-6
7 output signal S, -+ 84 is the signal m from cpu61
63 a to the CPU 62, and the CPU 62
is the driver 69-1 to 69-6 based on the signals 81 to S4.
9-4, and the lamps 65b, 66L),
67bL, 67bl (, is turned on/off. At this time, the disconnection sensor 7O-IQ7o-4 inserted between the driver 69 and each lamp checks whether there is a disconnection in each lamp. For example, the driver 69 -1 is in operation, if the 1 disconnection sensor 70-1 is not turned on and the CPU 62+ ground signal ('0' signal) is not supplied, it is determined that the lamp 65b is on the VJf line, and 6, etc.

CI) u62 also includes the disconnection sensors 70-1 to 70.
-l supplied from -4! , IT group signal 8,1~F1++
In addition, oil blessing sui chia 1. Neutral switch 72. Air suspension pressure switch 73. Battery fluid level sensor 74. Output signals '15 to 8B of each switch means of the radiator level switch 75
8. A signal obtained by converting the output signals of each detector of 1g and fuel gauge 76° thermosensor 77 into the number of pulses by V/F converter (voltage/frequency converter) 78. . , S21, a total of 11 E numbers are supplied. Then, these signals S1+~8 tg 1I-=l are transmitted from the CPU 62 to the CPU 61 via the signal line 63br, and the CPU 6
1 corresponds to this signal 8, -@ to l, so the stop lamp disconnection indicator 80-1 and the tail lamp disconnection indicator 80-2. Left tII:I blinker lamp rr line indicator 80-3. Right turn 11 blinker lamp 8.0
-4. Oil pressure indicator 80-5. Neutral indicator 80-6. Air suspension indicator 80-7° Battery fluid level indicator 80
-8. Radiator level indicator 80-9 r, r
Flashing. Further, signals 520-821 are also transmitted to the CPU 61 through the signal line 63b, and the CPU 51 receives these 1
820-S21 via the F/V converter 81/fuel meter 82. The temp meters 83 are each driven and controlled.

In such a configuration, as shown in the waveform diagram of signals 81 to S4 (Fig.
2f is sent. This serial signal Sa is the discrimination signal D F
j and each serial number 81 to 84) 8: Serial (This is an arrayed signal. When the serial number 8a is transmitted to the CPU 62f, the CPU 62 converts it into serial and parallel data and sends it to the valley driver 69-
1 to 69-4 are turned on/off, and the lamps 65b, 66b,
Turns 67bL and 67bL on/off. Next, Ih No. 8
．． 1 to S□ are also converted to the serial signal sb shown in the waveform diagram in Figure 13 (0) in the same way as above and sent to the CPU 61 via the signal line 63b. Control each indicator that is converted.

At this time, the signal S10 v S21 is converted into a voltage by the F/■ converter 81, and this voltage is sent to each meter 82, 83.
◇ Next, FIG. 14 is a flowchart showing the operation of the CPU 61 described above, and shows the process of encoding the serial signal 8a and decoding the serial signal 8b. Since these processes are self-evident, the explanation will be omitted.

As explained above, the present invention reduces the number of signal lines included in one wire harness and multiplexes and transmits a plurality of signals using the signal lines, thereby simplifying the layout of the wire harness. Benefits that can be achieved. Furthermore, since it is possible to use a thick electric wire for the signal line, it is also possible to achieve an @ wave of the pressure drop between the two sections.

[Brief explanation of the drawing]

Fig. 1 shows a wire harness l stretched on a motorcycle; FIG. 4 is a circuit diagram showing the configuration of the example; FIG. 4 is a diagram showing the configuration of signals 80) in the same example; FIG. r and latch circuit 45
Figure 6 is an example of the operation of the same embodiment, and g7 i'kl is a waveform diagram of the signal S'. The first step to explain round-down counting is the counter 44 in Figure 8 (b).
Figure 9 is a circuit diagram showing the configuration of another inertial transmission device g, and Figure 1O is a diagram for explaining the round-up carantra. A circuit diagram showing the configuration of the switch unit 57, which is to be changed once. Section 11 is a block diagram showing the configuration of the signal transmission device [W] by Sarago et al., and FIG. 12 shows the relationship between the device and the vehicle. The side view shown in Fig. 13 is the CPU 61.6
21■) (A diagram showing the configuration of the serial signals 8a and Sb that are transmitted.
3 is a flowchart showing the operation of FIG. Engineering 3...Signal line, 14T...Transmission circuit,
14R...Reception circuit, 23.24...Switch (switch means), 30T...Transmission (g circuit, a
Oa: self-receiving circuit, 31-1 to 31-n: switch (switch means). Applicant Honda Motor Co., Ltd.

Claims (1)

[Scope of Claims] n++a sui-sochi means that independently turn on and off;
# of the 21'I sinus formed by the stiff switch means;
A transmitter circuit that outputs the corresponding signal No. 16, and 61 signal lines, one end of which transmits the output signal from the output terminal of the previous δ self-transmit 6a circuit (connected to the above-mentioned transmitter circuit Q), Input end is front W
The output signal of the transmitting circuit connected and transmitted to the other end of the IN connection is connected to the other end of the inlet. Off support (n independent on/off symbols)C
A signal transmission value of a self-help two-wheeled vehicle characterized by having a 6 receiving circuit that passes through the DAT (6″).