JPS59172733A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS59172733A
JPS59172733A JP58047549A JP4754983A JPS59172733A JP S59172733 A JPS59172733 A JP S59172733A JP 58047549 A JP58047549 A JP 58047549A JP 4754983 A JP4754983 A JP 4754983A JP S59172733 A JPS59172733 A JP S59172733A
Authority
JP
Japan
Prior art keywords
bonding
wire
laser beam
semiconductor chip
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58047549A
Other languages
Japanese (ja)
Inventor
Hiroyoshi Murata
浩義 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP58047549A priority Critical patent/JPS59172733A/en
Publication of JPS59172733A publication Critical patent/JPS59172733A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4845—Details of ball bonds
    • H01L2224/48451—Shape
    • H01L2224/48453—Shape of the interface with the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H01L2224/85048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/8521—Applying energy for connecting with energy being in the form of electromagnetic radiation
    • H01L2224/85214—Applying energy for connecting with energy being in the form of electromagnetic radiation using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Abstract

PURPOSE:To join a bonding wire and a bonding pad uniformly with a small pressing force by joining them through irradiation of laser beam. CONSTITUTION:A bonding wire 3 consisting, for example, of Au wire which is heated and forming a nail head 3a is pressed to a bonding pad 2 on a semiconductor chip 1 which is preheated to a temperature of about 100 deg.C. Under this condition, the nail head 3a of bonding wire 3 is irradiated by the laser beam 4. With such irradiation of laser beam 4, the bonding wire 3 and bonding pad 2 are locally and momentarily heated and melted and they are integrated by the eutectic bonding 2a.

Description

【発明の詳細な説明】 ［発明の技術分野］ 本発明はワイヤボンディング方式を用いる半導体装置の
製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of manufacturing a semiconductor device using a wire bonding method.

［発明の技術的背景］ 従来、半導体装置のワイヤボンディング法としては、一
般に半導体チップを約１５０〜３００℃に加熱し°Ｃ１
この半導体チップ上のポンディングパッドにボンディン
グワイヤを押付けて両者を固相灰石により接合させる熱
圧着法が用いられている。またこの時半導体チップの加
熱温度を低くするためキャピラリに超音波振動を加えつ
つボンディングワイヤをボンディングバットに加熱圧着
させる超音波ボンディング法も知られＣいる。[Technical Background of the Invention] Conventionally, wire bonding methods for semiconductor devices generally involve heating a semiconductor chip to about 150 to 300°C.
A thermocompression bonding method is used in which a bonding wire is pressed against a bonding pad on the semiconductor chip and the two are bonded using solid-phase ash. Also known is an ultrasonic bonding method in which a bonding wire is heated and pressed onto a bonding bat while applying ultrasonic vibration to a capillary in order to lower the heating temperature of the semiconductor chip.

を背景技術の問題点１ しかしながら、熱圧着法においては、半導体チップの予
熱の際に半導体チップに過大な熱的ストレスが与えられ
、かつボンディングワイヤをポンディングパッドに押付
ける際に、その押圧力で半導体チップを破損するおそれ
があった。また超音波ボンディング法においては、キャ
ピラリに加えられる超音波振動が一方向であるため、ボ
ンディングの方向により若干接合強度が異ってくるとい
う難点があった。Background Art Problem 1 However, in the thermocompression bonding method, excessive thermal stress is applied to the semiconductor chip when preheating the semiconductor chip, and when pressing the bonding wire against the bonding pad, the pressing force is There was a risk of damaging the semiconductor chip. Furthermore, in the ultrasonic bonding method, since the ultrasonic vibrations applied to the capillary are unidirectional, there is a drawback that the bonding strength varies slightly depending on the bonding direction.

［発明の目的］ 本発明はこのような欠点を解決するためになされたもの
で、ワイヤボンディング時に半導体チップに加わる熱的
あるいは機械的ストレスの減少を図り、均一な接合強度
を有する半導体装置を歩留りよく製造可能な半導体の製
造！！ｉ置の製造方法を提供することを目的とする。[Purpose of the Invention] The present invention has been made to solve these drawbacks, and aims to reduce the thermal or mechanical stress applied to semiconductor chips during wire bonding, and to increase the yield of semiconductor devices with uniform bonding strength. Manufacture of well-manufacturable semiconductors! ! The purpose of the present invention is to provide a method for manufacturing an i-position.

［発明の概要コ すなわち本発明の半導体製造具向は、ワイヤボンディン
グ方式により半導体チップ上のポンディングパッドにボ
ンディングワイＡ７を接続するにあたり、ポンディング
パッドとボンディングワイヤの少なくとも一方をレーザ
ー光線の照射により加熱しＣ接続することを特徴としＣ
いる。[Summary of the Invention] In other words, the semiconductor manufacturing device of the present invention heats at least one of the bonding pad and the bonding wire by irradiation with a laser beam when connecting the bonding wire A7 to the bonding pad on the semiconductor chip by the wire bonding method. C
There is.

［発明の実施例コ 以下本発明の詳細を図面に示ター実施例について説明す
る。[Embodiments of the Invention] The details of the present invention will be described below with reference to the drawings.

第１図、第２図および第３図は本発明の一実施例を説明
するための拡大断面図である。1, 2, and 3 are enlarged sectional views for explaining one embodiment of the present invention.

この実施例においては、まず半導体チップ１が約１００
℃の温度に予熱され、次いで第１図に示すように、半導
体チップ１上のポンディングパッド２に図示を省略した
キャピラリにより、加熱されてネイルヘッド３ａの形成
された例えばＡＵ線からなるボンディングワイヤ３を押
付ける。この押圧力は、従来法において加えていた押圧
力の約２分の１程度ｒよい。こうしてポンディングパッ
ド２にボンディングワイヤ３を押付けながら、第２図に
示すように図示を省略したレーザー装置を用いＣレーザ
ー光線４をボンディングワイヤ３のネイルヘッド３ａに
照射する。このレーザー光線４の照射によりボンディン
グワイ１７３およびポンディングパッド２は瞬間的かつ
局部的に加熱溶解され、第３図に示すように一体に共晶
接合される。In this embodiment, first, the semiconductor chip 1 is about 100
℃, and then, as shown in FIG. 1, a bonding wire made of, for example, an AU wire is heated by a capillary (not shown) to a bonding pad 2 on a semiconductor chip 1 to form a nail head 3a. Press 3. This pressing force is about half the pressing force applied in the conventional method. While pressing the bonding wire 3 against the bonding pad 2 in this manner, the nail head 3a of the bonding wire 3 is irradiated with a C laser beam 4 using a laser device (not shown) as shown in FIG. By irradiating the laser beam 4, the bonding wire 173 and the bonding pad 2 are instantaneously and locally heated and melted, and are eutectic bonded together as shown in FIG.

２ａは共晶部分を示している。2a shows the eutectic part.

第２図ないし第３図と共通する部分に同一符号を付した
第４図および第５図は本発明の他の実施例を説明するた
めの拡大断面図である。FIGS. 4 and 5, in which parts common to FIGS. 2 and 3 are given the same reference numerals, are enlarged sectional views for explaining other embodiments of the present invention.

この実施例においＣは、まず第４図に示すように、半導
体チップ１は予熱されずそのポンディングパッド２の表
面部分にレーザー光線４が照射されてその熱によっ（ポ
ンディングパッド２の照射部分が瞬間的かつ局部的に溶
融もしくは軟化される。次いでそこに図示を省略したキ
ュヤビラリにより、加熱してネイルヘッド３ａの形成さ
れたホンディングワイヤ７３が押付けられてボンディン
グワイヤ３とポンディングパッド２とが第５図に示づよ
うに共晶接合される。なお、この実施例にＪ３いてもボ
ンディングワイヤ３をポンディングパッド２上に押付け
る押圧力は従来の１／２程度とすることかで゛きる。な
お、以上の実施例では、レーザー光線をボンディングワ
イヤに照射する例と半導体チップのポンディングパッド
に照射する例についで説明したか、本発明はかがる実施
例に限定されるべきのちのではなく、両者を併用７るこ
とも可能で゛ある。またポンディングパッドにレーザー
光線を照射する場合に半導体チップを予熱Ｊるようにし
てもよい。勿論この場合予熱温度は従来法におけるそれ
よりも低い温度で充分Ｃ′ある。In this embodiment, as shown in FIG. 4, the semiconductor chip 1 is not preheated, but the surface portion of the bonding pad 2 is irradiated with a laser beam 4, and by the heat (the irradiated portion of the bonding pad 2 is instantaneously and locally melted or softened.Then, a curing unit (not shown) heats the bonding wire 73, on which the nail head 3a is formed, and presses the bonding wire 3 and the bonding pad 2. are eutectic bonded as shown in Fig. 5. Even if J3 is used in this embodiment, the pressing force for pressing the bonding wire 3 onto the bonding pad 2 may be approximately 1/2 that of the conventional one. Note that in the above embodiments, an example in which a bonding wire is irradiated with a laser beam and an example in which a bonding pad of a semiconductor chip is irradiated with a laser beam are explained, but the present invention should be limited to these embodiments. Instead, it is possible to use both in combination 7.Also, the semiconductor chip may be preheated when the bonding pad is irradiated with a laser beam.Of course, in this case, the preheating temperature is higher than that in the conventional method. There is also sufficient C' at low temperature.

［発明の効果］ 以上述べたように本発明の方法によれば、半導体チップ
の予熱温度を従来法より低くし、もしくは予熱を省略す
ることができ、半導体チップに加わる熱的ストレスを著
しく軽減することがＣきる。[Effects of the Invention] As described above, according to the method of the present invention, the preheating temperature of the semiconductor chip can be lowered than that of the conventional method, or preheating can be omitted, and the thermal stress applied to the semiconductor chip can be significantly reduced. Things can be done.

また、レーザー光線を照射してボンディングワイヤとボ
ンティングバッドとを接合するので、従来法に比べで小
さい押圧力でかつ均一に両者を接合することができる。Furthermore, since the bonding wire and the bonding pad are bonded by irradiating the laser beam, it is possible to bond them uniformly with a smaller pressing force than in the conventional method.

これによってワイヤボンディング作業時半導体チップに
加わる力学的ストレスも低減することができる。This can also reduce the mechanical stress applied to the semiconductor chip during wire bonding work.

したがって本発明によれば、半導体装置の製造時におけ
る歩留りが一段と向上させることができる。Therefore, according to the present invention, the yield during manufacturing of semiconductor devices can be further improved.

【図面の簡単な説明】[Brief explanation of drawings]

第１図、第２図および第３図は本発明の一実施例を説明
するための拡大横断面図、第４図および第５図は本発明
の詳細な説明するための拡大断面図である。 １・・・・・・・・・・・・半導体チップ２・・・・・
・・・・・・・ポンディングパッド２ａ・・・・・・・
・・共晶部分 ３・・・・・・・・・・・・ボンデイングワイＶ３ａ・
・・・・・・・・ネイルヘッド ４・・・・・・・・・・・・レーザー光線代理人弁理士
　　　須　山　佐　− 第１図　　　第２図 第３図FIGS. 1, 2, and 3 are enlarged cross-sectional views for explaining one embodiment of the present invention, and FIGS. 4 and 5 are enlarged cross-sectional views for explaining the present invention in detail. . 1... Semiconductor chip 2...
......Ponding pad 2a...
・・Eutectoid part 3・・・・・・・・・Bonding Y V3a・
・・・・・・・・・Nailhead 4・・・・・・・・・Laser beam agent Patent attorney Sa Suyama - Figure 1 Figure 2 Figure 3

Claims (3)

【特許請求の範囲】[Claims] （１）ワイヤボンディング方式により半導体チップ上の
ポンディングパッドにボンディングワイヤを接続するに
あたり、ポンディングパッドとボンディングワイヤの少
なくとも−ｈをレーザー光線の照射により加熱しＣ接続
することを特徴とする半導体装Ｈの製造方法。(1) When connecting a bonding wire to a bonding pad on a semiconductor chip using a wire bonding method, at least -h of the bonding pad and the bonding wire are heated by laser beam irradiation to form a C connection. manufacturing method. （２）半導体チップのホンディングパッドにボンディン
グワイヤを押付（プつつ、レーザー光線を前記ボンディ
ングワイヤの接合部に照射しＣ両者を接続することを特
徴とする特許請求の範囲第１項記載の半導体装置の製造
方法。(2) A semiconductor device according to claim 1, characterized in that, while pressing a bonding wire against a bonding pad of a semiconductor chip, a laser beam is irradiated to a bonding portion of the bonding wire to connect both. manufacturing method. （３）予熱しｌ〔半導体チップのポンディングパッドに
ボンディングワイヤを押付ける直前に前記ポンディング
パッドの接合部にレーザー光線を照射して端部を溶解さ
せることを特徴とする特許請求の範囲第１項記載の半導
体装置の製、遣方法。(3) Preheating [Immediately before pressing the bonding wire against the bonding pad of the semiconductor chip, the bonding portion of the bonding pad is irradiated with a laser beam to melt the end portion. Methods for manufacturing and using the semiconductor device described in Section 1.
JP58047549A 1983-03-22 1983-03-22 Manufacture of semiconductor device Pending JPS59172733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58047549A JPS59172733A (en) 1983-03-22 1983-03-22 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58047549A JPS59172733A (en) 1983-03-22 1983-03-22 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS59172733A true JPS59172733A (en) 1984-09-29

Family

ID=12778231

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58047549A Pending JPS59172733A (en) 1983-03-22 1983-03-22 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS59172733A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5565443A (en) * 1978-11-10 1980-05-16 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS58159340A (en) * 1982-03-17 1983-09-21 Fujitsu Ltd Wire bonding method
JPS58186943A (en) * 1982-04-26 1983-11-01 Nec Corp Manufacture of semiconductor device
JPS59148344A (en) * 1983-02-15 1984-08-25 Nec Corp Wiring method for circuit element

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5565443A (en) * 1978-11-10 1980-05-16 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS58159340A (en) * 1982-03-17 1983-09-21 Fujitsu Ltd Wire bonding method
JPS58186943A (en) * 1982-04-26 1983-11-01 Nec Corp Manufacture of semiconductor device
JPS59148344A (en) * 1983-02-15 1984-08-25 Nec Corp Wiring method for circuit element

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