JP3239762B2 - Bonding method of work with bump - Google Patents
Bonding method of work with bumpInfo
- Publication number
- JP3239762B2 JP3239762B2 JP17761796A JP17761796A JP3239762B2 JP 3239762 B2 JP3239762 B2 JP 3239762B2 JP 17761796 A JP17761796 A JP 17761796A JP 17761796 A JP17761796 A JP 17761796A JP 3239762 B2 JP3239762 B2 JP 3239762B2
- Authority
- JP
- Japan
- Prior art keywords
- work
- bumps
- anisotropic conductive
- conductive tape
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、バンプ付きワーク
を異方性導電テープを介してワークにボンディングする
バンプ付きワークのボンディング方法に関するものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for bonding a work with bumps, which bonds the work with bumps to the work via an anisotropic conductive tape.
【０００２】[0002]
【従来の技術】バンプ付きチップやバンプ付き基板など
のバンプ付きワークを基板などのワークに実装する方法
として、異方性導電テープ（以下、ＡＣＦという）を用
いる方法が知られている。以下、ＡＣＦを用いた従来の
バンプ付きワークのボンディング方法について説明す
る。2. Description of the Related Art As a method for mounting a work with a bump such as a chip with a bump or a substrate with a bump on a work such as a substrate, a method using an anisotropic conductive tape (hereinafter, referred to as ACF) is known. Hereinafter, a conventional method of bonding a work with a bump using the ACF will be described.
【０００３】図８は、従来のバンプ付きチップを基板に
ボンディングした実装構造の部分断面図である。基板１
の上面にはパッド２が形成されている。またバンプ付き
チップ３の下面にはバンプ４が突設されている。基板１
の上面にＡＣＦ５を貼着し、その上からバンプ付きチッ
プ３を熱圧着ツール６で押し付けることにより、バンプ
付きチップ３を基板１にボンディングするようになって
いる。ＡＣＦ５は樹脂から成っており、これを１７０°
Ｃ程度に加熱することによりバンプ付きチップ３を基板
１にボンディングする。FIG. 8 is a partial sectional view of a conventional mounting structure in which a chip with bumps is bonded to a substrate. Substrate 1
Pad 2 is formed on the upper surface of. A bump 4 is provided on the lower surface of the bumped chip 3. Substrate 1
A bump 5 is bonded to the substrate 1 by attaching an ACF 5 to the upper surface of the substrate 1 and pressing the chip 3 with the bump with a thermocompression bonding tool 6 from above. ACF5 is made of resin and is
The chip 3 with bumps is bonded to the substrate 1 by heating to about C.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら上記従来
の方法では、ＡＣＦ５の表面に空隙（ボイド）７が発生
しやすいものであった。この空隙７は、バンプ付きチッ
プ３を基板１に接着するボンディング力を低下させ、ま
たパッド２やバンプ４の表面を酸化腐食させる。またバ
ンプ付きチップ３が実装された基板１を電子機器に組み
込んでバンプ付きチップ３を駆動させると、バンプ付き
チップ３は内部抵抗により発熱するが、この発熱により
空隙７内のエアが加熱されて膨張し、その結果、バンプ
付きチップ３を基板１から剥離させたり、あるいはバン
プ付きチップ３を破壊するなどの問題点を生じる。However, in the above-described conventional method, voids (voids) 7 are easily generated on the surface of the ACF 5. The gap 7 reduces the bonding force for bonding the bumped chip 3 to the substrate 1 and causes the surfaces of the pads 2 and the bumps 4 to oxidize and corrode. Also, when the substrate 1 on which the bumped chip 3 is mounted is incorporated into an electronic device and the bumped chip 3 is driven, the bumped chip 3 generates heat due to internal resistance. As a result, the bumped chip 3 is peeled off from the substrate 1 or the bumped chip 3 is broken.
【０００５】したがって本発明は、空隙（ボイド）の発
生を解消できるバンプ付きワークのボンディング方法を
提供することを目的とする。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method for bonding a work having bumps, which can eliminate the generation of voids.
【０００６】[0006]
【課題を解決するための手段】請求項１の発明は、ワー
クの表面に貼着される異方性導電テープの表面を加熱手
段により加熱することにより異方性導電テープの表面を
軟化させる工程と、異方性導電テープの軟化した表面を
ワークの表面に押し付けて貼着する工程と、バンプ付き
ワークを異方性導電テープに押し付けてバンプをワーク
のパッド上に搭載し、熱圧着ツールを前記バンプ付きワ
ークに押し付け、この熱圧着ツールからの伝熱により前
記異方性導電テープを軟化・流動化させ、更に伝熱によ
る加熱を継続して前記異方性導電テープを硬化させてボ
ンディングする工程とからバンプ付きワークのボンディ
ング方法を構成した。According to the first aspect of the present invention, the surface of the anisotropic conductive tape adhered to the surface of the work is heated by a heating means so that the surface of the anisotropic conductive tape is heated.
Softening , pressing the softened surface of the anisotropic conductive tape against the surface of the work, and attaching the work; pressing the work with bumps against the anisotropic conductive tape, mounting the bumps on the work pads , Connect the crimping tool to the bumped
The heat from the thermocompression bonding tool
The anisotropic conductive tape is softened and fluidized,
And a step of curing and bonding the anisotropic conductive tape while continuing heating to form a bonding method for a work with bumps.
【０００７】また請求項３の発明は、ワークの表面に貼
着された異方性導電テープの表面を加熱手段により加熱
することにより異方性導電テープの表面を軟化させる工
程と、バンプ付きワークを異方性導電テープに押し付け
てバンプをワークのパッド上に搭載し、熱圧着ツールを
前記バンプ付きワークに押し付け、この熱圧着ツールか
らの伝熱により前記異方性導電テープを軟化・流動化さ
せ、更に伝熱による加熱を継続して前記異方性導電テー
プを硬化させてボンディングする工程とからバンプ付き
ワークのボンディング方法を構成した。The invention according to claim 3 is a step of softening the surface of the anisotropic conductive tape by heating the surface of the anisotropic conductive tape attached to the surface of the work by a heating means. Press the work with bumps against the anisotropic conductive tape, mount the bumps on the work pads, and use the thermocompression bonding tool.
Press against the work with bumps
The heat transfer softens and fluidizes the anisotropic conductive tape.
The heating by heat transfer is continued to continue the anisotropic conductive tape.
The method for bonding the work with bumps was constituted by the steps of curing and bonding the bumps.
【０００８】[0008]
【発明の実施の形態】本発明によれば、異方性導電テー
プ（ＡＣＦ）の表面を加熱することにより、ＡＣＦの貼
着面を十分に軟化・流動化させ、空隙の発生を解消でき
る。According to the present invention, by heating the surface of the anisotropic conductive tape (ACF), the surface to which the ACF is adhered can be sufficiently softened and fluidized, and the generation of voids can be eliminated.
【０００９】以下、本発明の一実施の形態を図面を参照
しながら説明する。図１、図２、図３、図４、図５、図
６、図７は、本発明の一実施の形態のバンプ付きワーク
のボンディング工程図であって、ボンディングの工程順
に示している。An embodiment of the present invention will be described below with reference to the drawings. FIGS. 1, 2, 3, 4, 5, 6, and 7 are bonding process diagrams of a work with bumps according to an embodiment of the present invention, which are shown in the order of the bonding process.
【００１０】まず、図１に示すように、基板１を乾燥室
１０に入れ、ヒータ１１により基板１を加熱することに
より、基板１に含まれる水分を蒸発させて除去する。こ
のように基板１を乾燥させる理由は次のとおりである。
すなわち基板１には、バンプ付きチップと一緒に、他の
電子部品も実装される場合がある。この場合、この電子
部品を半田付けするために基板１は後工程で加熱炉へ送
られて加熱される。基板１が水分を含んでいると、この
加熱によりこの水分が蒸発し、基板１に貼着されたＡＣ
Ｆ（後述）の貼着面にボイドが生じる。したがって図１
に示す乾燥工程により、基板１に含まれる水分を予め除
去するものである。勿論、ヒータ１１によらずに除湿剤
などにより基板１を乾燥させてもよい。First, as shown in FIG. 1, the substrate 1 is placed in a drying chamber 10 and the substrate 1 is heated by a heater 11 to evaporate and remove moisture contained in the substrate 1. The reason for drying the substrate 1 in this way is as follows.
That is, other electronic components may be mounted on the substrate 1 together with the chip with bumps. In this case, the substrate 1 is sent to a heating furnace and heated in a later step in order to solder the electronic component. When the substrate 1 contains moisture, the moisture evaporates due to this heating, and the AC adhered to the substrate 1 is removed.
Voids occur on the surface to which F is applied (described later). Therefore, FIG.
The moisture contained in the substrate 1 is removed in advance by the drying step shown in FIG. Of course, the substrate 1 may be dried with a dehumidifying agent or the like without using the heater 11.
【００１１】次に図２に示すように、ＡＣＦ５を貼着ツ
ール１２の下面に真空吸着し、基板１の上方に位置させ
る。１３はＡＣＦ５の上面に貼着されたセパレータであ
る。このとき、加熱手段である熱風ノズル１４を基板１
とＡＣＦ５の間に位置させ、上方と下方へ熱風を吹き出
してＡＣＦ５の下面と基板１の上面を加熱する。望まし
くは、基板１をヒートブロック１５上に載置し、このヒ
ートブロック１５によっても基板１を加熱する。１６は
ヒートブロック１５に内蔵されたヒータである。ＡＣＦ
５の下面は、熱風ノズル１４から吹き出される熱風によ
り、十分に軟化する温度まで加熱される。この加熱温度
は、ＡＣＦ５の材質によって異るが、約８０°Ｃもしく
はそれ以上である。Next, as shown in FIG. 2, the ACF 5 is vacuum-adsorbed to the lower surface of the attaching tool 12 and positioned above the substrate 1. Reference numeral 13 denotes a separator attached to the upper surface of the ACF 5. At this time, the hot air nozzle 14 serving as a heating unit is connected to the substrate 1.
And the ACF 5, and hot air is blown upward and downward to heat the lower surface of the ACF 5 and the upper surface of the substrate 1. Desirably, the substrate 1 is placed on the heat block 15, and the heat block 15 also heats the substrate 1. Reference numeral 16 denotes a heater built in the heat block 15. ACF
The lower surface of 5 is heated to a temperature at which it is sufficiently softened by the hot air blown out from hot air nozzle 14. The heating temperature varies depending on the material of the ACF 5, but is about 80 ° C. or higher.
【００１２】次に図３に示すように、熱風ノズル１４を
退去させたうえで、貼着ツール１２を下降させ、ＡＣＦ
５を基板１の表面に押し付けて貼着する。この場合、図
２に示す工程でＡＣＦ５の下面を加熱したことにより、
この下面は十分に軟化・流動化しているので、ＡＣＦ５
の下面は基板１の表面にぴったりフィットし、基板１の
表面とＡＣＦ５の下面の間に空隙（ボイド）は生じな
い。Next, as shown in FIG. 3, after the hot air nozzle 14 is withdrawn, the attaching tool 12 is lowered and the ACF
5 is pressed against and adhered to the surface of the substrate 1. In this case, by heating the lower surface of the ACF 5 in the step shown in FIG.
Since this lower surface is sufficiently softened and fluidized, ACF5
Is fitted to the surface of the substrate 1 exactly, and no void is generated between the surface of the substrate 1 and the lower surface of the ACF 5.
【００１３】次に図４に示すように、セパレータ１３を
ＡＣＦ５から剥ぎ取る。次に図５に示すように、ボンデ
ィングツール１７の下面にバンプ付きチップ３を真空吸
着し、その下面のバンプ４を基板１の表面のパッド２に
位置合わせするとともに、熱風ノズル１４をバンプ付き
チップ３と基板１の間に位置させ、熱風を吹き出してバ
ンプ付きチップ３の下面と基板１の表面を加熱する。こ
れによりＡＣＦ５の上面は十分に軟化・流動化し、また
ＡＣＦ５の上面に押し付けられるバンプ付きチップ３の
下面も十分に加熱される。Next, as shown in FIG. 4, the separator 13 is peeled off from the ACF 5. Next, as shown in FIG. 5, the chip 3 with the bump is vacuum-sucked on the lower surface of the bonding tool 17, the bump 4 on the lower surface is aligned with the pad 2 on the surface of the substrate 1, and the hot air nozzle 14 is connected to the chip with the bump. 3 and the substrate 1, and the lower surface of the bumped chip 3 and the surface of the substrate 1 are heated by blowing hot air. Thereby, the upper surface of the ACF 5 is sufficiently softened and fluidized, and the lower surface of the chip 3 with bumps pressed against the upper surface of the ACF 5 is also sufficiently heated.
【００１４】次に図６に示すように熱風ノズル１４を退
去させたうえで、ボンディングツール１７を下降させて
バンプ付きチップ３をＡＣＦ５に押し付け、バンプ４を
パッド２上に搭載する。この場合、図５に示す工程でＡ
ＣＦ５の上面は熱風が吹き付けられて十分に軟化・流動
化しており、またバンプ付きチップ３の下面も十分に加
熱されているので、ＡＣＦ５の上面はバンプ付きチップ
３の下面に完全にフィットし、両者の間に空隙を生じな
い。Next, as shown in FIG. 6, after the hot air nozzle 14 is withdrawn, the bonding tool 17 is lowered to press the bumped chip 3 against the ACF 5, and the bump 4 is mounted on the pad 2. In this case, the process shown in FIG.
The upper surface of the CF 5 is sufficiently softened and fluidized by blowing hot air, and the lower surface of the chip 3 with bumps is also sufficiently heated, so that the upper surface of the ACF 5 completely fits the lower surface of the chip 3 with bumps. There is no gap between the two.
【００１５】次に図７に示すように、ボンディングツー
ル１７に代えて熱圧着ツール１８をバンプ付きチップ３
の上面に押し付ける。するとＡＣＦ５はヒートブロック
１５からの伝熱と熱圧着ツール１８からの伝熱により、
その内部まで十分に加熱されて軟化・流動化し、バンプ
付きチップ３の表面にぴったり密着して滑らかなフィレ
ット面（滑らかな傾斜面）５ａが形成される。更にこの
まま加熱を継続すると、流動化したＡＣＦ５は硬化す
る。そこで熱圧着ツール１８を退去させ、一連の動作は
終了する。１９は熱圧着ツール１８に備えられたヒータ
である。以上のように、この方法によれば、空隙（ボイ
ド）が生じないように、バンプ付きチップ３をＡＣＦ５
により基板１にしっかりボンディングすることができ
る。Next, as shown in FIG. 7, instead of the bonding tool 17, a thermocompression bonding tool 18 is used.
Press on top of Then, the ACF 5 transmits heat from the heat block 15 and heat from the thermocompression bonding tool 18,
The inside is sufficiently heated to be softened and fluidized, and the surface of the chip 3 with bumps is closely adhered to form a smooth fillet surface (smooth inclined surface) 5a. If the heating is further continued as it is, the fluidized ACF5 hardens. Then, the thermocompression bonding tool 18 is removed, and a series of operations is completed. Reference numeral 19 denotes a heater provided in the thermocompression bonding tool 18. As described above, according to this method, the chip 3 with the bumps is placed in the ACF 5 so that no void is generated.
Thus, the semiconductor device can be firmly bonded to the substrate 1.
【００１６】なお上述したように、このバンプ付きチッ
プ３と一緒に、このバンプ付きチップ３以外の他の電子
部品も基板１に併せて搭載し、加熱炉へ送って半田付け
する場合もあるが、この場合も、図１に示す工程で基板
１に含まれる水分を除去しているので、基板１とＡＣＦ
５の間にボイドが生じることはない。As described above, there are cases where electronic components other than the bumped chip 3 are mounted on the substrate 1 together with the bumped chip 3 and sent to a heating furnace for soldering. Also in this case, since the moisture contained in the substrate 1 is removed in the step shown in FIG.
No voids occur between 5.
【００１７】[0017]
【発明の効果】本発明は、ＡＣＦの表面を加熱手段によ
り加熱して軟化・流動化させたうえでＡＣＦをワークに
貼着し、またＡＣＦ上にバンプ付きワークをボンディン
グするようにしているので、ＡＣＦの貼着面に空隙（ボ
イド）が発生するのを確実に解消し、バンプ付きワーク
をワークにしっかりボンディングすることができる。According to the present invention, the surface of the ACF is heated by a heating means to be softened and fluidized, then the ACF is attached to the work, and the work with bumps is bonded on the ACF. In addition, it is possible to reliably eliminate the generation of voids (voids) on the ACF attachment surface, and to securely bond the work with bumps to the work.
【図１】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 1 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図２】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 2 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図３】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 3 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図４】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 4 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図５】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 5 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図６】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 6 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図７】本発明の一実施の形態のバンプ付きワークのボ
ンディング工程図FIG. 7 is a bonding process diagram of a work with bumps according to an embodiment of the present invention.
【図８】従来のバンプ付きチップを基板にボンディング
した実装構造の部分断面図FIG. 8 is a partial cross-sectional view of a conventional mounting structure in which a chip with bumps is bonded to a substrate.
１ 基板 ２ パッド ３ バンプ付きチップ ４ バンプ ５ ＡＣＦ（異方性導電テープ） １０ 乾燥室 １４ 熱風ノズル １７ ボンディングツール １８ 熱圧着ツール Reference Signs List 1 substrate 2 pad 3 chip with bump 4 bump 5 ACF (anisotropic conductive tape) 10 drying chamber 14 hot air nozzle 17 bonding tool 18 thermocompression tool
Claims (4)
プの表面を加熱手段により加熱することにより異方性導
電テープの表面を軟化させる工程と、異方性導電テープ
の軟化した表面をワークの表面に押し付けて貼着する工
程と、バンプ付きワークを異方性導電テープに押し付け
てバンプをワークのパッド上に搭載し、熱圧着ツールを
前記バンプ付きワークに押し付け、この熱圧着ツールか
らの伝熱により前記異方性導電テープを軟化・流動化さ
せ、更に伝熱による加熱を継続して前記異方性導電テー
プを硬化させてボンディングする工程と、を含むことを
特徴とするバンプ付きワークのボンディング方法。1. A anisotropically by heating by heating means the surface of the anisotropic conductive tape is adhered on the surface of the workpiece
Softening the surface of the electrical tape, and anisotropic conductive tape
Pressing the softened surface of the work to the surface of the work and sticking it, and pressing the work with bumps against the anisotropic conductive tape and mounting the bumps on the work pads, using the thermocompression bonding tool
Press against the work with bumps
The heat transfer softens and fluidizes the anisotropic conductive tape.
The heating by heat transfer is continued to continue the anisotropic conductive tape.
Curing the bumps and bonding.
ルであることを特徴とする請求項１記載のバンプ付きワ
ークのボンディング方法。2. A hot air nozzle, wherein said heating means blows hot air.
The bonding method for a work with bumps according to claim 1, wherein:
プの表面を加熱手段により加熱することにより異方性導
電テープの表面を軟化させる工程と、バンプ付きワーク
を異方性導電テープに押し付けてバンプをワークのパッ
ド上に搭載し、熱圧着ツールを前記バンプ付きワークに
押し付け、この熱圧着ツールからの伝熱により前記異方
性導電テープを軟化・流動化させ、更に伝熱による加熱
を継続して前記異方性導電テープを硬化させてボンディ
ングする工程と、を含むことを特徴とするバンプ付きワ
ークのボンディング方法。Wherein anisotropically by heating by the heating means to the surface of the bonded anisotropic conductive tape surface of the workpiece
Step of softening the surface of the electrical tape, pressing the work with bumps against the anisotropic conductive tape, mounting the bumps on the work pads, and applying a thermocompression tool to the work with bumps
Press, heat transfer from this thermocompression bonding tool
Softens and fluidizes conductive tape, and heats it by heat transfer
And curing the anisotropic conductive tape to bond the work. 3. A method of bonding a work with bumps, the method comprising:
ルであることを特徴とする請求項３記載のバンプ付きワ4. The bumped wire according to claim 3, wherein
ークのボンディング方法。Bonding method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17761796A JP3239762B2 (en) | 1996-07-08 | 1996-07-08 | Bonding method of work with bump |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17761796A JP3239762B2 (en) | 1996-07-08 | 1996-07-08 | Bonding method of work with bump |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1022344A JPH1022344A (en) | 1998-01-23 |
| JP3239762B2 true JP3239762B2 (en) | 2001-12-17 |
Family
ID=16034145
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17761796A Expired - Fee Related JP3239762B2 (en) | 1996-07-08 | 1996-07-08 | Bonding method of work with bump |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3239762B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3284262B2 (en) * | 1996-09-05 | 2002-05-20 | セイコーエプソン株式会社 | Liquid crystal display device and electronic device using the same |
| JP2000012609A (en) * | 1998-06-17 | 2000-01-14 | Shinko Electric Ind Co Ltd | Method of mounting semiconductor chip on circuit board |
| JP5020629B2 (en) * | 2006-12-28 | 2012-09-05 | パナソニック株式会社 | How to connect electronic components |
| US10199351B2 (en) * | 2015-12-30 | 2019-02-05 | Skyworks Solutions, Inc. | Method and device for improved die bonding |
-
1996
- 1996-07-08 JP JP17761796A patent/JP3239762B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH1022344A (en) | 1998-01-23 |
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