JPS59166530U - Pulse interference detection circuit - Google Patents
Pulse interference detection circuitInfo
- Publication number
- JPS59166530U JPS59166530U JP6085983U JP6085983U JPS59166530U JP S59166530 U JPS59166530 U JP S59166530U JP 6085983 U JP6085983 U JP 6085983U JP 6085983 U JP6085983 U JP 6085983U JP S59166530 U JPS59166530 U JP S59166530U
- Authority
- JP
- Japan
- Prior art keywords
- detection circuit
- circuit
- pulse
- interference detection
- interference
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Noise Elimination (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のエンベロープ検波方式によるパルス状妨
害波の検出回路を示すブロック図、第２図は第１図の検
波回路の一例を示す回路図、第３図は第１図の回路動作
の問題点を説明するための波形図、第４図は本考案に係
るパルス状妨害波の □検出回路を示すブロック図
、第５図は第４図の非直線回路の特性及び動作を示す説
明図である。
１・・・入力端子、２・・・増幅回路、５・・・出力端
子、６・・・パルス妨害検出回路、１０・・・非直線回
路、Ｇ。
Ｈ・・・非直線回路の入力、出力信号、Ｄ２．Ｄ３・・
・ダイオード、ＶＰ・・・ダイオード順方向電圧。Fig. 1 is a block diagram showing a detection circuit for pulsed interference waves using the conventional envelope detection method, Fig. 2 is a circuit diagram showing an example of the detection circuit shown in Fig. 1, and Fig. 3 shows the operation of the circuit shown in Fig. 1. A waveform diagram to explain the problem, Fig. 4 is a block diagram showing a detection circuit for pulsed interference waves according to the present invention, and Fig. 5 is an explanatory diagram showing the characteristics and operation of the nonlinear circuit shown in Fig. 4. It is. DESCRIPTION OF SYMBOLS 1...Input terminal, 2...Amplification circuit, 5...Output terminal, 6...Pulse interference detection circuit, 10...Nonlinear circuit, G. H...Nonlinear circuit input and output signals, D2. D3...
・Diode, VP...Diode forward voltage.
Claims (2)
ための増幅回路と、この増幅回路後段に配置され前記周
波数変調波信号中にこの信号振幅韮りも大きな振幅のパ
ルス状の妨害波がある場合これを検出するためのパルス
妨害検出回路と、このパルス妨害検出回路よりも前段に
配置され前記増幅回路から出力される前記周波数変調波
信号の中心部をスライスして信号波部分に対する妨害波
部分の相対振幅比を増大させるための非直線回路とを備
えて構成されるパルス状妨害波の検出回路。(1) An amplifier circuit for inputting a frequency modulated wave signal and amplifying it to a predetermined level; and a pulse-shaped interference wave placed after the frequency modulated wave signal and having a larger amplitude than the signal amplitude. a pulse interference detection circuit for detecting this, if any, and a pulse interference detection circuit arranged before the pulse interference detection circuit and slicing the center part of the frequency modulated wave signal output from the amplifier circuit to detect interference waves for the signal wave portion. and a nonlinear circuit for increasing the relative amplitude ratio of the parts.
極性で並列に接続して構成されることを特徴とする実用
新案登録請求の範囲第１項記載のパルス状妨害波の検出
回路。(2) The pulsed interference wave detection circuit according to claim 1, wherein the non-linear circuit is constructed by connecting two diodes in parallel with opposite polarities.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6085983U JPS59166530U (en) | 1983-04-25 | 1983-04-25 | Pulse interference detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6085983U JPS59166530U (en) | 1983-04-25 | 1983-04-25 | Pulse interference detection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59166530U true JPS59166530U (en) | 1984-11-08 |
Family
ID=30191092
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6085983U Pending JPS59166530U (en) | 1983-04-25 | 1983-04-25 | Pulse interference detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59166530U (en) |
-
1983
- 1983-04-25 JP JP6085983U patent/JPS59166530U/en active Pending
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