JPS59166335U - Signal off delay timer circuit - Google Patents

Signal off delay timer circuit

Info

Publication number
JPS59166335U
JPS59166335U JP6107083U JP6107083U JPS59166335U JP S59166335 U JPS59166335 U JP S59166335U JP 6107083 U JP6107083 U JP 6107083U JP 6107083 U JP6107083 U JP 6107083U JP S59166335 U JPS59166335 U JP S59166335U
Authority
JP
Japan
Prior art keywords
timer circuit
signal
delay timer
signal terminal
operates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6107083U
Other languages
Japanese (ja)
Other versions
JPH031876Y2 (en
Inventor
雅一 田口
Original Assignee
オムロン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by オムロン株式会社 filed Critical オムロン株式会社
Priority to JP6107083U priority Critical patent/JPS59166335U/en
Publication of JPS59166335U publication Critical patent/JPS59166335U/en
Application granted granted Critical
Publication of JPH031876Y2 publication Critical patent/JPH031876Y2/ja
Granted legal-status Critical Current

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  • Electronic Switches (AREA)
  • Relay Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案に係る信号オフディレータイマ回路の一
実施例を示す回路図、第２図はそのタイムチャート図で
ある。 Ｂ工ｅ　Ｂ２・・・信号端子、Ｔ・・・タイマ回路、Ｔ
ｒ、。 Ｔｒ２．　Ｔｒ３．　Ｔｒ、・・・トランジスタ、Ｘ・
・・リレー。FIG. 1 is a circuit diagram showing an embodiment of a signal off delay timer circuit according to the present invention, and FIG. 2 is a time chart thereof. B engineering e B2...Signal terminal, T...Timer circuit, T
r. Tr2. Tr3. Tr...Transistor, X...
··relay.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ゛　電源端子と、信号端子と、この信号端子の短絡にて
導通するスイッチング素子と、このスイッチング素子の
導通にて動作し前記信号端子の解放にて設定時間カウン
トを開始するタイマ回路と、このタイマ回路の動作とと
もに動作しタイマ回路のタイムアツプ信号にて復帰する
リレーとを備えたことを特徴とする信号オフディレータ
イマ回路。゛ A power supply terminal, a signal terminal, a switching element that becomes conductive when the signal terminal is short-circuited, a timer circuit that operates when the switching element becomes conductive and starts counting a set time when the signal terminal is released, and this timer circuit. A signal off-delay timer circuit comprising a relay that operates in conjunction with the operation of the circuit and returns to normal at a time-up signal of the timer circuit.
JP6107083U 1983-04-22 1983-04-22 Signal off delay timer circuit Granted JPS59166335U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6107083U JPS59166335U (en) 1983-04-22 1983-04-22 Signal off delay timer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6107083U JPS59166335U (en) 1983-04-22 1983-04-22 Signal off delay timer circuit

Publications (2)

Publication Number Publication Date
JPS59166335U true JPS59166335U (en) 1984-11-07
JPH031876Y2 JPH031876Y2 (en) 1991-01-21

Family

ID=30191290

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6107083U Granted JPS59166335U (en) 1983-04-22 1983-04-22 Signal off delay timer circuit

Country Status (1)

Country Link
JP (1) JPS59166335U (en)

Also Published As

Publication number Publication date
JPH031876Y2 (en) 1991-01-21

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