JPS59161811A - Formation of semiconductor thin film - Google Patents

Formation of semiconductor thin film

Info

Publication number
JPS59161811A
JPS59161811A JP58035762A JP3576283A JPS59161811A JP S59161811 A JPS59161811 A JP S59161811A JP 58035762 A JP58035762 A JP 58035762A JP 3576283 A JP3576283 A JP 3576283A JP S59161811 A JPS59161811 A JP S59161811A
Authority
JP
Japan
Prior art keywords
disilane
thin film
type
gas
raw material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58035762A
Other languages
Japanese (ja)
Other versions
JPH0642450B2 (en
Inventor
Nobuhiro Fukuda
福田 信弘
Kenji Miyaji
宮地 賢司
Takayuki Teramoto
寺本 隆行
Hidemi Takenouchi
竹之内 秀実
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui Toatsu Chemicals Inc
Original Assignee
Mitsui Toatsu Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Toatsu Chemicals Inc filed Critical Mitsui Toatsu Chemicals Inc
Priority to JP58035762A priority Critical patent/JPH0642450B2/en
Publication of JPS59161811A publication Critical patent/JPS59161811A/en
Publication of JPH0642450B2 publication Critical patent/JPH0642450B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02576N-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type
    • H01L21/02579P-type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)
  • Chemical Vapour Deposition (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To obtain a semiconductor thin film of wide optical forbidden band width by a method wherein disilane or mixture gas of disilane and biluting gas is prepared as raw material and a discharge energy of less than 5.5 KJ per unit mass of disilane is applied to the raw material to form the semiconductor thin film. CONSTITUTION:Disilane or mixture gas of disilane and diluting gas is prepared as raw material and the raw material is decomposed by a glow discharge and an amorphous silicon thin film is formed on a substrate. The glow discharge energy of less than 5.5 KJ per unit mass of disilane is applied. H2, He, Ne, Ar and the like is used as above diluting gas. Moreover, P type or N type semiconductive additive may be added to the disilane or the mixture gas of disilane and diluting gas and a compound of III-group elements such as B2H6 is used as the P type additive and a compound of V-group elements such as PH3 and AsH3 is used as the N type additive. The semiconductor thin film obtained with above method has a wide optical forbidden band width and can be utilized as a window material of an amorphous silicon photoelectric conversion element.

Description

【発明の詳細な説明】 本発明は非晶質シリコンからなる半導体薄膜の形成方法
に関し、特に広い光学禁制帯巾を有する該薄膜の形成方
法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming a semiconductor thin film made of amorphous silicon, and particularly to a method for forming the thin film having a wide optical forbidden band.

非晶質シリコン(以下a−8iと記す)薄膜は最近よく
研究されており、その用途は太陽電池、感光ドラム、画
像読取装置の走査回路、画像表示デバイスの駆動回路等
に開けている。
Amorphous silicon (hereinafter abbreviated as A-8I) thin films have been extensively studied recently, and are being used in solar cells, photosensitive drums, scanning circuits for image reading devices, drive circuits for image display devices, and the like.

、しかして、かかるa−3i薄膜を太陽電池の窓材料す
なわち低入射光損失の薄膜として用いる場合、該シリコ
ン薄膜の光学禁制帯巾(以下Eoptと記す)はできる
だけ大きいことが望ましい。
Therefore, when such an a-3i thin film is used as a window material for a solar cell, that is, a thin film with low incident light loss, it is desirable that the optical forbidden band (hereinafter referred to as Eopt) of the silicon thin film be as large as possible.

なぜならEoptより大なるエネルギーを有する光は、
光活性層に届く前に該a−3i層でカットされてしまい
有効に利用されないからである。
Because light with energy greater than Eopt is
This is because it is cut by the a-3i layer before reaching the photoactive layer and is not used effectively.

従来技術では、シリコン原料のみでかかる窓材料を形成
することは困難であった故、シリコンに炭素や窒素を導
入した非晶質シリコンカーバイド(以下a−3iCxと
記す)や非晶質シリコンナイトライド(以下a−8IN
yと記す)が検討され、ボロンをドープしたpla−5
iCxはへテロ接合の窓材料として一部実用に供せられ
ている。
With conventional technology, it was difficult to form such a window material using only silicon raw materials, so amorphous silicon carbide (hereinafter referred to as a-3iCx), which is silicon with carbon and nitrogen introduced therein, and amorphous silicon nitride were used. (hereinafter a-8IN
y) was studied, and boron-doped pla-5
iCx is partially put into practical use as a window material for heterojunctions.

しかしながら、(i)a−3iCxやa−3iNyは本
来電気を通しにくい性質のものであり、これらを窓材料
として用いる場合には低い電気伝導性に起因する問題を
含むものであった。a−3iCxやa−3iNyにおい
ては、CやNの量を犬にしてXやyの値を大きくすると
E’optが大きくなるが、電気伝導性が著しく低下す
るので、やたらXやyの値を大きくしてEoptを増大
せしめることができなかった。たとえばp型a−3iC
xではEOptを1.9〜2.OeVで用いる時が電気
伝導性とのバランスの上から最適であるとされているが
、この時の導電率は約10−78−Cm−1とやはり低
く、太陽電池のような光電変換素子においては窓材料が
抵抗成分として作用し、効率の改善には不利になる。(
ii)さらにa−3iCx形成のためには炭素源を原料
として用いねばならない。この結果グロー放電室内部に
は炭素が析出するので、該析出炭素を除去せねばならぬ
という新たな問題が発生する。上記の如く導電率はa−
3iCxのXの値に大きく影響されるので、シリコン原
料と炭素原料との組成、制御を厳密に行なわねばならず
、プロ七スが複雑になる。
However, (i) a-3iCx and a-3iNy are inherently difficult to conduct electricity, and when these are used as window materials, problems arise due to low electrical conductivity. In a-3iCx and a-3iNy, E'opt increases when the amount of C and N is increased and the values of X and y are increased, but the electrical conductivity decreases significantly, so the values of X and y are often changed. It was not possible to increase Eopt by increasing Eopt. For example, p-type a-3iC
For x, EOpt is 1.9 to 2. It is said that it is best to use OeV in terms of balance with electrical conductivity, but the electrical conductivity at this time is still low at about 10-78-Cm-1, making it difficult to use in photoelectric conversion elements such as solar cells. In this case, the window material acts as a resistance component, which is disadvantageous to improving efficiency. (
ii) Furthermore, a carbon source must be used as a raw material for a-3iCx formation. As a result, carbon is deposited inside the glow discharge chamber, and a new problem arises in that the deposited carbon must be removed. As mentioned above, the conductivity is a-
Since it is greatly influenced by the value of X in 3iCx, the composition and control of the silicon raw material and carbon raw material must be strictly controlled, making the process complicated.

本発明はかかる点にかんがみてなされたもので、その目
的は、窓拐料として好適な半導体薄膜をシリコン原料の
みから形成する方法を提供することにある。
The present invention has been made in view of these points, and its object is to provide a method for forming a semiconductor thin film suitable as a window coating material only from silicon raw materials.

本発明者らは、上記観点から鋭意検討した結果、ジシラ
ンガスを用いてグロー放電分解することにより形成した
シリコン薄膜はEOptが増大するという知見を得(特
願昭57−134709号)、さらに放電条件の検討を
進めた結果、驚くべきことに1.9eVを越えるEop
tを有するa−3i膜を得ることのできる放電条件を見
出し本発明を完成した。
As a result of intensive studies from the above viewpoint, the present inventors found that a silicon thin film formed by glow discharge decomposition using disilane gas has an increased EOpt (Japanese Patent Application No. 134709/1982), and also found that the discharge conditions As a result of further investigation, surprisingly, Eop exceeding 1.9eV
The present invention was completed by discovering discharge conditions under which an a-3i film having t can be obtained.

なお、さらにp型又はn型の導電性をイー、1与する物
質をドープしたa−3i:H膜においても、そのEop
tは1.8 e Vを越えるものであり、これらのp型
又はη型a−3i:Hはその導電率においても約10”
S−em’を越えて大きいことから、窓材料として好適
な性質を有するものである。すなわち、本発明は、ジシ
ランまたはシンランと希釈ガスの混合ガスを原料として
、必要に応じてp型またはn型の導電性を付与する物質
をさらに添加してクロー放電により分解し、基板」二に
半導体薄膜を形成する方法において、」二記ジシラン単
位貿惧当り5.5KJ以下のグロー放電エネルギーを印
加して」二記薄膜を形成することを特徴とする半導体薄
膜の形成方法。
Furthermore, even in an a-3i:H film doped with a substance that provides p-type or n-type conductivity, its Eop
t exceeds 1.8 e V, and the conductivity of these p-type or η-type a-3i:H is approximately 10"
Since it is larger than S-em', it has suitable properties as a window material. That is, in the present invention, a mixed gas of disilane or synlane and a diluent gas is used as a raw material, a substance imparting p-type or n-type conductivity is further added as needed, and the mixture is decomposed by claw discharge to form a substrate. A method for forming a semiconductor thin film, characterized in that the thin film is formed by applying glow discharge energy of 5.5 KJ or less per unit of disilane.

を提供するものである。It provides:

以下、本発明の構成要件を詳細に分段する。Hereinafter, the constituent elements of the present invention will be divided in detail.

本発明においてシンランとは、 M式S+nH2+1→
2であられされるポリシラン化合物においてn=2の物
質である。勿論、高純度であることが好ましいが、グロ
ー放電中でジシランと同様に挙動するトリシラン、テト
ラシラン等(該一般式においてn=3.4)等高次のも
のが含まれていることは何らさしつかえない。
In the present invention, Synlan means M formula S+nH2+1→
In the polysilane compound composed of 2, n=2. Of course, it is preferable that it be highly pure, but it does not matter that it contains higher-order substances such as trisilane, tetrasilane, etc. (n = 3.4 in the general formula), which behave in the same way as disilane in glow discharge. do not have.

ジシランはモノシランを無声放電して一部ジシラン、に
変化せしめる物理的な合成方法によったものでもよいが
、太陽電池を工業的に生産する点から、安定した品質の
ものが大量に得られる化学的な合成方法(たとえばヘキ
サクロロジンランを還元する等の方法)によるものがよ
り好ましい。
Disilane can be produced by a physical synthesis method in which monosilane is partially converted into disilane through silent discharge, but from the point of view of industrially producing solar cells, it is possible to synthesize disilane using a chemical method that allows stable quality products to be obtained in large quantities. It is more preferable to use a conventional synthetic method (for example, a method such as reducing hexachlorodine oran).

本発明において、必要に応じて使用するp型の導電性付
与物質とは、たとえば82  H6(ジボラン)等■族
元素化合物であり、またn型の導電性(1与物質とは、
たとえばPH3(フォスフイン)ヤAsH3(アルシン
)等V族元素化合物である。
In the present invention, the p-type conductivity-imparting substance used as necessary is, for example, a group II element compound such as 82 H6 (diborane), and the n-type conductivity imparting substance (1-conducting substance is
For example, it is a group V element compound such as PH3 (phosphine) or AsH3 (arsine).

これらの物質のジシランに対する使用割合はジンラン1
00容量部に対して0.1〜5容量部である。
The ratio of these substances to disilane is 1
The amount is 0.1 to 5 parts by volume per 00 parts by volume.

ジシラン等を希釈する希釈ガスとしてはH2、He5N
e、Ar等が用いられる。ジシランに対して用いる希釈
ガスの総量はジシラン1容量部あたり4寮量部ないし2
o容量部好しくは1o容量部以上である。
H2, He5N is used as a diluent gas to dilute disilane etc.
e, Ar, etc. are used. The total amount of diluent gas used for disilane is 4 parts to 2 parts by volume per 1 part by volume of disilane.
o capacity parts, preferably 1 o capacity parts or more.

また、p型ないしn型の導電性付与物質に対しては、該
物質1容量部に対し、10〜1000容量部の希釈ガス
を用いる。
Further, for a p-type to n-type conductivity imparting substance, 10 to 1000 parts by volume of diluent gas is used per 1 part by volume of the substance.

本発明においてはかがる希釈ガスを用いてa −3i:
Hを形成することが好ましい。該ガスを用いることによ
り、電気的特性が向上するが、多分子if[不純物の影
響を少なくし、プラズマによる膜の損傷を緩和する役割
を有しているのではながろうかと考えられる。希釈の割
合については、特に限定されるものではないが上記のご
とく5〜2゜vo1%の範囲にあることが製造上便利で
あり、前記の効果が大いに発揮される。
In the present invention, a-3i:
Preferably, H is formed. Although the electrical characteristics are improved by using this gas, it is thought that it has the role of reducing the influence of polymolecular impurities and mitigating damage to the film caused by plasma. The dilution ratio is not particularly limited, but as mentioned above, it is convenient for production to be in the range of 5 to 2° vol., and the above-mentioned effects are greatly exhibited.

本発明においては、上記のごとく、ジシラン単位質量当
り5,5KJ以下のグロー放電エネルギーを印加して薄
膜を形成するが、ジシラン単位質量当りのグロー放電エ
ネルギーの算出は次の式で行なう。
In the present invention, as described above, a thin film is formed by applying glow discharge energy of 5.5 KJ or less per unit mass of disilane, and the glow discharge energy per unit mass of disilane is calculated using the following formula.

たとえばヘリウム(He)で1Qvo1%に希釈された
ジシラン(S12 H6)からなる原料ガス0.5β/
分にIOWのグロー放電電力を加える場合の該エネルギ
ーはつぎのように計算する。
For example, a raw material gas consisting of disilane (S12 H6) diluted to 1Qvo1% with helium (He) 0.5β/
The energy when adding glow discharge power of IOW to minutes is calculated as follows.

原料ガスの平均分子量−(62,2184x 0.1 
十4.0026x O,9) = 9.824 (g 
r)S】2 H6の重量分率−(62,2184X 0
.1) /9.824= 0.633 これを上記(1)式に代入して ジシラン単位質量当りのエネルギー− いま103JをKJと表わせば、該エネルギーは1.7
K J/ g  S +2  Hs  と表わすことが
できる。
Average molecular weight of raw material gas - (62,2184x 0.1
14.0026x O,9) = 9.824 (g
r)S]2 Weight fraction of H6 - (62,2184X 0
.. 1) /9.824=0.633 Substituting this into the above equation (1) gives the energy per unit mass of disilane - Now, if 103J is expressed as KJ, the energy is 1.7
It can be expressed as K J/g S +2 Hs.

上記のグロー放電エネルギーの下限値については特に制
限がない。要するに、安定したグロー放電状態を形成し
うるものであればよい。この値はグロー放電設備の状況
及び使用する原料ガスの状況によっても変化する。好ま
しい具体例としては、ジンラン単独やHeやAr(アル
ゴン)等の希釈ガスで希釈された原料ガスの場合には0
.5KJ/g−3i2 H6以上であり、H2(水素)
希釈の場合、やや大きくて1.5KJ/g−3i。H6
以上である。
There is no particular restriction on the lower limit of the above glow discharge energy. In short, any material that can form a stable glow discharge state may be used. This value also changes depending on the conditions of the glow discharge equipment and the raw material gas used. As a preferable specific example, in the case of Ginran alone or a raw material gas diluted with a diluent gas such as He or Ar (argon), 0
.. 5KJ/g-3i2 H6 or higher, H2 (hydrogen)
In the case of dilution, it is slightly larger at 1.5 KJ/g-3i. H6
That's all.

本発明においてはa−5iを形成する時に、原料ガス流
量を多くすることが好ましい。前記のエネルギー算出式
において、該流量は分母にあり、流量を大きくすればそ
れだけ印加できるグロー放電電力を太き(できるととも
に、電力のバラツキの許容範囲も大きくなり、放電管理
が容易になるからである。そして、流量が多くなった分
だけa−3iの形成速度も大きくなるという利点がある
In the present invention, it is preferable to increase the flow rate of the raw material gas when forming a-5i. In the above energy calculation formula, the flow rate is in the denominator, and the larger the flow rate, the greater the glow discharge power that can be applied. There is an advantage that the rate of formation of a-3i increases as the flow rate increases.

なお、その他p又はn型a−3i:Hの導電率のバラツ
キが少なくなるとともにl型a−3iの光感度を大きく
するという好ましい結果も得ることができる。好ましい
流量の範囲はグロー放電設備の形状、容量、材質等によ
り変化するのでその範囲を一義的に特定することは困難
であるが、1型a−31の形成時にはIOA/sec好
ましくは20人/ s e cを越える形成速度を維持
するような原料ガス流量が望ましい。
In addition, other desirable results can also be obtained, such as reducing the variation in conductivity of p- or n-type a-3i:H and increasing the photosensitivity of l-type a-3i. The preferred range of flow rate varies depending on the shape, capacity, material, etc. of the glow discharge equipment, so it is difficult to specify the range unequivocally, but when forming Type 1 A-31, IOA/sec, preferably 20 people/ A feed gas flow rate that maintains a formation rate in excess of sec is desirable.

さらに本発明においては、a−3i膜形成の圧力を高く
して1〜10Torrの範囲で行なうことが好ましい。
Further, in the present invention, it is preferable to increase the pressure for forming the a-3i film in the range of 1 to 10 Torr.

圧力を上昇せしめることにより光感度が改善される。こ
の詳細な理由は不明であるが、圧力上昇によって、プラ
ズマの平均自由行程が小さくなり、プラズマが直接a−
5i膜を損傷するように働かなくなるのではないかと考
えられる。
Light sensitivity is improved by increasing the pressure. The detailed reason for this is unknown, but as the pressure increases, the mean free path of the plasma becomes smaller, and the plasma directly
It is thought that the 5i film may become ineffective in damaging the 5i film.

本発明においては、a−3iを形成するときの温度は4
50℃以下に維持される。好ましくは100℃〜400
℃である。
In the present invention, the temperature when forming a-3i is 4
Maintained below 50°C. Preferably 100℃~400℃
It is ℃.

グロー放電エネルギーを等しくする場合には、温度の低
い方がEoptは大きくなるが、100t:よりも低い
温度ではa−3i:Hの膜形成が効果的に進行しない。
When the glow discharge energies are made equal, Eopt becomes larger at lower temperatures, but a-3i:H film formation does not proceed effectively at temperatures lower than 100t:.

具体的には膜が剥離したり、黄色のアモルファスシリコ
ンの粉末が発生するようになり本発明の目的を達しえな
い。
Specifically, the film peels off and yellow amorphous silicon powder is generated, making it impossible to achieve the object of the present invention.

また400℃を越える温度においては、アモルファスシ
リコンの膜形成はできるが電気的特性たとえば光感度が
低下する。
Further, at temperatures exceeding 400° C., although it is possible to form an amorphous silicon film, electrical properties such as photosensitivity deteriorate.

つぎに本発明の実施の態様について記す。グロー放電可
能な反応室中に半導体薄膜を形成すべき基板を配置する
。減圧下100〜400℃の温度に加熱、保持する。つ
いで原料ガスを導入し、ジシラン単位質量当り5KJ以
下のグロー放電エネルギーを印加して圧力1〜10To
rrで水素を含有するa−3i膜を形成すればよい。
Next, embodiments of the present invention will be described. A substrate on which a semiconductor thin film is to be formed is placed in a reaction chamber capable of glow discharge. Heat and maintain at a temperature of 100 to 400°C under reduced pressure. Next, raw material gas is introduced, and glow discharge energy of 5 KJ or less per unit mass of disilane is applied to increase the pressure to 1 to 10 To.
An a-3i film containing hydrogen may be formed using rr.

本発明において得られる半導体薄膜は広い光学禁制帯[
1]を有する故1こ4、a−3i太陽電池をはじめとす
る非晶質/リコン光電変換素子の窓祠料、ハックコンタ
クト材料、クンデム接合素子の光入射側に配置される素
子の(」料として用いるのに好適である他に、非晶質シ
リコンを用いる各種のデバイスに有用に用いることがで
きる。
The semiconductor thin film obtained in the present invention has a wide optical forbidden band [
1], window polishing materials for amorphous/recon photoelectric conversion elements including 1-4, A-3i solar cells, hack contact materials, and elements disposed on the light incident side of Kundem junction elements. In addition to being suitable for use as a silicon material, it can also be usefully used in various devices using amorphous silicon.

以下実施例をあげて本発明をさらに具体的に説明する。EXAMPLES The present invention will be explained in more detail with reference to Examples below.

実施例1〜11 基板加熱手段、真空排気手段、ガス導入手段及び基板を
設置することのできる平行平板電極を有するグロー放電
室をもつ容量結合型高周波プラズマCV D (C1+
emical Vapor Deposition )
装置の該基板設置部へ、コーニング社製7059ガラス
基板を設置した。油拡散ポンプにより1O−7Torr
以下に真空排気しながら、該基板設置部の温度(薄膜の
形成温度)が300℃になるように加熱した。
Examples 1 to 11 Capacitively coupled high frequency plasma CV D (C1+
chemical vapor deposition)
A 7059 glass substrate manufactured by Corning was installed in the substrate installation section of the apparatus. 1O-7 Torr by oil diffusion pump
The substrate was heated to a temperature of 300° C. (thin film formation temperature) while being evacuated.

Heで希釈したジンラン(希釈比 S1□ H6/He
=1/9)を導入し、第1表に示したグo −放電条件
により半導体薄膜を形成した。同様の方法でH〜希釈の
PH3、又はB2  H6(希釈比P H3/ H2=
 1 / 99、B2  H6/H2= 1/99)を
該ジシランに加えてp型又はp型の半導体薄膜を形成し
た。第1表におけるジシランPH,、B2  H6の流
量は前記の希釈ガスを含んだ全流量を示すものである。
Jinlan diluted with He (dilution ratio S1□ H6/He
= 1/9), and a semiconductor thin film was formed under the discharge conditions shown in Table 1. In the same way, H to diluted PH3 or B2 H6 (dilution ratio PH3/H2=
1/99, B2 H6/H2=1/99) was added to the disilane to form a p-type or p-type semiconductor thin film. The flow rates of disilane PH, B2 H6 in Table 1 indicate the total flow rate including the diluent gas.

薄膜の形成時間、即ちグロー放電時間は薄膜の膜厚がほ
ぼ5000人になるように決定した。この時間は】型、
p型及びp型シリコン層で異り、平均の値としてそれぞ
れ7分40秒、14分40秒、13分40秒を要した。
The time for forming the thin film, that is, the glow discharge time, was determined so that the thickness of the thin film was approximately 5000 mm. This time] type,
This differs between p-type and p-type silicon layers, and the average times required are 7 minutes and 40 seconds, 14 minutes and 40 seconds, and 13 minutes and 40 seconds, respectively.

Eoptは分光光度計で薄膜の光吸収係数αを測定した
後、入射光のエネルギー(hν)に対して(αhν)″
をプロットし、その直線部分を外挿しhν軸との切片の
値として求めた。導電率の測定は200μの間隔をあけ
て電極を形成し、この電極間に電圧を印加し、電流を測
る方法で行なった。グロー放電エネルギーとEoptの
関係を含め結果を第1表に示す。
After measuring the light absorption coefficient α of the thin film with a spectrophotometer, Eopt is calculated as (αhν)″ for the energy of incident light (hν).
was plotted, and the straight line portion was extrapolated to obtain the value of the intercept with the hv axis. The conductivity was measured by forming electrodes at intervals of 200 μm, applying a voltage between the electrodes, and measuring the current. The results, including the relationship between glow discharge energy and Eopt, are shown in Table 1.

上記第1表の導電率は光を照射しない場合の値である。The electrical conductivity in Table 1 above is the value when no light is irradiated.

1型の薄膜においては、へMI照射下の光導電率は約1
07〜10 ” s −cm ’ テある。
For type 1 thin films, the photoconductivity under MI irradiation is approximately 1
07~10''s-cm'.

第1表に示すようにB2 H6をジシランに対して4%
ドープした実施例11においてもそのEopt ハ1.
76 e Vであり、下記比較のためのp型アモルファ
スシリコンの有する1、 64 e Vに比べて0.1
2eVをも広いEoptを有するものである。
As shown in Table 1, B2 H6 was added at 4% to disilane.
Even in the doped Example 11, the Eopt C1.
76 eV, which is 0.1 compared to 1.64 eV of p-type amorphous silicon for comparison below.
It has a wide Eopt of 2 eV.

(なお、比較のための例は上記実施例9と同じ条件で放
電電力のみ50Wに上昇し、13.2KJ/g−312
H6の放電エネルギーでp型シリコン薄膜を形成したも
のである。) 実施例12〜14 先の実施例6と同じ条件において、薄膜の形成温度のみ
、第2表に示すように変更して行なった結果を第2表に
記す。
(In addition, in the example for comparison, only the discharge power was increased to 50W under the same conditions as Example 9 above, and it was 13.2KJ/g-312
A p-type silicon thin film is formed using H6 discharge energy. ) Examples 12 to 14 Table 2 shows the results obtained under the same conditions as in Example 6, except for the thin film formation temperature, which was changed as shown in Table 2.

実施例15〜17 先の実施例9と同じ条件において、薄膜の形成温度のみ
第3表に示すように変更して行なった結果を第3表に記
す。
Examples 15 to 17 Table 3 shows the results obtained under the same conditions as in Example 9, with only the thin film formation temperature being changed as shown in Table 3.

5151

Claims (2)

【特許請求の範囲】[Claims] (1)ジンランまたはジシランと希釈ガスの混合ガスを
原料としてグロー放電により分解し、基板上に半導体薄
膜を形成する方法において、上記ジシラン単位質量光り
5.5KJ以下のグロー放電エネルギーを印加して上記
薄膜を形成することを特徴とする半導体薄膜の形成方法
(1) In a method of forming a semiconductor thin film on a substrate by decomposing a mixed gas of ginrane or disilane and a diluent gas as a raw material by glow discharge, the above-mentioned disilane unit mass light is applied with glow discharge energy of 5.5 KJ or less. A method for forming a semiconductor thin film, the method comprising forming a thin film.
(2)ジンランまたはジシランと希釈ガスの混合ガスに
さらにn型もしくはn型の導電性付与物質が添加される
特許請求の範囲第1項記載の方法。
(2) The method according to claim 1, wherein an n-type or n-type conductivity imparting substance is further added to the mixed gas of ginrane or disilane and the diluent gas.
JP58035762A 1983-03-07 1983-03-07 Method for forming semiconductor thin film Expired - Lifetime JPH0642450B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58035762A JPH0642450B2 (en) 1983-03-07 1983-03-07 Method for forming semiconductor thin film

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Application Number Priority Date Filing Date Title
JP58035762A JPH0642450B2 (en) 1983-03-07 1983-03-07 Method for forming semiconductor thin film

Publications (2)

Publication Number Publication Date
JPS59161811A true JPS59161811A (en) 1984-09-12
JPH0642450B2 JPH0642450B2 (en) 1994-06-01

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61283113A (en) * 1985-06-10 1986-12-13 Sanyo Electric Co Ltd Epitaxial growth method

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
APPL.PHYS.LETT=1980 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61283113A (en) * 1985-06-10 1986-12-13 Sanyo Electric Co Ltd Epitaxial growth method

Also Published As

Publication number Publication date
JPH0642450B2 (en) 1994-06-01

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