JPS59158657A - Digital signal demodulating system - Google Patents

Abstract

PURPOSE:To improve the characteristic of error rate by executing summation transformation at transmission side and executing a tri-state identification at a transition point of a receiving data and its vicinity at a receiving side. CONSTITUTION:After an information data applied to a digital data input terminal 1 is subject to summation transformation at a summation logic transformation circuit 2, its summation transformation output 3 is applied to a transmitter 4. A transmission output 5 is inutted to a receiver 7 via a transmission line 6, an output 8 is identified and demodulated at a tri-state identifying circuit 9 in the identifying timing when a receiving output waveform is opened sufficiently, i.e., at a receiving data transition point and its vicinity, and a demodulation output 10 is outputted to a demodulation output terminal 11. As a result, even if the waveform of detected output is deteriorated because of interference between codes or the like, the identification with noise margin is attained and an excellent error rate characteristic is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field to which the invention pertains) The present invention relates to a digital communication system, and is particularly suitable for use when the received output waveform is degraded due to code amount interference, etc.
The present invention relates to a digital signal demodulation method.

(Prior Art) On the receiving side of conventional digital communication systems, a method of performing binary identification at an intermediate point between normal data transition points is widely used. However, in order to obtain a narrowband signal in digital wireless communication, when a signal whose base band is limited on the transmitting side is detected on the receiving side, the more severe the band limitation, the wider the waveform on the time axis will be. As a result, the detected output is subject to code amount interference, and the error severity of the generated digital information is degraded.

Figure 1 shows an example of the detection output waveform of a GMSK (Gaussian filtered minimum shift keying) modulated signal, where s] is the conventional discrimination threshold, 1+ is the discrimination timing, and the discrimination timing 1+ The opening of the detected output waveform at is h], and since the eye aperture e is small, the noise margin is small, which has the drawback of increasing the number of errors in the identification output.

(Objective of the Invention) The present invention aims to eliminate the above-mentioned drawbacks and provide a communication system that can obtain good error rate characteristics even when waveform deterioration occurs due to code amount interference or the like. We focused on the fact that even when the received output waveform deteriorates, there is an identification timing at which there is a sufficient amount of the received output waveform. Since the transmission side has the following relationship, summation conversion is performed on the transmitting side, and ternary discrimination is performed and demodulated at the identification timing indicated by - on the receiving side.The drawings will be described in detail below.

(Structure and Operation of the Invention) The operating principle of the present invention will be explained using an example in which GMSK modulation is used.

In FIG. 1, when the identification timing is moved from the conventional tl to t2, which is the transition point of the received data, if the identification threshold is set to 82 and $3 and three-value identification is performed, the detected output waveform at identification timing L2 The difference becomes ))2 and h3, which increases the noise margin.

By moving the identification timing to t2' near t2 above, by setting the identification thresholds to 82' and 83', the noise margin at the time of identification is h2' and h3', which is greater than the case at identification timing t2. The difference in the detected output waveform is 1'-
゛′ Even with a slight decrease, the noise margin becomes larger than in the conventional case ′.

Figure 2 shows the difference h+ of the detected output waveform at the identification timing with respect to the normalized bandwidth T31) of the transmission baseband limit,
h2. It is an explanatory diagram showing the relationship between h:+ and the difference between the detected output waveform h+, h2. The value of hA shows the relationship when the value at which the width of the detected output waveform becomes widest is set to 1 depending on the normalized 3d13 bandwidth Bl)T of the transmission base band limit.

Here, h2 and h3 are compared to the difference h of the detected output waveform.
The value of is large when BbT is small. From this, the present invention allows a larger noise margin than the conventional method when the code amount interference is high and the detected output waveform is degraded.

In three-value identification, the detection output E is E≦82 and E≧$3 (1)
Let the logic of the code reproduced when 82 <
E < 113 ・・・・−・・・・Song・
Let rOJ be the logic of the code reproduced in (2).

At this time, if the transmitted code sequence is bl, the reproduced code sequence d1 is expressed by the following equation.

dH--bi■b1-1 ・・・・・・・・・・・・
(3) However, ■ represents exclusive OR.

On the transmitting side, the information data code sequence ai is subjected to summation transformation and is transmitted. The relationship between ai and bl is as follows: % (4) From equations 3) and (4), the reproduced code sequence d1 is as shown in the following equation.

di = bi■b1-1 =aH's bl-1■bi-+ -ai-"・(5
) In this way, the information data on the transmitting side is demodulated on the receiving side.

When the identification timing is set at t2' near t2, by setting the identification thresholds to s2' and 33', demodulation is possible in the same way, although the bell margin at the identification time is slightly reduced to h2' and h3'. In this case t2′ld t2<
It is assumed that t2・<1+ is satisfied.

FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention. The information data applied to the digital data input terminal 71 is subjected to summation conversion by the summation logic conversion circuit 2, and the summation conversion output 3 is applied to the transmitting device 4. The transmission output 5 is input to a receiving device 7 via a transmission path 6. The receiver output 8 is identified and demodulated by the three-value identification circuit 9 at the aforementioned identification timing, and the identification output 1o is output to the demodulation output terminal 11. Here, the transmitter/receiver also includes a modulation/demodulation circuit in the case of carrier wave transmission.

FIG. 4(a) shows an example of the configuration of the summation logic conversion circuit 2 in FIG. 3, and FIG. 4(b) shows an example of the configuration of the ternary discrimination circuit 9.

FIG. 4(a) In the VC, the information data applied to the digital data input terminal 1 is input to the exclusive OR gate 12.
The output from the gate 12 is divided into two parts, and one part is input to the 1-bit delay circuit 13. Delay circuit 1
The output of 3 is applied to the other input terminal of exclusive OR gate 2, and the sum conversion output shown in equation (4) is obtained at terminal 3.

Next, in FIG. 4(b), the three-value identification circuit input terminal 7-
In addition to 15, the receiving device output 8 is divided into three parts and can be input to a frequency converter 18, 19 and an identification timing extractor 20. In comparators 18 and 19, respectively, FIG.
Discrimination threshold ''S3 or S(' and S2 or 2
/ is applied to the identification threshold level input terminals] 6 and 17, respectively, and identification is determined at Lz i or its vicinity t2' in FIG. 1 according to the identification timing 21, and the comparator outputs 22 and II ], II and II Oll are respectively output depending on the magnitude with respect to the threshold value. The comparator outputs 22 and 23 are input to the exclusive OR gate 24, and the output thereof is outputted to the demodulation terminal 711 as the discrimination output 10 of the ternary discrimination circuit.

Note that there is a deco-binary method, which performs summation logic conversion on the transmitting side and performs three-value identification on the receiving side, but this method transmits a three-value signal, and unlike this method, it is not possible to transmit a binary signal. What you do is inherently bad.

(Effects) As explained above, even when the detected output waveform is degraded due to code amount interference, etc., the present invention can perform identification with a large power noise margin, and reduce error severity. This method has the advantage of improving G as shown in the example above.
In addition to the M S K wireless transmission method, other transmission methods such as M
It can be applied to the demodulation of SK system and PSKS military force, and it can also be applied to carrier wave transmission and baseband transmission.Furthermore, when the system of the present invention is configured with logic circuits, it has an extremely simple circuit configuration of 5 on both the transmitting side and the receiving side. It also has the advantage that it can be realized with

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of the detected output waveform of a GMSK modulated signal, FIG. 2 is an explanatory diagram showing the relationship between the spread of the detected output waveform at the identification timing with respect to the normalized bandwidth of the transmission baseband limit, and FIG. FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention, and FIGS. 4(a) and 4(b) are diagrams showing configuration examples of the Japanese logic conversion circuit and the three-value identification circuit shown in FIG. 3, respectively. It is. 1...Digital data input terminal, 2...
....- summation logic conversion circuit, 3 .... summation conversion output, 4-... transmitting device, 5...
...Transmission output, 6 ...Transmission line, 7.
......Receiving device, 8...-...Receiving device output, 9...Three-value identification circuit, ]0...
...Identification output, 11...Demodulation output terminal, 12.24...Exclusive OR game),
]:3・・・・・・1 bin 1 delay circuit, 14
... 1-bit delay circuit output, '15...
... Three-value identification terminal input terminal, 16.17...
...Identification threshold level input terminal, 18.19...
- Comparator, 20...Identification timing extractor, 21...Identification timing, 22.
23... Comparator output.

Claims (1)

[Claims] A code sequence obtained by performing summation logic conversion on the binary digital information signal on the transmitting side is transmitted as transmission data,
A digital signal post-modulation method characterized in that, on the receiving side, three-value identification is performed at transition points of received data and their vicinity, and the digital information signal is demodulated.