JPS59157589A - Confirmation mechanism for alarm setting - Google Patents

Abstract

PURPOSE:To annunciate that an alarm tone with melody is set securely by generating the alarm tone selectively when an alarm switch is set. CONSTITUTION:When the alarm switch 16 is placed in a set state, the Q output of an FF is inverted to a high level and the transistor (TR) 32 of an alarm setting circuit 30 turns on to power on a melody ROM and also release an address counter 36 from being reset at the same time. Consequently, the ROM34 is accessed through a decoder 40 which operates associatively with an alarm tone selection switch and the counter 36 to generate a set alarm tone. Then, an end musical note inspecting decoder 38 responds to the specific count output of the counter 36 to stop the monitored annuciation. Thus, the secured setting of the alarm sound is annunciated with melody by the monitored annunciation by a selected easy-to-decide part in the specified alarm tone.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an alarm setting confirmation mechanism for a watch with an alarm, and particularly to an alarm setting confirmation mechanism that skips a part of the alarm sound that is set immediately after the alarm is activated. Regarding.

In conventionally used alarm watches, operations such as moving the indicator hand are required to confirm whether the alarm has been set properly.

Therefore, an alarm setting confirmation mechanism as described in Japanese Unexamined Patent Publication No. 55-43446 by the applicant of the present application has been proposed.

In this alarm setting confirmation mechanism, when the alarm set switch is set, the alarm notifying means generates an alarm sound for a certain period of time to notify the user that the alarm has been definitely set.

The present invention relates to an improvement of such an alarm setting confirmation mechanism, and in an alarm watch that can switch and select a plurality of alarm sounds including melodies, the selected alarm sound is set to the one with the most melody for each alarm sound. To provide an alarm setting confirmation mechanism which notifies the user that a selected alarm sound is definitely set by omitting easily distinguishable parts and making monitor notifications.

An embodiment of the present invention will be fully explained below based on the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, in which 2 is an oscillation circuit including a crystal oscillator, 4 is a frequency divider circuit that appropriately divides the high frequency signal output from the oscillation circuit 2, and 6 is a divider circuit. a waveform shaping circuit for shaping the signal output from the circuit 4;
is a motor driven by a signal from the waveform shaping circuit 6;
10 is a wheel train driven by the motor 8; 12 is a wheel train 10;
This is a pointer that moves according to

14 is a reference mechanism, and the time set by the user is set by gear train 1.
It detects 0 and outputs an alarm time coincidence signal C+f. 16 is an alarm set switch, which outputs an operation signal Atfr via the chattering prevention circuit 1B. The AND gate 20 to which this signal A1 is input generates the signal C+ from the reference mechanism 14 as its output signal C8, which is set to the open state when the alarm set switch 16 is in the set state. The one-pulse signal A2 output from the one-shot multivibrator 22 inputting Al is applied to the clock signal φ of the flip-flop 24. This flip-flop 24 sets the output to the QeH level in synchronization with the rise of the signal A2.

The output signal A4 of the OR gate 26 which receives the output signal A3 of the flip 70 and the output signal C8 of the AND gate 20 becomes H level when the alarm time comes or when the switch 16 is operated.

'50 is an alarm setting circuit. In this alarm setting circuit 50, an output signal A4 of the OR gate 26 causes a
The melody RQM54 turns on the power when the channel transistor 2 becomes conductive, and this melody R
An address counter '56 that reads data from the OM54, an end note detection decoder 38 that receives all the output signals of this address counter 6 and detects a specific note of a melody as an alarm sound, and a decoder 38 that detects a specific note of a melody corresponding to the selected melody. A melody selection decoder 40 that specifies the first address of data in the melody ROM 34 or an address corresponding to a note determined in advance as the first note in monitor notification, and a signal from this melody selection decoder 40 is applied to the total address counter 3B. The gate circuit 42 completely determines the timing of the operation.

The data signal output from the melody ROM 34 is applied to a program frequency divider 44 to vary its frequency division ratio. This program frequency divider 44 clocks the output signal B23 of the AND gate 46 which is opened by the signal A4 and the output Q signal of the flip-flop which will be described later.
The melody ROM 54 is activated by inputting the
The address counter 36, which drives the entire sound generation circuit 45 in accordance with the data signal , inputs the output signal B+zffi of the AND gate 48 to its clock signal φ. This AND gate 48 generates a cyclic signal φ2 at the output when the signal A4 becomes H level.

The end note detection decoder 38 has an address counter 36
In response to the output signal of the melody ROM 34, when the address counter 36 outputs a signal corresponding to the address of a note predetermined as a midway stop note, the midway detection signal Csk is output, and the melody ROM 34 outputs a midway detection signal Csk. When the end note ends, the end note detection signal Cse is output.

This midway detection signal C3 is applied to the AND gate 52, which is normally in an open state due to the action of the inverter 50. .

The melody selection decoder 40 is normally in an output state that specifies all the first addresses of the selected melody, but outputs the output signal B24 of the AND gate 55, which becomes open when a specific melody is selected. When it reaches the H level, the output state is changed so that the address corresponding to the note that is determined as the first note at the time of monitor notification in the particular melody is specified.

The gate circuit 42 opens and closes in response to the output signal of the OR gate 54 and applies the output signal of the melody selection decoder 40 to the address counter 56.

The OR gate 54 receives an output signal 81B from the one-shot multivibrator 56 which is output in response to the rise of the signal A4, and an output signal 81B from the one-shot multivibrator 62 which is output by inputting the output signal from the 7-lip-flop 58 via a delay circuit 60. The output signal B17 is input.

The flip-flop 58 outputs Q'1il-H level each time an alarm sound selection switch is operated, which will be described later, and is reset by the output signal Q21 of the inverter 64 and flip-flop 66 which responds to the output signal B9 of the OR gate 54. .

68 is an alarm sound selection switch. This switch 6
8 operation signals Bl, B2. B3 are all applied to the melody selection decoder 40, and at the same time are applied to the clock power φ of the flip-flops 70, 72, and 74, respectively. The output signals of the flip-flops 70, 72, and 74 are the one-shot multivibrator 7, respectively.
6.78.80, and the output signal of each one-shot multivibrator B7 + Bs + B9
is applied to the OR gate 82. This or gate 8
The output of 2 is applied to the clock input φ of the flip-flop 5B mentioned above. .

84 is a counter that selects an electronic alarm sound such as reed or crackerato sound, and when the alarm is set and the alarm time has not yet arrived, the clock signal φ3 is activated.
It is activated by the output signal Dl of the AND gate 86 which generates at the output.

Next, the normal alarm notification operation of this embodiment will be explained using the time chart shown in FIG.

When the alarm time set by the user comes, the guide mechanism 14
The signal CI output by is set to rise to H level. At this time, when the alarm set switch 16 is in the set state, the signal A1 is at the H level, so the AND gate 20 is in the open state and generates the signal C1 as its output signal C8. This signal C8 is generated as the output signal A4 of the OR gate 26.

When this signal A4 becomes H level, the N-channel transistor 52 becomes conductive, and the melody RCM 34 becomes ready for output. On the other hand, when the signal A4 becomes H level, the AND gate 52 input to the signal Ct' via the inverter 50 becomes closed, and the program frequency divider 44 is released from the reset state by the action of the inverter 88.
Further, the address counter 36 is also released from the reset state when the output signals of the AND gate 90 and the OR gate 92 fall due to the change in the output of the inverter 8.

Further, when the signal A4 becomes H level, the one-shot multivibrator 56 outputs a one-pulse signal IBts, which is applied to the gate circuit 42 via the OR gate 54.

The gate circuit 42 is in an open state at this time and applies the output signal of the melody selection decoder 40 to the address counter 5B to indicate the first address of the selected alarm sound.

In this way, when the gate circuit 42 is in the open state, the AND gate 48 which inverts and inputs the pulse signal from the OR gate 54 is kept in the closed state, and the initial state of the address counter 36 is determined. up to address counter 3
6 is waiting for the application of clock signal φ2 to
A signal B22' in which the clock signal φ2 is generated immediately after the signal is applied to the address counter 36 from the gate circuit 42.
is applied to operate the address counter 36.

Further, when the output Q of the flip-flop 58 is at the H level and the signal A4 becomes the H level, the signal B23, which generates the cyclic signal φ1 from the AND gate 46, is applied to the program frequency divider 44. Operate.

This program frequency divider 44 is connected to the melody ROM'54 which has been read out by the address counter '56 which has started to operate.
The frequency dividing ratio is changed in accordance with the data signal from the controller, and the signal is applied to the sound generating circuit 45 to generate an alarm sound.

An alarm sound is generated in this way, but if this alarm sound is a melody, the end note detection decoder 3
8 is a middle detection signal C when a specific note in the middle of the melody is detected by the output of the address counter 36.
It is set to the s'iH level, and a trigger pulse is generated in the signal C9 when the last note of the melody is detected.

During normal alarm notification operation, the AND gate 52 to which the signal C3 is input is kept closed by the action of the inverter 50, so that the signal C3 is not generated in its output signal C4. On the other hand, when the trigger pulse signal C9 is output, the one-shot multivibrator 94 inputting this signal C9 generates one pulse and one pulse number C.
IO is output. This signal CIO is generated as a signal BIO via an OR gate 82, which resets the address counter 6 via an OR gate 92', and this signal Bto'
The flip-flop 58 input to the ff clock input φ outputs Q' to the output QIH level in synchronization with the rise of the clock.
(Switch to i=L level. This flip-flop 58
The signal from the output Q of the clock gate 46 closes and prevents the clock signal φ1 from being applied to the program divider 44, thereby stopping the alarm. The signal from output Q of flip-flop 58 is then applied to delay circuit 60 and delayed until address counter '56 is completely reset by signal 13ia, and then applied to one-shot multivibrator 62. .

This one-shot multivibrator 62 outputs a pulse in synchronization with the rising edge of the signal from the delay circuit 60, and this pulse causes the gate circuit 42 to be in an open state and again applies all the signals from the melody selection decoder 40 to the address counter 36. .

As a result, the melody ROM 34 in operation outputs melody data again from the beginning. At the same time as this pulse falls, the output Q of the 7-lip flop 58 becomes H level, and the AND gate 46 is opened again to apply the clock signal φ1 to the program frequency divider 44, and in accordance with this, the program frequency divider 44 is activated by the sound generation circuit. All signals are output to 45. As described above, in this embodiment, the standby circuit which waits for the generation of the alarm sound when the beginning of the melody is completed by the flip-flop 58 and the AND gate 46 is fully utilized.

When the switch 16 is operated to change the signal A+k from the H level to the L level while the alarm sound is being generated, the analogue game 20 is closed and its output signal C8 becomes the L level. For this reason, ORGATE 26
The output signal A4 also becomes L level.

With this drop, the N-channel transistor 32 becomes non-conductive, the power supply of the melody ROM 34 becomes OFF'F', and the AND gates 46 and 48 become closed, and at the same time, the output signal BI4 of the inverter 88 becomes By going high, the program frequency divider 44 is reset, and when the output signals of the AND gate 90 and OR gate 92 go high, the address counter 36 is also reset. When the operation of each circuit in the alarm setting circuit 30 is stopped in this way, the alarm notification operation is also stopped.

Next, the alarm setting confirmation operation when melody is selected as the alarm sound will be explained using the time chart shown in FIG.

The alarm is set by operating the alarm set switch 16, and by this operation, the signal AI output from the chattering prevention circuit 18 rises from the L level to the H level. When the signal Al rises to the H level in this manner, the one-shot multi-vibrator V-122 outputs the one-pulse signal A2 in synchronization with this rise.

In synchronization with the rise of this signal A2, the flip-flop 24 sets its output to the Q'lrH level. Signal A3 from output Q of flip-flop 24 is generated as signal A4 via OR gate 26.

When this signal A4 becomes H level, as mentioned above, N
The channel transistor 32 becomes conductive, the melody ROM 34 is turned on, and the inverter 88 is turned on.
The reset of the program frequency divider 44 is canceled by the function of the program frequency divider 44, and the AND gate 46 is opened, so that the signal B2g, which generates the clock signal φ1, is applied to the program frequency divider 44.

Further, when the signal BI3, which has reached the inverter 88KJtlH level, is inverted, the output signals of the AND gate 9o and the OR gate 92 become L level, and the reset of the address counter 5B is released.

Furthermore, when the signal A4 rises to the H level, a pulse is output from the one-shot multivibrator 56 and applied to the gate circuit 42 through all the OR gates 54.
A signal from the address counter 36 is applied to the address counter 36.

At this time, the melody selection decoder 4o inputs an H level signal Blk indicating that the melody is selected, and outputs an output from the AND gate 55 when the alarm set switch 16 is set while the melody is selected. The output signal B2. is also entered.

Therefore, the melody selection decoder 4o sends a signal specifying the address corresponding to the first note at the time of monitor notification of the melody I to the address counter 5 via the gate circuit 42.
6.

Immediately after receiving all the signals from the gate circuit 42, the address counter 6 reads out all data from the melody ROM"S4, and generates a melody as an alarm sound in accordance with this data.

In this way, the alarm set confirmation operation is started.

On the other hand, the end note detection decoder 68 detects a specific note in the middle of the melody from the output of the address counter 36, and outputs a trigger pulse signal Cs'c. At this time, since the AND gate 52 is kept open by the action of the inverter 50, this signal C3 is transmitted to the AND gate 52.
is generated as an output signal C4.

This signal C4 is generated as a signal C5 through the OR gate 96, and the flip-flop 24 is reset.

When flip-flop 24 is reset, its output Q
goes to the L level, and the signal output from the OR gate 26 also goes to the L level.

Therefore, the power of the melody ROM 34 is turned off, the anti-game) 46, 48 is closed, the program frequency divider 44 is reset via the inverter 88, and the AND gate 9o and the or-game) 91 are reset. The address counter 36 is also reset.

Therefore, the operation of monitoring and generating the alarm sound is stopped when the end note detection decoder 38 outputs the signal Cs.

The address of the first note indicated by the above-mentioned melody selection decoder 40 at the time of monitor notification of melody (2) and the note in the middle of the melody detected by the end note detection decoder 58 are determined for each melody stored in the melody ROM 34. predetermined.

For example, if the melody (2) is as shown in FIG. 4, the platinum can be immediately identified by listening to the melody from X1 to X2, judging from the structure of the platinum body.

Therefore, when the signal B24 from the AND gate 55 is at H level, the full signal is output from the melody selection decoder 40 to designate the address corresponding to If you set the end note detection decoder 8 to detect the address corresponding to It is possible to notify which song is set.

On the other hand, the melody ROM'54 in this embodiment stores eighth notes of the required pitch in one address, and when the length of the note is long, the data of the same note is continuously stored. It is set to be longer by storing it in several addresses.

That is, an eighth note is represented by one address, and a quarter note is represented by two addresses of the same data.

Therefore, the melody selection decoder 40
The arrangement is such that the address of the note is designated as the first note, and the decoder for detecting the full end note of the 8th position of the note "G" in the 8th measure is detected and outputted as a signal C3'r.

Also, if the melody shown in Figure 5 is set as the melody ■, you can identify the song by listening to the beginning of the first measure to the end of the second measure, so the melody ■ shown in Figure 4 can be identified. , the melody selection decoder 40 starts the melody by outputting a signal specifying the first address of the melody in the same way as in the case of normal alarm notification, and the ending note detection decoder 38 outputs a signal specifying the first address of the melody in the same way as in the case of normal alarm notification. The melody may be stopped by detecting the fifth position of the "u" sound or the next "shi" sound and outputting the signal Cs'. This melody is a bird's voice.

It may also be a pseudo sound such as the sound of waves.

Next, using the time chart shown in FIG. 6, an explanation will be given of the alarm setting confirmation operation when an electronic alarm sound such as a krickerato sound is selected as the alarm sound.

When the cricket sound is selected, the signal B3 from the alarm sound selection switch 68 is at the H level. This signal B3 is applied to the melody selection decoder 40 and also to the AND gate 86. This AND gate 86 also inputs the signal C2 which is normally kept at H level, and when the Cricket sound is selected and the alarm set switch 16 is operated to set the signal A+k to H level, the AND gate 86 When the clock signal φ3'f is in the open state, the clock signal φ3'f: is generated as the signal D1. The counter 84 inputted to this signal DJ' starts a callantra.

On the other hand, when the signal A1 becomes H level, the one-shot multivibrator 22 outputs a pulse, and in synchronization with the rising edge of this pulse, the signal A3 from the output Q of the flip-flop 240 becomes H level. This signal A3 is generated as a signal A4 via the OR gate 26, and when this signal A4 becomes H level, the melody ROM 7+4, address counter 66, gate circuit 42, etc. confirm the alarm set when the aforementioned melody is selected. Perform the same action as the action. However, if a crikerato sound made by repeating the same sound is selected, the end note detection decoder 38 detects the middle or the end of the alarm sound and does not output the signals C3 and Csk, but when the switch 16 is set. It is stopped by the count-up of a counter 84 which operates at the same time.

That is, the color switch 84 is activated by operating the switch 16, and after counting for a certain period of time, its output Q is a signal D++'! of fiH level! Output. This signal D2 is applied to the reset force R of the flip-flop 24 through the Ohgelt 96, and the flip-flop 24 is completely reset.

When flip-flop 24 is reset, its output Q
becomes the L level, and the output signal of the OR gate 26 becomes the L level.
Upon reaching the level, the melody ROM 64, address counter 56 and program frequency divider 44 stop, and the alarm set confirmation operation also ends.

Further, when the flip-flop 24 is reset and the signal A5 outputted from its output Q becomes H level, the counter 84 which inputs this signal As' to the reset power R via the OR gate 98 is fixed in the reset state. . This counter 84 receives a signal C! from the indicator mechanism 14 so as not to operate during normal alarm notification. Total inverter 50,1
It is also input via 00 and ORGATE 9 days.

Incidentally, it is also possible to use the melody ROM 34k and create a unique logic for the electronic alarm sound such as the crackerato sound generated by such an operation.

Next, using the time chart shown in FIG. 7, the entire operation will be explained when the screen is switched during the alarm notification operation when a melody is set as the alarm sound.

In this embodiment, the alarm sound is switched by operating the alarm sound selection switch 68. When the switch 6B is operated to select melody I, melody 2, or cliché ratto, the signals B1+B2gB3 are set to H level, respectively.

The F number Bt is applied to the clock input φ of the flip-flop 70 and is also applied to the reset input R of the flip-flop 72 and 74 via the OR gates 104 and 106'i. The signal B2 is applied to the clock signal φ of the flip-flop 72 and the OR gate 102.
, 106'i to reset the flip-flops 70, 74. The signal Bs is applied to the clock signal φ of the flip-flop 74 and is applied to the clock signal φ of the flip-flop 74 via
A reset human power R is applied to the terminals 7' 70 and 72.

The time chart shown in Fig. 7 shows that when melody ■ is set (when signal B is at H level),
After the output signal CI of 4 becomes H level and the alarm notification operation starts, the alarm sound is played as a melody during this operation.
This shows the operating state when the switch is switched to (signal B2 goes to H level).

The alarm notification operation when the output signal CI of the reference mechanism 14 becomes H level is the same as that described above.

During this operation, when the alarm sound selection switch 68 is operated to switch to the melody ■, the signal B2 becomes H level, the flip-flop 70 is reset, and the output Q of the flip-flop 72 goes high in synchronization with the rise of the signal B2. rise to the level. In synchronization with the rise of this output Q, the one-shot multi-vibrator 8 outputs a pulse signal Bg.
'f is output, and this signal B8 is generated as a signal BIQ through an OR gate 82. When a pulse is generated in this signal BIG, the address counter 6 is immediately reset via the OR gate 92. Furthermore, in synchronization with the rise of the signal BIG, the output Q of the flip-flop 58 is set to L level, the AND gate 46 is closed, and the program frequency divider 4 is closed.
The signal B23 is completely blocked from being applied to the signal B23 to stop the alarm sound. In addition, the output Q of the flip 70 knob 58 is
It becomes H level, and this output signal is applied to the one-shot multivibrator 62 via the delay circuit 60i. After the address counter 36 is reset by the signal B16, the one-shot multivibrator 62 outputs all pulses and opens the gate circuit 42 via the OR gate 54. In this case, the melody selection decoder 40
The output signal has already been switched to indicate the entire first address of melody ■ in the melody ROM 34 due to the signal B2 becoming H level, and this output signal is sent from the gate circuit 42 to the address counter 3B. applied.

The address counter 36 reads the melody ROM from the first address of the melody (■) specified by the melody selection decoder 40.
"+4 is read out. After this, the output Q of the flip-flop 58 becomes H level, the AND gate 46 is opened again, the clock signal φ1 is applied to the program frequency divider 44, and an alarm sound is generated. .

In this way, when the alarm tone selection switch 68 is operated to change all the melodies during the alarm notification operation, the changed melody is immediately generated from the beginning. Note that even if the alarm sound selection switch 68 is operated during the alarm set confirmation operation, the switched melody will be generated from the beginning in the same manner as described above.

FIG. 8 is a diagram showing a partially modified example of the alarm setting circuit 3o shown in FIG. 1.

The end note detection decoder 38 in the alarm setting circuit 3o shown in the figure is configured to detect the middle and end of a melody from the data signal output from the melody ROM 34.

In this case, as shown in FIG. 9, the contents of the melody ROM 34 are such that the contents of the notes and all discrimination data for intermediate detection are stored at each address, and when this discrimination data is H (or L), The end note detection decoder '58 is set to output a signal C3.

In order to have the end note detection decoder 38 detect the end of the melody, the entire memory content of the melody ROM 54 must be increased by 1 bit to store discrimination data for the end of the melody or the next note, or the end of the note content may be left blank. It is also possible to leave it in the state and have it all detected.

The features and effects of the present invention described above are listed below.

(1) In the present invention, an alarm sound is generated each time the alarm set switch is operated to set the alarm, so it can be confirmed that the alarm mechanism is reliably set.

(2) Since the alarm sound generated each time the alarm set switch is set is the selected melody or electronic alarm sound, the currently set alarm sound can be determined.

(3) The melody that is monitored and broadcast for each alarm set is stopped at a well-defined point in the melody structure of each melody, so it is possible to identify the melody in a short time.

(4) The melody monitor notification in the alarm set confirmation operation is set to skip and notify only the most easily distinguishable part of each melody, but in the alarm notification after this monitor notification, the melody Since the melody is configured to be cued, a regular melody can always be reported when an alarm is reported.

In this manner, the present invention provides an alarm setting confirmation mechanism that reliably notifies that an alarm has been set.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing an embodiment of the present invention, Fig. 2 is a time chart of normal alarm notification operation, and Fig. 3 is a time chart of alarm set confirmation operation when melody ■ is selected as the alarm sound. Chart, Figure 4 shows an example of a melody as an alarm sound, Figure 5 shows an example of another melody, and Figure 6 shows an alarm set when an electronic alarm sound such as a krikerato sound is selected. Figure 7 is a time chart for the confirmation operation, and Figure 8 is a time chart for when the song is switched during the alarm notification operation.
9 is a diagram showing an example of a partial modification of the alarm setting circuit shown in FIG. 1, and FIG. 9 is a diagram showing an example of the stored contents of the melody ROM when the alarm setting circuit is changed to the alarm setting circuit shown in FIG. 8. 14... Reference mechanism, 16... Alarm set switch, '50... Alarm setting circuit, 54... Melody ROM. 36... Address counter, 58... End note detection decoder, 40... Melody selection decoder, 42.
...Gate circuit, 44...Program frequency divider, 56...One-shot multivibrator, 54...
・Orgate, 58...Flippuff Yotsubu, 60...
・Delay circuit, 62...One-shot multivibrator, 68...
・Alarm sound selection switch. JP-A-59-157589 (13)

Claims (1)

[Claims] (1) For watches with alarms in which multiple alarm sounds including melodies can be selected, the operation is started by the set operation signal of the alarm set switch, and the selected melody alarm sound is set in the melody note structure. An alarm setting confirmation mechanism is characterized in that monitor notification is made to start from a note in the middle and stop at a subsequent set note.