JPS59150363A - Stop watch - Google Patents

Abstract

PURPOSE:To simplify the construction of the operation part by switching a plurality of time counting means sequentially to specify by the operation of a specifying switch while the time counting means specified is controlled with one start/stop switch. CONSTITUTION:Output of an oscillation circuit 20 is divided with a division circuit 21 and a time counting signal is outputted. A time counting type counter 22 is composed of a second counter 22, a minute counter 24, a hour counter 25, a date counter 26, a month counter 27 and a week counter 28. By the operation of a switch 52, the counters 23-25 are specified and the counter specified is zero set with a reset switch 55 while it is started or stopped by the operation of a start/stop switch 54. Otherwise, when the simultaneous operation mode is specified with a switch 53, all counters are zero set by the operation of the switch 55 and by the operation of the switch 54, all counters are started or stopped simultaneously.

Description

[Detailed description of the invention] [Field of use in the field of work] The present invention relates to improvements in stopwatches.

[Prior art and problems]

There are many stopwatch devices on the market that cannot be used in conventional electronic timepieces equipped with electro-optical display devices.

However, conventional stopwatches are mostly single-function stopwatches consisting of a single timekeeping device, a zero reset switch, and a start/stop switch, with a lap memory function; By adding dk to the lap memory, there is a device that has the function of measuring the number of each lap during interval practice and the order of layers by a plurality of players.

However, in recent years, orienteering competitions in which competitors compete at different start times have become popular; A system in which as many stopwatches as the number of athletes are prepared and independently managed. [Object of the Invention] The purpose of the present invention is to solve all of the above-mentioned drawbacks. We will provide a stopwatch r that can collectively manage multiple competitors at different times.

[Structure of the invention]

A plurality of timekeeping means, a stopwatch circuit such as a control circuit for controlling the operation of the timekeeping means, and a device for supplying a timekeeping means designation signal, a zero reset signal, and a start/stop signal to the stopwatch circuits, respectively. a designation switch, a reset switch, a start/stop switch, and an electro-optical display device for displaying information on the stopwatch circuit, wherein the control circuit constituting the stopwatch circuit is designated by the timekeeping means designation signal. The present invention is characterized in that it is configured to supply a zero reset signal and a start/stop signal to the timekeeping means.

[Embodiments of the invention]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which an electronic timepiece is equipped with a stopwatch of the present invention will be described below with reference to the drawings.

FIG. 1 is an analytical view of an electro-optical display device according to the present invention.
As is well known, the liquid crystal cell 2 includes an upper glass 4, a lower glass 5, a liquid crystal substance 7 sealed between the two glasses 4 and 5, an upper polarizing plate 8, a lower polarizing plate 9, etc. The EC cell 6 has an upper glass 10 and a lower glass 11.
, is composed of an EC material sealed between the circular glasses 10 and 11.

FIG. 2 is a plan view showing the display pattern of the EC cell 6 which is the main display cell, and includes a first display section 3a, a second display section 3b,
A fifth display section 3e consisting of each number display pattern of the third display section 3c% and the fourth display section 3d1 and seven day of the week display patterns;
and a sixth display section 6f consisting of a colon display pattern.

FIG. 3 is a plan view showing the display pattern of the liquid crystal cell 2, which is a sub display cell.The liquid crystal cell 2 is provided with four columns of display blocks 2a, 2b, 2c, and 2d, and the valley display blocks are 4 each consisting of 2115 number patterns
It consists of a set of display digits and three marks that separate each display digit. FIG. 4 is a plan view showing the display state of the Sakomotogaku display device 1 17, which shows a normal time display state in an electronic watch. That is, the first display section 6a of the EC cell B shows the hour, the second display section 6b shows the minute, the third display section 6c shows the month, the fourth display section 6d shows the date, the fifth display section 6e shows the day, and the sixth display section 61 A colon mark is displayed on the first display block 2 of the liquid crystal cell 2.
In addition to displaying one function, the rightmost display digit 2bl of the second display block 2b is used to display the letter A or P indicating AM or PM, and the right shoulder display digit of the third display block 2c is used to display one function. Seconds are displayed on 2C1.

Therefore, the display state shown in the example on the main side is full time display of 12:50, 20 seconds on Friday, October 30th, and all displays except seconds, AM, and AM marks are EC.
A bright color display is provided by the cell 6, and a black and white display is provided by the liquid crystal cell 2 only for displaying seconds with a short switching cycle of display information.Also, the first display block 2a of the liquid crystal cell 2 includes:
Memory information for the alarm function (October 30th 13:00) is displayed, and the function information display by the liquid crystal cell 2 is visually different from the clear color display of the time information by the EC cell 6. discrimination is given.

Fig. 5 shows how the electronic clock according to the present invention can be displayed in a sea alarm mode using an external shock control member (not shown)! This shows a changed state, in which all the display of the EC cell 6 is erased and all the information of the liquid crystal cell 2 is displayed instead.

In this state, the EC cell 6 must be in a non-display state,
Since the display surface becomes a bright white background, the liquid crystal cell 2 can perform good reflective display using this white background as a reflective surface.

In this embodiment shown in FIG. 5, four columns of display blocks 2a to
Four alarm times are set in 2d-s9, and the alarm time closest to the current time is displayed in the upper display block 2a, and then 2b12c in order of closest to the current time.
It is displayed on 12d.

This display order is automatically detected and corrected in chronological order as described later. Therefore, the alarm memory information in the time display state shown in FIG. 4 always displays the alarm time closest to the current time.

The way to set the alarm time in the above alarm machine mode is to display the 3 digits from the left of each display block,
Alarms may be set for hours, minutes, and seconds, or the fourth guard may also be displayed, and alarms tlA1, A2, and A3 may be displayed on this sheath.

Next, when the electronic timepiece of the present invention is set to the system block watch mode using an external operating member, each display block 2a, 2bζ2c12d of the liquid crystal cell 2 becomes an independent stopwatch, and each display digit is changed from the left to hour, minute, hour, minute, etc. 1/100 of a second
You can use this as a second. In this case, the four stopwatches may be operated independently, or
It is also possible to start at the same time and display 1st place, 2nd place, 3rd place, and 4th place sequentially from the upper display block.

FIG. 6 is a block diagram of the electronic timepiece according to the present invention, -20 is an oscillation circuit with a reference oscillator kirN, 21 is a frequency dividing circuit, which divides the frequency of the signal from the oscillation circuit 20 (1f(
A clock signal ρ1 of z is generated. 22 is a time counter, second counter 26, minute counter 24, hour counter 2
・5, day counter 26, month counter 27, week counter 2
It is composed of 8.

29 is an alarm memory circuit, and the first memory 301 and the second
It is comprised of four memories, ie, a memory 1, a third memory 62, and a fourth memory 66, and a comparison/correction circuit 64 that compares and corrects the order of alarm times set in each of the memories. 65 is a stopwatch circuit, which includes a first counter 66, a second counter 37, and a third counter, which are a plurality of time measuring means.
It is comprised of four independent stopwatch counters, a counter 68 and a fourth counter 69, and a control circuit 4U that controls the operation of each counter. 41 is a display switching circuit, a timing counter 22, and an alarm memory circuit 2.
9 and the stopwatch circuit 35, and display each information on the EC display cell 6 and the liquid crystal display cell 2 constituting the electro-optical display device 1 as described above.

Reference numeral 42 designates a coincidence detection circuit, which is composed of a minute coincidence circuit 46, an hour coincidence time g44, a day coincidence circuit 45, and a month coincidence circuit 46. , month counter 2
7 and the first memory 6 constituting the alarm memory circuit 29
Detects coincidence with the alarm time stored in o and generates a coincidence signal. Reference numeral 47 denotes a buzzer drive circuit which operates upon receiving the coincidence signal to drive the buzzer 48 for a certain period of time to generate an alarm sound.

Reference numeral 50 denotes a stopwatch frequency dividing circuit, which divides the frequency of the signal from the frequency dividing circuit 21 to generate a 100 Mz clock signal ρ 2 and supplies it to the stopwatch circuit 65 . Reference numeral 51 denotes a function designation circuit, which switches the display at the same time as the circuit of the designated function is activated by operating an external ridge member, which will be described later.

52, 56, 54, and 55 are all switches controlled by external operating members, and 57, 58, and 59 are waveform shaping circuits for shaping switch operation signals into pulses.

Next, the operation of the electronic timepiece having the above configuration in each mode will be explained.

First, when the function designation circuit 51 designates the normal clock mode, the display switching circuit 41 selects information from the time counter 22 and the first memory 60 of the alarm memory circuit;
The display shown in FIG. 4 is performed.

Next, when the switch 52 is operated to designate the alarm mode, the display switching circuit 41 selects the information of all memory circuits in the alarm memory circuit 29, resulting in the display state shown in FIG. In this state, each memory circuit can be sequentialized by operating the switch 56, and the display block corresponding to the designated memory circuit will have a delimiter mark provided at its center blinking. .

Furthermore, each display digit of the designated memory circuit is controlled by a switch 54.
It can be specified by the operation.

The designated display digit is identified by blinking, and by correcting the designated display digit by operating the switch 55, the alarm time can be set as desired. The alarm times set in each memory circuit are compared by the comparison/correction circuit 64, rearranged in chronological order, and always stored in the alarm time clock 1 memory 6U closest to the current time. In addition, in real products, the operation and non-operation settings of each of the above alarms are identified by lighting or non-lighting of a separator mark provided in the center of each display block, and furthermore, the day and month of the valley memory circuit are indicated. By setting the memory information to zero, it is possible to perform an alarm operation using only hour and minute information.

Further, when the stopwatch mode is specified by operating the switch 52, the display switching circuit 41 selects information on all counters of the stopwatch circuit 65, and the liquid crystal display 2 becomes fully displayed as shown in FIG. In this state, each counter can be sequentially designated by operating the designation switch 56, and three delimiter marks blink in the display block corresponding to the designated counter.

(The rotated counter is reset to the reset switch 55.
By operating the start/stop switch 54 to reset the clock to zero, and by operating the start/stop switch 54 to start and stop the watch, each can be operated as an independent stopwatch.

Also, if the simultaneous operation mode is specified by the switch 56,
The delimiter mark of the display block corresponding to all counters flashes. In this mode, all counters are set to zero by operating switch 55, and all counters are started simultaneously by first operating switch 54. Then, the operation of the counter 36 is stopped by the next operation of the switch 54, and the display block 2a in FIG.
The counters 37, 38, and 39 are displayed as the first place, and thereafter, each time the switch 54 is operated, the counters 37, 38, and 39 are stopped in order, and the display blocks 2b, '1. c, 2d will be displayed as 2nd, 3rd, and 4th place.

The switch function in the stopwatch mode and the input control of the clock signal ρ2 are performed by the control circuit 40.
controlled by

Also, even when the stopwatch is in operation, it is possible to return only the display to the time display mode shown in FIG. 4 by operating the switch 52. is displayed.

FIG. 7 shows an embodiment in which the main display cell is composed of a liquid crystal cell 80, and a display pattern of only the first display section 80a1, second display section HBsob, fifth display section 80e1, and sixth display section 80f is provided, and the display pattern shown in FIG. Third display section 3 ON in EC cell 6
The pattern corresponding to the fourth display section 3d is omitted, and the month and day information displayed in this section is displayed up to the second digit from the left of the fourth display block 2d in the sub display cell 2. This can be done using digits.

When using liquid crystal cells as both the main display cell and the sub-display cell as described above, the liquid crystal cell 80 for the main display that constantly displays time information is driven by a static drive method with a high operating margin. [Effects of the Invention] The number of connection electrodes can be reduced by adopting a matrix drive method for the sub-display liquid crystal cell 2 with a large number of turns. According to the present invention, a plurality of timekeeping means constituting a stopwatch circuit are sequentially switched and designated by operating a designation switch, and one timekeeping means in a designated state is switched.
By controlling each start/stop switch, it can be used as multiple independent stopwatches, and as shown in the example, depending on the selection conditions of the control circuit, it can also be used as a multi-stopwatch with simultaneous starts. This significantly improves the functionality of a watch, and since the number of operating members is not much different from that of a conventional stopwatch, it can also be installed in small I-equipment devices such as electronic watches.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view of the electro-optical display device of the present invention, FIG. 2 is a plan view of the EC cell in FIG. 1, FIG. 3 is a plan view of the liquid crystal cell in FIG. 1, and FIG. , and FIG. 5 are plan views showing the display state of the electro-optical display device of FIG. 1, FIG. 6 is a block diagram of an electronic timepiece according to the present invention, and FIG. 7 is a diagram showing another embodiment of the present invention. FIG. 2 is a plan view of an example liquid crystal cell. 1... Electro-optical display device 2... Liquid crystal display cell 6... Electromism display cell 22... B ten o'clock counter 29... Alarm memory circuit 65... Stopwatch circuit. Figure 1 Figure 3 Figure 5 801 80e

Claims (1)

[Claims] (1) A plurality of timekeeping means, a stopwatch circuit such as a control circuit that controls the operation of the timekeeping means, and supplying a timekeeping means designation signal, a zero reset signal, and a start/stop signal to the stopwatch circuit, respectively. A stopwatch designation switch, a reset switch and a start/stop switch, and a stopwatch electro-optical display device for displaying information of the stopwatch circuit, and the control circuit constituting the stopwatch circuit is designated by a timekeeping means designation signal. 1. A stopwatch, characterized in that it is configured to supply a zero reset signal and a start/stop signal to a timekeeping means that has been set up. (2. In the stopwatch circuit according to claim 1, the control circuit has an independent operation mode in which each timekeeping means is designated independently, and a simultaneous operation mode in which a plurality of timekeeping means are designated simultaneously. However, in simultaneous operation mode,
Zero reset belief! and a stopwatch that simultaneously supplies start and stop signals to the plurality of timekeeping means.