JPS5914812Y2 - constant current circuit - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a constant current circuit using a junction field effect transistor.

When a constant current circuit is constructed using a junction field effect transistor, the circuit is designed to operate in a saturation region in the drain current vs. drain-source voltage characteristic (drain output characteristic) of the junction field effect transistor.

However, since the characteristic curve has a slight slope in the saturation region of this drain output characteristic, voltage fluctuations in the power supply supplied to such a constant current circuit change the drain-source voltage, causing a slight increase in the drain current. It will cause change.

The purpose of the present invention is to realize a constant current circuit that is not affected by power fluctuations with a simple configuration.

Still another object of the present invention is to obtain a stable constant current circuit that is independent of temperature.

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is an electrical circuit diagram showing an embodiment of the present invention.

Ql and Q2 are field effect transistors (hereinafter referred to as JFETs), and R1, R2, and R3 are resistors.

■ is the power supply.

Out is the output terminal of the constant current circuit of the present invention.

The drain terminal of J-FETQl is connected to the source terminal of J-FETQ2, and the drain terminal of J-FETQ2 is connected to power supply V.

The source terminal of J-FETQ is connected to one end of resistor R1, and the other end a of resistor R1 is connected to output terminal Out and J-FE
Connected to the gate terminal of TQl.

One end of the resistor R2 is connected to the drain terminal of the J-FET Ql, the other end of the resistor R2 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the other end a of the resistor R1.

The connection point between resistor R2 and resistor R3 is connected to the gate terminal of J-FETQ2.

The operation of the circuit of the present invention constructed as described above will now be described.

Most of the drain current ID2 flowing through the J-FET Q2 flows to the drain terminal of the J-FET Ql, flows from the source terminal through the resistor R1, and comes out to the output terminal Out.

The remainder flows through the series circuit of resistors R2 and R3 to the output terminal O.
It comes out in ut.

The drain current IDI of the J-FET Ql is dropped by the resistor R1 to determine the gate-source voltage V65□.

FIG. 2 is an operation explanatory diagram for explaining the operating points of J-FETQl.

1 is the IDI vcs of J-FETQl, a curve showing the characteristics, 2 is the characteristic curve (straight line) when the voltage drop -R1■D1 that occurs across the resistor R0 is taken on the V6.1 axis for each part of IDI. ), the drain current value IDl0 and gate-source voltage VGSIO at the intersection P1 of both are J7F
This is the constant current operating point of ETQ1.

On the other hand, the voltage v applied between the gate and source of J-FETQ2
This is because 65□ is equal to the voltage generated across the resistor R2.

Further, the drain current ID2 is equal to the current flowing through the resistors R2 and R3 plus IDl0.

In equations (1) and (2), the drain current IDl0 is constant and the drain-source voltage vD5□ can change in the saturation region, so v65 in equation (1) corresponds to each level of the drain-source voltage vD5□. ID of formula (2) with □ on the horizontal axis
If 2 is plotted on the vertical axis, a characteristic curve (straight line) like 4 in FIG. 3 is obtained.

Figure 3 shows J-FETQ. This is an operation explanatory diagram for explaining the constant current operation of
At the drain-source voltage vD51, the entire circuit in Fig. 1 is in an equilibrium state, and at this time J-F
ETQ2 drain-source voltage v65□0 drain current■.

2o is the constant current operating point of J-FETQ2.

As is clear from the above explanation, J supplied from the power supply ■
The drain current ID2 of -FETQ2 becomes constant, and as described above, the drain current IDI of J-FETQl also becomes constant.

Therefore, the current flowing through the series circuit of resistors R2 and R3 is also I
D2 IDI = ID20 is constant at ID10.

In other words, the voltage across the series circuit of resistors R2 and R3, ie, the voltage between the drain and gate of Ql, becomes constant.

Moreover, since the current IDI flowing through the resistor R1 is constant,
Voltage V65. across resistor R1. is constant.

In the end, the drain-source voltage VD8 of J-FETQl
□ becomes constant.

Even if the voltage of the power supply (■) changes, the drain-source voltage of J-FETQ2 is V for constant current operation of JFETQ2.

5□ changes accordingly, so the drain voltage of J-FET Ql is held constant.

In this way, fluctuations in power supply (2) are absorbed by Q2.

In this way, the device of the present invention can provide a constant current circuit that is not affected by power fluctuations.

FIG. 4 is a diagram showing drain current versus gate-source voltage characteristics (transfer characteristics) of a field effect transistor.

In the figure, the upward vertical axis represents the drain current I, and the horizontal axis represents the gate-source voltage ■.

5 is taken to be negative when facing left.

Gate-source voltage v6. The source end is at the reference potential.

T1. T2. T3 indicates absolute temperature, To<T2<T3
shall be.

T1. T2. Looking at the change in transfer characteristics obtained at each temperature of T3, there is an operating point that is independent of temperature.

The value of the drain current at the operating point where the temperature coefficient becomes zero is IDO, and the gate-source voltage is v68o.

Now, in the constant current circuit according to the present invention shown in Fig. 1, if the value of the resistor R1 is determined as follows, then the JFETQ
l becomes independent of temperature.

In addition, the gate of J-FETQl by resistors R2 and R3
The voltage division ratio of the voltage between the drains also depends on the gate and drain voltage of J-FETQ2.
The source-to-source voltage (1) is determined at a value such that it is near the operating point where the temperature coefficient is zero.

Usually, the values of resistors R2 and R3 are set to be sufficiently large compared to resistor R1 in order to be independent of temperature and at the same time to make the drain currents of J-FETs Ql and Q2 almost equal.

In this way, it is possible to realize a constant current circuit that is not affected by power supply fluctuations and is not affected by temperature changes.

As explained above, the constant current circuit according to the present invention includes a first field effect transistor, a second field effect transistor whose source terminal is connected to the drain terminal of the first field effect transistor, and a second field effect transistor whose source terminal is connected to the drain terminal of the first field effect transistor. a resistor connected between the gate and source terminals of one field effect transistor;
a voltage dividing circuit that divides the voltage generated between the drain terminal and the gate terminal of the first FET and applies the divided output voltage to the gate of the second field effect transistor; This is a constant current circuit that obtains an output current from the point where the gate terminal of a field effect transistor is connected.

According to the present invention, a stable constant current circuit that is unaffected by power supply fluctuations and temperature changes can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing a constant current circuit according to the present invention, Figs. 2 and 3 are operation explanatory diagrams for explaining the constant current operation of a field effect transistor, and Fig. 4 is a diagram showing a change in temperature of a field effect transistor. FIG. Ql, Q2...field effect transistor, R1, R2,
R8...Resistance.

Claims (2)

[Scope of utility model registration request] (1) between a first field effect transistor, a second field effect transistor whose source terminal is connected to the drain terminal of the first field effect transistor, and the gate and source terminals of the first field effect transistor; and a voltage divider circuit that divides the voltage generated between the drain terminal and the gate terminal of the first field effect transistor and supplies the divided output voltage to the gate of the second field effect transistor. A constant current circuit, comprising: a constant current circuit that obtains an output current from a point connected to a gate terminal of the first field effect transistor. (2) The value of the resistance connected between the gate and source terminals of the first field effect transistor is set so that the operating point is near the point where the temperature coefficient becomes zero in the transfer characteristics of the first field effect transistor. The constant current circuit according to claim 1, wherein the operating point of the voltage dividing circuit is determined to be near the point where the temperature coefficient becomes zero in the transfer characteristic of the second field effect transistor.