JPS59146387A - Stack control system of multiprocessing - Google Patents

Abstract

PURPOSE:To start access immediately in process switching and to speed up the switching by preparing save and restoration to dispose a stack which is used in an actuated process on an actual stack prior to the process switching. CONSTITUTION:Plural stacks 1-3 are regarded as actual stacks A-C of hardware and the stacks A-C are applied to a transfer control circuit 4 for a main storage device. A process sequence determining circuit 5 determines the basic start sequence of plural processes and a process waiting state detecting circuit 6 detects the waiting state of a process to estimate a waiting time. If the waiting state occurs to this actuated process, the basic start sequence of processes is converted by a process list control circuit 7 according to the estimated time to generate a process list 8 showing the estimated start sequence of processes. Then, a stack allocation control circuit 9 controls the circuit 4 to speed up the switching of access.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a stack control method, and more particularly to a stack control method that enables high-speed process switching by controlling stack switching in advance in multi-process processing. .

[Technology background]

In multi-process systems that handle multiple processes (programs or tasks) at the same time, stacks are often used to simplify the management of each process state and to efficiently switch processes. However, as shown in Figure 1, if there are a large number of processes (1 to n) that are to be processed at the same time, the stack actually prepared on the 7S-ware in the system. (Actual stack) is limited to about 2 to 4 due to hardware constraints.

Generally, the number is smaller than the number of processes (in the illustrated example, there are two A and B).

For this reason, conventionally, the stacks (logical stacks or virtual stacks) of multiple processes are stored in main storage, and only the stacks of a small number of processes, including the started process, are stored on the hardware. The method is to place it on the real stack. However, with this method,
When switching the currently running process to another process,
If the stack for the newly +tl+ process did not exist on the real stack, it was necessary at this point to restore the process's stack from main storage to the real stack.

Therefore, in the conventional method described above, overhead is generated for stack restoration processing when switching processes.
The drawback was that the switching time was delayed.

[Object and structure of the invention]

An object of the present invention is to eliminate the overhead for stack restoration accompanying process switching in a multi-process processing system, by predicting the process that will run after the currently running process, and by predicting the process that will run after the currently running process. The purpose of this invention is to speed up process switching by restoring the stack used by the process onto the real stack prior to starting the process. Accordingly, the configuration of the present invention is a multi-process stack device for performing multi-process processing, which includes two or more stacks, a circuit that determines the basic starting order of a plurality of processes, and a circuit that determines the basic starting order of a plurality of processes. A circuit that detects the occurrence of a waiting state and predicts the waiting time, and a circuit that changes the basic starting order of the plurality of processes according to the predicted waiting time when a waiting state occurs in the started process. and a process list control circuit that creates a process list representing a predicted starting order of processes, and according to the created process list.

The method is characterized in that allocation of processes to the two or more stacks is controlled in advance.

[Embodiments of the invention]

First, the operating principle of the present invention is explained in Fig. 2 (αJ, (b
).

(Explained according to , J.

For convenience of explanation, the number of actual hardware stacks is expressed as 2.
As shown in the figure (al), there are two processes, A and B, and the startup order of the processes is as shown in F6 of the figure, process 1. Process 2. Process 3. It is assumed that the order of... is followed. Generally, in real-time systems such as process control systems, it is difficult to predict in advance the order in which processes will be started, but in batch processing and TSS processing systems, jobs are started at regular intervals. In addition, even if a process is in a waiting state due to waiting for an input/output device to complete its operation, the time it takes for the waiting state to be resolved can be roughly predicted, so it is possible to predict which process should run after the currently running process. is possible. For example, in the case of a process waiting for the completion of an input/output device, the average waiting time for each device such as a magnetic disk device is measured to secondly predict the time when the process will be started. It is possible to
Furthermore, the order of batch processing and TSS processing is determined by a schedule management module that is part of the operating system.

Therefore, as shown in FIG. 212 (C), when process 1 is in operation and process 1 has finished using stack A, the stack used by process 2 is restored in stack B. When process 2 is started instead of process 1, process 2 uses stack B, which has already been restored.

At the same time, the stack of process 1 in stack A is saved to the main memory, and then the stack used by process 3 is restored from the main memory.

Similarly, the stack of the process running next to the currently running process is restored prior to starting the process, and when the process is switched, the stack of the started process is restored. This enables immediate operation.

If the number of stacks is 3 or more, even if the next process started by process switching is inoperable due to waiting for input/output devices to complete, etc., the next process will be started immediately without stack replacement. can do.

As described above, by restoring the stack prior to starting a process, the time spent waiting for stack restoration at the time of process switching is reduced.

2 and 3 are configuration diagrams of a multi-process stack control circuit according to an embodiment of the present invention based on the above-described operating principle.

In the figure, 1, 2.3 indicate the real stacks A, B, and C of Dounia North, respectively, 4 is a main memory transfer control circuit, and 5 is a process order determining circuit.

6 is a process waiting state detection circuit, 7 is a process list control circuit, 8 is a process list, and 9 is a stack allocation control circuit.

In this embodiment, the number of nodeware stacks is three, but it can be applied even if it is two or more ('i).

The process order determining circuit 5 is provided with a scheduling module of the operating system.

Data is provided indicating the order in which processes are started. When a wait for completion of an input/output device occurs in a process, the process waiting state detection circuit 6 detects the number of the process in which the wait for completion has occurred and its estimated waiting time.

The process startup order, the detected waiting state process number, and the predicted waiting time are transferred to the process list control circuit 7, where the currently running process is placed first and the processes to be started next are stored. A process list 8 is generated.

Process list 8 is based on the starting order of processes, and the order of processes waiting for completion of input/output devices is modified in consideration of the waiting time.

The stack allocation control circuit 9 assigns stack A and stack B based on the generated process list 8.

The order of saving and restoring the stack in stack C and the times at which the saving and restoring should be performed are determined, and the main memory transfer control circuit 4 is controlled to execute the saving and restoring. The procedure by which the stack allocation control circuit 9 controls the saving and restoring of the stack follows the method explained in Fig. 2.

〔Effect of the invention〕

According to the invention, in multi-process processing.

By preparing the saving and restoring necessary to place the stack used by the activated process on the real stack in advance of switching one process.

When a process is actually switched to start the process, stack access can be started immediately, and the process is switched at high speed.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram showing a general stack configuration method in a multi-process processing system, Fig. A-2 is a detailed explanatory diagram of the present invention, and Fig. 3 is a configuration diagram of an embodiment of the present invention. In the figure, 1, 2.3 are stacks A, B, and C of hardware balls, respectively, 4 is a main memory transfer control circuit, and 5 is a main memory transfer control circuit.
6 represents a process order determination circuit, 6 a process waiting state detection circuit, 7 a process list control circuit, 8 a process list, and 9 a stack allocation control circuit. Patent applicant Fujitsu Limited

Claims (1)

[Scope of Claim] A multi-process stack device for performing multi-process processing, comprising two or more stacks and a circuit that determines the basic starting order of a plurality of processes;
1. A circuit that detects the occurrence of a wait state in an activated process and predicts its waiting time; A process list control circuit that changes the startup order and creates a process list representing a predicted process startup order. A stack control method characterized in that the allocation of processes to the two or more stacks is controlled in advance according to a list of processed processes.