JPS59145528A - Pattern forming method - Google Patents
Pattern forming methodInfo
- Publication number
- JPS59145528A JPS59145528A JP2003383A JP2003383A JPS59145528A JP S59145528 A JPS59145528 A JP S59145528A JP 2003383 A JP2003383 A JP 2003383A JP 2003383 A JP2003383 A JP 2003383A JP S59145528 A JPS59145528 A JP S59145528A
- Authority
- JP
- Japan
- Prior art keywords
- film
- pattern
- thin film
- resist
- material layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 21
- 239000010408 film Substances 0.000 claims abstract description 20
- 239000010409 thin film Substances 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 238000004528 spin coating Methods 0.000 claims description 2
- 238000001771 vacuum deposition Methods 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 18
- 238000005530 etching Methods 0.000 abstract description 11
- 238000001312 dry etching Methods 0.000 abstract description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 7
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 7
- 150000003377 silicon compounds Chemical class 0.000 abstract description 5
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 abstract description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 2
- 238000004380 ashing Methods 0.000 abstract description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 2
- 239000001301 oxygen Substances 0.000 abstract description 2
- 229910052760 oxygen Inorganic materials 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 238000010422 painting Methods 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は所定基板上へのパターン形成方法に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of forming a pattern on a predetermined substrate.
従来例の構成とその問題点
従来、微細パターンを形成するために、リフトオフやド
ライエツチングが用いられてきた。第１図（ａ） 、
（ｂ）にリフトオフ法による微細パターン形成工程の原
理を示す。第１図（ａ）で１は基板、２はレジン１−材
層、３は蒸着による薄膜を示している。Conventional structure and its problems Conventionally, lift-off and dry etching have been used to form fine patterns. Figure 1(a),
(b) shows the principle of the fine pattern forming process using the lift-off method. In FIG. 1(a), 1 is a substrate, 2 is a resin 1-material layer, and 3 is a thin film formed by vapor deposition.
第１図（ｂ）は、レジスト材層２を除去して所定の・く
ターンを形成したところを示している。FIG. 1(b) shows the resist material layer 2 removed to form a predetermined pattern.
しかし、第２図（ａ）のようにレジスト材層２の開口部
断面がだれ、第１図（ａ）と反対のテーパになっている
と、薄膜３全リフトオフするのが皓Ｅしい。However, if the cross-section of the opening in the resist material layer 2 is tapered as shown in FIG. 2(a) and tapered opposite to that in FIG. 1(a), it is likely that the entire thin film 3 will be lifted off.
１だパターンが微細化すると、リフトオフ後の残留薄膜
３の断面形状が、第２図（ｂ）に示すように、三角形に
なるという欠点かある。When the single pattern becomes finer, there is a drawback that the cross-sectional shape of the residual thin film 3 after lift-off becomes triangular, as shown in FIG. 2(b).
第３図はドライエツチング法に吃る微細パターン形成工
程の原理を示す。第３図（ａ）において、１は基板、２
はレジスト材層、３は被エツチング材痕１の薄膜を示し
ている。この方法ではレジスト材）蕾２のパターンを薄
膜３に転写しなければならない。この時、第３図（ｂ）
のようにプラズマエツチングではエツチングが垂直方向
のみならず水平方向にも及ぶだめ、第３図（Ｃ）のよう
にパターン幅のずフ匂；生じる。又、エツチングレート
が基板上で一様でないためパターン幅の分布が生じる。FIG. 3 shows the principle of the fine pattern forming process using the dry etching method. In FIG. 3(a), 1 is a substrate, 2
3 shows a resist material layer, and 3 shows a thin film of etched material traces 1. In this method, the pattern of the bud 2 (resist material) must be transferred onto the thin film 3. At this time, Fig. 3(b)
As shown in FIG. 3(C), plasma etching involves etching not only in the vertical direction but also in the horizontal direction, resulting in an irregular pattern width as shown in FIG. 3(C). Furthermore, since the etching rate is not uniform on the substrate, a pattern width distribution occurs.
さらにドライエツチングにともなうレジスト材層２と被
エツチング拐ワの薄膜３とのエツチング速度比、基板１
と被エツチング材料の薄膜３とのエツチング速度比等に
も注意を払わなければならないという欠点がある。In addition, the etching rate ratio between the resist material layer 2 and the thin film 3 of the etching target during dry etching, and the etching speed ratio of the substrate 1
There is a drawback that attention must be paid to the etching speed ratio between the etching material and the thin film 3 of the material to be etched.
発明の目的
本発明は、上記の問題を解決するためになされたもので
、本発明は、ドライエツチングを用いレジスト、薄膜材
和、基板相互のエツチング速度比を考慮することなくレ
ジス１−パターンがそのｉｔ被エツチング；＋Ｚ斜に精
密に転写加工されて、矩形の断面形状を有する薄膜パタ
ーンを得ることの可能なパターン形成方法を提供する。OBJECTS OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and the present invention is capable of etching a resist 1-pattern using dry etching without considering the etching speed ratio of the resist, the sum of the thin film materials, and the substrate. The present invention provides a pattern forming method capable of obtaining a thin film pattern having a rectangular cross-sectional shape by precisely transferring the etched object in a +Z oblique direction.
発明の構成
本発明は、基板上のレジスト膜に所定断面形状を持つ開
ロバターンを形１ｉ３２： Ｌ、、全面に声！膜を形成
後、前記レジスト膜の少なくとも最上部が露出するまで
前記薄膜をエツチングし、その後前記レジ 。Structure of the Invention The present invention provides an open pattern having a predetermined cross-sectional shape on a resist film on a substrate. After forming the film, the thin film is etched until at least the top of the resist film is exposed, and then the resist is etched.
スト膜を除去することを特徴とするパターン形成方法で
ある。本発明によれば、簡単な工程によって微細パター
ンが得ら才する。This is a pattern forming method characterized by removing the strike film. According to the present invention, a fine pattern can be obtained through a simple process.
実施例の説明
以下、本発明の実施例全第４図を用いて説明する。商品
名０ＦＰＲ８００で知られるレジスト材層２をシリコン
基板１上に５０００回転／／；Ｊで回転塗布して、厚さ
１μ７７２に刺着し、ついでパターンを露光現像後形成
する（第４図（ａ））。次に、けい素化合物を含む有機
溶液（ＯＣＤ）を２０００回転／回転転−７１＝回転塗
布して、厚さ１μノ１ノの有機けい素化合物被膜を形成
し、ついで、これを２００°Ｃ３０匁間乾燥及び焼成を
仔近い酸化けい素膜３を形成する（第４図（ｂ））。次
に酸化けい素膜３をレジスト材層２の表面せでドライエ
ツチングによって除去すめ（第４図（Ｃ））。このドラ
イエツチングに用いたガスは０３Ｆ８で、真空度（は１
Ｏ−５Ｔｏｒｒ 、 ＲＦパワーは３００Ｗである。次
にレジスト材層２全アセトンボイルまたは酸素アッシン
グで除去することによシ第４図（ＣＩ）に示すような酸
化けい素膜３の微細パターンを得る。なお、本実施例で
は、酸化けい素（５ｉｎ２）膜の形成について述べたが
、回転塗布もしくは真空蒸着により形成可能な薄膜であ
れば、その他のものでも有効であることは言う丑でもな
い。DESCRIPTION OF EMBODIMENTS Hereinafter, all embodiments of the present invention will be explained using FIG. 4. A resist material layer 2 known under the trade name 0FPR800 is spin-coated onto the silicon substrate 1 at 5000 revolutions//;J to a thickness of 1μ772, and then a pattern is formed after exposure and development (see Fig. 4(a)). )). Next, an organic solution (OCD) containing a silicon compound was coated at 2000 revolutions/rotation -71 = to form an organic silicon compound film with a thickness of 1 μm and 1 μm, and then this was coated at 200°C and 30°C. After drying and firing, a silicon oxide film 3 is formed (FIG. 4(b)). Next, the silicon oxide film 3 is removed from the surface of the resist material layer 2 by dry etching (FIG. 4(C)). The gas used for this dry etching was 03F8, and the degree of vacuum was 1
O-5 Torr, RF power is 300W. Next, the entire resist material layer 2 is removed by acetone boiling or oxygen ashing to obtain a fine pattern of the silicon oxide film 3 as shown in FIG. 4 (CI). Although this embodiment describes the formation of a silicon oxide (5 in 2 ) film, it goes without saying that other thin films that can be formed by spin coating or vacuum evaporation are also effective.
発明の効果
本発明を用いることにより、リフトオフやドライエツチ
ングを従来のように用いたパターン形成方法では得られ
なかった微細パターンが形成できる。すなわち薄膜のエ
ツチングにともなうパターン幅の変化がなく、矩形の断
面形状を得る。Effects of the Invention By using the present invention, fine patterns that could not be obtained by conventional pattern forming methods using lift-off or dry etching can be formed. That is, there is no change in pattern width due to thin film etching, and a rectangular cross-sectional shape is obtained.
第１図（ａ） １ （ｂ） 、第２図（ａ） 、 （ｂ
）及び第３図（ａ）〜（Ｃ）は、それぞれ従来のリフト
オフ法及びドライエツチング法によるパターン形成方法
金示す］−程断面図、第４図（乙）〜（ｄ）は本発明実
施例に用いられた微細パターン形成手順を示す断面図で
ある。
１ ・・９．・基板、２・・・・・・レジスト材層、３
・・・・・・被エツチング材料の薄膜。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図
第２図
第３図
９
第４図
＝１２３−Figure 1 (a) 1 (b), Figure 2 (a), (b
) and FIGS. 3(a) to (C) are cross-sectional views of conventional pattern forming methods using the lift-off method and dry etching method, respectively, and FIGS. FIG. 3 is a cross-sectional view showing a fine pattern forming procedure used in FIG. 1...9.・Substrate, 2...Resist material layer, 3
・・・・・・Thin film of material to be etched. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
Figure 2 Figure 3 Figure 9 Figure 4 = 123-
Claims (3)
バターンを形成し、全面に薄膜を形成後、前記レジスト
膜の少なくとも最上部が露出するまで前記薄膜をエツチ
ングし、その後前記レジスト膜を除去することを特徴と
するパターン形成方法。(1) After forming an open pattern with a predetermined cross-sectional shape on the resist film on the substrate and forming a thin film on the entire surface, the thin film is etched until at least the top of the resist film is exposed, and then the resist film is removed. A pattern forming method characterized by:
囲第１項に記載のパターン形成方法。(2) The pattern forming method according to claim 1, wherein the thin film is formed by a spin coating method.
第１項に記載のパターン形成方法。(3) The pattern forming method according to claim 1, wherein the thin film is formed by vacuum deposition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003383A JPS59145528A (en) | 1983-02-09 | 1983-02-09 | Pattern forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003383A JPS59145528A (en) | 1983-02-09 | 1983-02-09 | Pattern forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59145528A true JPS59145528A (en) | 1984-08-21 |
Family
ID=12015750
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003383A Pending JPS59145528A (en) | 1983-02-09 | 1983-02-09 | Pattern forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59145528A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6255937A (en) * | 1985-09-05 | 1987-03-11 | Matsushita Electronics Corp | Forming method for metal pattern |
| JPS6321831A (en) * | 1986-07-16 | 1988-01-29 | Matsushita Electronics Corp | Pattern forming method |
| JPH077007A (en) * | 1993-06-18 | 1995-01-10 | Rohm Co Ltd | Manufacture of substrate for semiconductor device |
-
1983
- 1983-02-09 JP JP2003383A patent/JPS59145528A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6255937A (en) * | 1985-09-05 | 1987-03-11 | Matsushita Electronics Corp | Forming method for metal pattern |
| JPS6321831A (en) * | 1986-07-16 | 1988-01-29 | Matsushita Electronics Corp | Pattern forming method |
| JPH077007A (en) * | 1993-06-18 | 1995-01-10 | Rohm Co Ltd | Manufacture of substrate for semiconductor device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4202914A (en) | Method of depositing thin films of small dimensions utilizing silicon nitride lift-off mask | |
| US4533624A (en) | Method of forming a low temperature multilayer photoresist lift-off pattern | |
| US5154797A (en) | Silicon shadow mask | |
| JPS63297435A (en) | Method for forming pattern | |
| US4606931A (en) | Lift-off masking method | |
| JPS59145528A (en) | Pattern forming method | |
| JP3589201B2 (en) | Thin film patterning method, thin film device manufacturing method, and thin film magnetic head manufacturing method | |
| JP2689431B2 (en) | Method for selectively forming silicon dioxide film | |
| JPH0314172B2 (en) | ||
| EP0334906B1 (en) | Silicon-containing negative resist material, and process for its use in patterning substrates | |
| JPH0766191B2 (en) | Device fabrication method using non-planar surface lithography | |
| JPH0391928A (en) | Pattern formation by lift-off process | |
| JPS60102735A (en) | Method of treating electron beam resist | |
| JPH0653922B2 (en) | Metal film patterning method | |
| JPS5891170A (en) | Dry etching method for chromium oxide (or203) | |
| JPS5533035A (en) | Forming of resist pattern shaped like inverted truncated pyramid | |
| JPS6212502B2 (en) | ||
| JPH02138468A (en) | Pattern formation | |
| KR100256073B1 (en) | Etching method for magnetic layer in thin magnetic head | |
| JPS58207632A (en) | Manufacture of semiconductor device | |
| JPH05218775A (en) | Manufacture of crystal oscillator | |
| JPH03245528A (en) | Pattern formation | |
| JPS62200732A (en) | Manufacture of semiconductor device | |
| JPH0695503B2 (en) | Pattern forming method and apparatus used for implementing the same | |
| JPH0247848B2 (en) |