JPS59144180A - Photoelectric converter - Google Patents

Photoelectric converter

Info

Publication number
JPS59144180A
JPS59144180A JP58018622A JP1862283A JPS59144180A JP S59144180 A JPS59144180 A JP S59144180A JP 58018622 A JP58018622 A JP 58018622A JP 1862283 A JP1862283 A JP 1862283A JP S59144180 A JPS59144180 A JP S59144180A
Authority
JP
Japan
Prior art keywords
electrode
substrate
light transmission
semiconductor
photoelectric conversion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58018622A
Other languages
Japanese (ja)
Other versions
JPH0656893B2 (en
Inventor
Shunpei Yamazaki
舜平 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP58018622A priority Critical patent/JPH0656893B2/en
Publication of JPS59144180A publication Critical patent/JPS59144180A/en
Publication of JPH0656893B2 publication Critical patent/JPH0656893B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B17/00Layered products essentially comprising sheet glass, or glass, slag, or like fibres
    • B32B17/06Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material
    • B32B17/10Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material of synthetic resin
    • B32B17/10005Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material of synthetic resin laminated safety glass or glazing
    • B32B17/1055Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material of synthetic resin laminated safety glass or glazing characterized by the resin layer, i.e. interlayer
    • B32B17/10761Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material of synthetic resin laminated safety glass or glazing characterized by the resin layer, i.e. interlayer containing vinyl acetal
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/048Encapsulation of modules
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To improve the reliability by forming electrodes made of light transmission conductive films on both side surfaces of a non-single crystal semiconductor having P-N or PIN junction. CONSTITUTION:An oxidized indium layer having oxidized tin is formed on a light transmission substrate 1, and oxidized tin is further formed to form a light transmission electrode 2. A non-single crystal semiconductor 3 having a P-N or PIN junction is laminated thereon, an oxidized indium layer having oxidized tin is further formed to form a light transmission electrode 4. A heat fusible filler 7 having light transmission such as polyvinyl butyral is formed thereon, and a light transmission substrate 8 is further formed thereon. Accordingly, since aluminum is not used in the electrode, the aluminum is not diffused in the semiconductor, thereby improving the reliability. Further, a light of a wavelength larger than 600nm diffused to the back surface side from the electrode 4 is dispersed externally from the substrate 8, thereby preventing the temperature rise therein.

Description

【発明の詳細な説明】 本発明は、非単結晶半導体を用いた光電変換装置であっ
て、特に高効率高信頼性を求めた半導体装置およびその
作製方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photoelectric conversion device using a non-single-crystal semiconductor, and particularly to a semiconductor device that requires high efficiency and high reliability, and a method for manufacturing the same.

この発明は、透光性のSlの絶縁基板と、この基板上の
第1の透光性導電膜(以下単にCTFIという)を有す
る第1の電極と、この電極上に光照射により光起電力を
発生させる少なくとも1つの。
This invention comprises a translucent SI insulating substrate, a first electrode having a first translucent conductive film (hereinafter simply referred to as CTFI) on this substrate, and a photovoltaic force generated by irradiating light onto this electrode. at least one that generates.

PNまたはPIN接合を有する非単結晶半導体と、該半
導体上第2の透光性導電膜(以下単にCrF2という)
よりなる第2の電極により設けられた光電変換素子(以
下単にPvCまたは素子という)を設けてこれをパネル
化して光電変換装置とした構造を有する。本発明は光電
変換素子の第2の電極(裏面電極ともいう)をCrF2
とすることにより、太陽光等の照射光のうち600n 
m以上の長波長光を第2の電極より後方に放射せしめる
電極構造を有づ−る。
A non-single crystal semiconductor having a PN or PIN junction, and a second transparent conductive film on the semiconductor (hereinafter simply referred to as CrF2)
It has a structure in which a photoelectric conversion element (hereinafter simply referred to as PvC or element) provided by a second electrode made of the following is provided, and this is formed into a panel to form a photoelectric conversion device. In the present invention, the second electrode (also referred to as the back electrode) of the photoelectric conversion element is made of CrF2.
By doing so, 600n of irradiation light such as sunlight
It has an electrode structure that allows long wavelength light of m or more to be emitted backward from the second electrode.

即ち本発明は、非単結晶導体に密接する第1および第2
の電極がともに金属ではなく、酸化スズ酸化インジュ−
ム、酸化インジューム・スズ等の酸化物よりなるCTF
とし、従来より知られた電極を構成する金属一般的には
アルミニュームが半導体中にマイグレイlr (異品拡
散)をして150°C以上における高温放置テストにお
ける信頼性の低下をもたらすことを防くことを目的とし
ている。
That is, the present invention provides first and second
Both electrodes are not metal but tin oxide indium oxide.
CTF made of oxides such as aluminum, indium oxide, tin oxide, etc.
This prevents the conventionally known electrode-constituting metal, generally aluminum, from migrating into semiconductors and reducing reliability in high-temperature storage tests at temperatures above 150°C. The purpose is to

本発明はさらに第1、第2の電極をともにCTFとする
ことにより、複合集積化構造を施すに際しレーザスクラ
イブ法(単にLSという)を採用することができ、高生
産性および複合化部における必要面積の減少即ち実効変
換効率の向上をもたらすことかできるという他の特徴を
有する。
Further, by using CTF as both the first and second electrodes of the present invention, it is possible to employ a laser scribing method (simply referred to as LS) when forming a composite integrated structure. Another feature is that it can reduce the area, that is, improve the effective conversion efficiency.

本発明は加えてこの第2の電極より裏面側に放散する6
00nm以上の波長の長波長光を裏面に設けて、第2の
透光性絶縁基板より外部に放散せしめることを特徴とし
ている。
In addition, the present invention further provides 6
It is characterized in that long-wavelength light with a wavelength of 00 nm or more is provided on the back surface and is emitted to the outside from the second light-transmitting insulating substrate.

かくすることにより、この光電変換装置自体の温度上昇
を防ぐことができ、ひいては効率の低下を防ぐことがで
きる。
By doing so, it is possible to prevent the temperature of the photoelectric conversion device itself from increasing, and thus to prevent a decrease in efficiency.

さらに赤外光を含む長波長光を外部に放散するに加えて
、この第2の電極に隣接して太陽熱利用の温水器を設け
ることが可能になる。
Furthermore, in addition to radiating long-wavelength light including infrared light to the outside, it becomes possible to provide a solar water heater adjacent to this second electrode.

即ち本発明は、短、波長光により光電変換を行うととも
に、長波長光により光熱変換をし、それらを一体化して
一般家屋の屋根に配設することにより、太陽光の総合変
換効率をきわめて高くできるという他の特徴を有する。
That is, the present invention performs photoelectric conversion using short wavelength light and photothermal conversion using long wavelength light, and by integrating them and installing them on the roof of a general house, the overall conversion efficiency of sunlight can be extremely high. It has other characteristics of being able to.

つまり本発明人の出願による実用新案登録願53−83
838(昭和53年6月19日出願)「太陽電池」に示
されるごとく、太陽熱利用の温水器の前面の強化カラス
の部分を光電変換装置が含まれた合わせガラス構造とす
ることにより、太陽エネルギーの総合利用効率を高める
という特徴をも有する。
In other words, utility model registration application 53-83 filed by the inventor
838 (filed on June 19, 1978) "Solar Cell", by making the reinforced glass part on the front of a solar water heater into a laminated glass structure containing a photoelectric conversion device, solar energy can be generated. It also has the feature of increasing the overall utilization efficiency of.

本発明は、素子の表面および裏面がガラスよりなる無機
材料でサンドウィンチされており、且つそのひとつの基
板上に複数の素子を複合集積化せしめる構造を有するこ
とにより、高品質高信頼性を有せしめることができた。
The present invention has a structure in which the front and back surfaces of the device are sandwiched with an inorganic material made of glass, and a plurality of devices are integrated on a single substrate, thereby achieving high quality and high reliability. I was able to force it.

加えて電極に金属材料を用いないため、複合集積の際、
高温を用いるLSにおいて、スクライブと同時に異常拡
散してしまうことがなく、複合集積化をする製造工程に
おいても、高信頼性を有することができる。
In addition, since no metal material is used for the electrodes, it is possible to
In LS using high temperatures, abnormal diffusion does not occur at the same time as scribing, and high reliability can be achieved even in the manufacturing process of multiple integration.

さらに従来から知られた蒸着マスク、スクリーン印刷等
を用いるマスク法とはまったく異なり、マスクレス工程
であるLSを用いることにより、パネル全体に複合化を
するに際し、その各素子間の連結部の占める割合を全体
の10%以下一般には5〜7%とすることができた。
Furthermore, unlike conventional mask methods that use vapor deposition masks, screen printing, etc., by using LS, which is a maskless process, when compounding the entire panel, it is possible to The proportion could be set to 10% or less, generally 5 to 7% of the total.

このためバネルレヘルでの高効率化をせしめることがで
きるという他の特徴をも有する。
Therefore, it also has another feature of being able to achieve high efficiency at the panel level.

従来、光電変換装置は第1図にその縦断面図が示されて
いる如<、透光性基板例えはガラス(1)上に透光性導
電膜(2)として約0.ケの厚さにITO,5nOL等
を形成せしめ、さらにプラズマ気相法によりP、IN接
合、PINPIN・・・PIN接合を形成して非単結晶
半導体(3)を約o、5)Iの厚さに積層する。次に裏
面電極をアルミニュームの金属を真空蒸着法により0.
3〜37Aの厚さに形成した。さらにエポキシ樹脂(5
)をコーティングし作製した。
Conventionally, a photoelectric conversion device has a translucent conductive film (2) formed on a translucent substrate (for example, glass (1)) with a thickness of about 0.0 mm, as shown in the vertical cross-sectional view of FIG. ITO, 5nOL, etc. are formed to a thickness of about Layer them together. Next, the back electrode was made of aluminum metal by vacuum evaporation.
It was formed to a thickness of 3 to 37A. Furthermore, epoxy resin (5
) was prepared by coating.

照射光(10)は太陽光等が用いられる。しかしかかる
従来の構造においては、信頼性の点にお6>て十分でな
い。その原因を詳しく調べた結果、裏面電極(4)を構
成する金属が半導体(3)と合金を作らず、10σC以
上代表的には150’(の高温放置テストにおいて半導
体中に異品拡散してしまい、約12〜50時間で0.5
7xもの深さに混入し、特性例えば変換効率を6%より
1%以下にまで劣化させ、ふたつの電極間が実質的にシ
ョートシてしまうことが判明した。
Sunlight or the like is used as the irradiation light (10). However, such a conventional structure is not sufficient in terms of reliability. A detailed investigation of the cause revealed that the metal constituting the back electrode (4) did not form an alloy with the semiconductor (3), and that foreign substances were diffused into the semiconductor in a high temperature test of 10σC or more, typically 150'(150'). 0.5 in about 12 to 50 hours
It was found that the particles were mixed in at a depth of 7x, degrading characteristics such as conversion efficiency from 6% to less than 1%, and causing a substantial short circuit between the two electrodes.

このためアモルファスまたはセミアモルファスシリコン
等を主成分として用いる非単結晶半導体においては、こ
の半導体と密接する材料は金属ではなく、金属酸化物ま
たは金属窒化物等の化合物の導体であることが最も重要
であることが判明した。
For this reason, in non-single-crystal semiconductors that use amorphous or semi-amorphous silicon as the main component, it is most important that the material in close contact with the semiconductor is not a metal but a conductor of a compound such as a metal oxide or metal nitride. It turns out that there is something.

本発明はかかる実験事実に基づきなされたものであって
、半導体(3)が一つのPIN接合を有する場合、その
P型半導体には酸化スズを主成分とするCTFを密接し
て電極を構成せしめ、またN型半導体には酸化インジュ
ームまたはITO(酸化スズを10重量%以下含有させ
た酸化インジューム)を密接せしめ、金属を用いない構
造とせしめたことを第一の特徴としている。
The present invention has been made based on such experimental facts, and when the semiconductor (3) has one PIN junction, CTF whose main component is tin oxide is closely attached to the P-type semiconductor to form an electrode. The first feature is that indium oxide or ITO (indium oxide containing 10% by weight or less of tin oxide) is closely attached to the N-type semiconductor, resulting in a structure that does not use metal.

第2図は本発明の光電変換装置の縦断面図を示す。FIG. 2 shows a longitudinal cross-sectional view of the photoelectric conversion device of the present invention.

この光電変換装置は同一透光性基板上に複数の素子を複
合築積化するとともに、パネル構造に枠組みして設けた
ものである。
This photoelectric conversion device is constructed by building up a plurality of elements on the same light-transmitting substrate and framing them in a panel structure.

図面において透光性基板(1)上にITOを1500〜
2500 Aの厚さに設け、さらに酸化スズを200〜
500人の厚さに設けたCTFI(2>が設けられてい
る。
In the drawing, ITO is placed on the transparent substrate (1) at 1500 ~
Provided with a thickness of 2500A, and further coated with tin oxide of 200~
A CTFI (2>) with a thickness of 500 people is provided.

さらにPIN接合を有する非単結晶半導体(3)をP型
S’zCt−y、  (0< X < 1例えばx=0
.8.)  (1ook)−■型Si (約0.p)−
N型微結晶Si (粒径1oo〜200人)の構造にプ
ラズマ気相法にて作製した。さらにこのN型半導体に密
接したITOを1000〜3000人例えば2000 
大の厚さにCTI’2(4)として設りた。
Furthermore, the non-single crystal semiconductor (3) having a PIN junction is a P-type S'zCt-y, (0<X<1 e.g. x=0
.. 8. ) (1ook) - ■ type Si (approx. 0.p) -
A structure of N-type microcrystalline Si (particle size of 10 to 200 nanometers) was fabricated by plasma vapor phase method. Furthermore, 1000 to 3000 people, for example 2000
It was established as CTI'2 (4) with a thickness of 1.5 mm.

この複合化は基板(1)上の全面にCTFIを形成した
後、LSにより約2ヅの巾にこのCTFIをスクライブ
して複数の領域に分離(17) して、さらに半導体(
3)を全面に形成した後、半導体(3)およびCTFI
を再びLSにより分Mlf (18) した。さらにC
TF2(4)を全面に形成した後、LSにより複数の領
域に分離(19) したものである。かくすると第1の
素子(20)第2の素子(21)第3の素子2 (22)等に分割される。そして例えはその連結部は外
部連結電極(16)に連結した第1の外部引出し電極用
パン) (15)が第1の素子の第2の電極と連結しこ
の第1の素子の第1の電極が(18)にて第2の素子の
第2の電極と連結して直列接続をして設けられた。さら
に第3の素子(22)の第1の電極は他の外部引出し電
極用バソI−(15)と連結し、外部接続電極(16’
)になっている。
This composite is made by forming a CTFI on the entire surface of the substrate (1), then scribing the CTFI into a width of about 2㎜ using LS and separating it into multiple regions (17), and further forming the semiconductor (1).
After forming 3) on the entire surface, semiconductor (3) and CTFI
was again subjected to minute Mlf (18) by LS. Further C
After forming TF2 (4) on the entire surface, it is separated into a plurality of regions (19) by LS. In this way, it is divided into a first element (20), a second element (21), a third element 2 (22), etc. For example, the connection part is connected to the first external connection electrode (15) connected to the second electrode of the first element, and the first external connection electrode (15) is connected to the second electrode of the first element. An electrode was provided in series connection in connection with the second electrode of the second element at (18). Further, the first electrode of the third element (22) is connected to another external extraction electrode bath I- (15), and the external connection electrode (16'
)It has become.

か(して同一基板(1)上に複数の素子が複合化されて
いる。さらにこの素子はPVB (商品名をシーフレッ
クスともいわれている)の透光性を有する加熱熔融充填
利(7)  (0,2〜lmm一般には0、5mmの厚
さ)により充填されている。
(Therefore, a plurality of elements are composited on the same substrate (1). Furthermore, this element is made of PVB (also known as Seaflex), which has a transparent heat-melted filling effect (7). (0.2-1 mm, generally 0.5 mm thick).

さらにこの上面には、第2の透光性基板であるガラス(
8)ガ設けられ、合わせガラスの構造を有している。
Furthermore, on this upper surface, a second transparent substrate of glass (
8) It has a laminated glass structure.

図面において、パネルは外側をアルミサツシの枠(13
)、 (13’)により囲まれており、これと基板(1
)  (8)との間はブチルゴム(14)  (14’
)が2 には、虜涌−弓水冷管(31)を有する太陽光利用の温
水器(30)を設けることができるという意味で破線で
示している。
In the drawing, the panel has an aluminum sash frame (13
), (13'), and this and the substrate (1
) (8) and butyl rubber (14) (14'
) is indicated by a broken line to mean that a solar water heater (30) having a water cooling pipe (31) can be installed.

この温水器は屋根側に位置し、水冷管内を太陽光のうち
長波長光(1o)が供給されることにより加熱し、水を
60〜80’Cに昇温でき、一般家庭では湯等の太陽熱
利用をすることができる。
This water heater is located on the roof side and heats the inside of the water cooling pipe by supplying long wavelength light (1o) of sunlight, and can raise the temperature of water to 60-80'C. Solar heat can be used.

かかる構造においては、屋根の面積を多く占めることが
ないため、利用効率を高めることができ好都合であった
Such a structure does not occupy a large area of the roof, which is advantageous in that it can increase utilization efficiency.

第3図は本発明の光電変換装置の製造に関する工程を示
したものである。
FIG. 3 shows the steps involved in manufacturing the photoelectric conversion device of the present invention.

即ち第3図(A)はガラス基板(1)上にCTFI(2
)を電子ビーム蒸着法、スプレー法またはcvD法によ
り0.15〜0.257−の厚さに形成した。このCT
F はITO(0,15〜0.25.y  )  +S
nO,(200〜500  A )とした。またハロゲ
ン元素を添加した5nOzであってもよい。
That is, FIG. 3(A) shows a CTFI (2) on a glass substrate (1).
) was formed to a thickness of 0.15 to 0.257 mm by electron beam evaporation, spraying, or CVD. This CT
F is ITO (0.15~0.25.y) +S
nO, (200 to 500 A). Alternatively, it may be 5 nOz added with a halogen element.

さらにこの上にPINまたばPN接合を少なくとも一つ
有する非単結晶半導体をPCVD (プラズマ気相法)
により積層する。一般にはP型半導体をシランとメタン
との反応にょる5iXCt<(0< x < I X 
−〇、8)として約100λの厚さに形成する。I型半
導体としては水素または弗素が添加された珪素をシラン
またはSiFえのPCVDにより約0少の厚さに形成さ
せた。この時この珪素中の酸素を5A’lO′cm’以
下好ましくは5xlO%m’以下とした。さらにN型半
導体を水素にて10〜20倍に希釈されたシランをPC
VD法に□よりフォスヒンを混入させ作製した。すると
微結晶化するため、その光吸収特性を少なくすることが
できるに加え、電気伝導度もの> 10’ <n cm
)を得ることができる。このN型珪素は100〜20〇
への厚さを有し、光がこの領域で吸収されないように多
結晶化することばきわめて重要である。
Furthermore, a non-single crystal semiconductor having at least one PIN or PN junction is deposited on top of this by PCVD (plasma vapor deposition method).
Laminate by layering. In general, a P-type semiconductor is formed by a reaction between silane and methane, 5iXCt<(0< x < I
- 〇, 8) is formed to a thickness of about 100λ. As the I-type semiconductor, silicon doped with hydrogen or fluorine was formed to a thickness of approximately zero by PCVD using silane or SiF. At this time, the oxygen in this silicon was set to be 5A'lO'cm' or less, preferably 5xlO%m' or less. Furthermore, silane diluted 10 to 20 times with hydrogen is added to the N-type semiconductor by PC.
It was produced by mixing phosphin from □ in the VD method. As a result, it becomes microcrystalline, which not only reduces the light absorption property but also increases the electrical conductivity >10'<n cm
) can be obtained. This N-type silicon has a thickness of 100 to 200 mm and is very important to be polycrystalline so that no light is absorbed in this region.

次にITOを電子ビーム蒸着法またはCVD法により0
.1〜0.ン一般にはO,ンの厚さに形成した。開放電
圧を大きくするため、本発明においてはP型半導体は酸
化スズと密接せしめ、またN型半導体は酸化インシュ−
ムまたはITOと密接せしめた。
Next, ITO is removed by electron beam evaporation or CVD.
.. 1~0. Generally, the thickness is 0.5 mm. In order to increase the open circuit voltage, in the present invention, the P-type semiconductor is brought into close contact with tin oxide, and the N-type semiconductor is brought into close contact with tin oxide.
or ITO.

得られなかった。I couldn't get it.

かくして第3図(A)を得た。Thus, Figure 3(A) was obtained.

次に53図(B)に示すごとくにした。即ぢ図面におい
て素子(6)上に加熱熔融性透光性充填材を配置させた
。この充填材としてPVB  (ポリビニールブチラー
ル)を用いた。つまりこのPVBは室温にて表面に粉末
状の重曹が散布されているため、まず水洗しこの重曹(
重炭酸ナトリューム)を除去し、さらに十分に乾燥さゼ
た。これは20〜25′Cにて行った。次にこのPVB
箔を素子(6)状に配設した。さらにその上面に透光性
絶縁基板でさらにこの後これらをオートクレーブ炉内に
設置し、このクレープ炉内を真空引きした。
Next, the procedure was as shown in Figure 53 (B). In the drawing, a heat-meltable translucent filler was placed on the element (6). PVB (polyvinyl butyral) was used as this filler. In other words, this PVB has powdered baking soda sprinkled on its surface at room temperature, so it must first be washed with water and then this baking soda (
Sodium bicarbonate) was removed and the mixture was thoroughly dried. This was done at 20-25'C. Next this PVB
The foil was arranged in the form of elements (6). Further, a light-transmitting insulating substrate was placed on the upper surface of the crepe, and then these were placed in an autoclave, and the inside of the crepe oven was evacuated.

するとこの素子とPVB間、PVBと第2のガラス基板
との間の空気を除去できた、即ら脱気をさせた。
Then, the air between this element and the PVB and between the PVB and the second glass substrate was removed, that is, deaerated.

この後このクレープ炉内で100〜170″′C一般に
は120〜15cfcに加熱し、さらに7〜13気圧/
C臀例えば10気圧/cmの圧力を加えて、この加熱さ
れた空気をクレープ炉内に充填することで成就した。
Thereafter, it is heated in the crepe oven to 100 to 170''C, generally 120 to 15 cfc, and further heated to 7 to 13 atm/h.
This was accomplished by applying a pressure of, for example, 10 atm/cm and filling the crepe oven with the heated air.

かくしてPVBは溶融し、全体は一体化して第3図(C
)を得た。
In this way, the PVB is melted and the whole is integrated as shown in Figure 3 (C
) was obtained.

図面において明らかなどと(、素子(6)は照射光側は
ガラス(無機材料)よりなる透光性基板を有し、裏面は
ガラス(無機材料)によりカバーされ、いわゆる合わせ
ガラス構造を有し、その内部に素子がその一方の基板p
こ密接し、複合集積化をして設けられている。
As is clear from the drawings, the element (6) has a transparent substrate made of glass (inorganic material) on the irradiation light side, and has a so-called laminated glass structure, with the back surface covered with glass (inorganic material). There is an element inside one of the substrates p.
They are placed in close contact with each other and are integrated in a complex manner.

かかる構造とすることにより、内部に水分等が侵入する
ことがなく、さらに半導体(3)と金属との反応がまっ
たくない理想的な構造を有せしめることができた。
By adopting such a structure, it was possible to have an ideal structure in which moisture and the like do not enter into the interior, and furthermore, there is no reaction between the semiconductor (3) and the metal.

以下に本発明の実施例を加えてさらにその内容を補完す
る。
Examples of the present invention are added below to further supplement the content.

実施例1 第2図は本発明の実施例の縦断面図である。Example 1 FIG. 2 is a longitudinal sectional view of an embodiment of the invention.

図面において、ガラス基板は20cm X 60cmを
有している。ひとつの素子は15mm K20cmを有
しており40段の直列接続構造を有する。
In the drawing, the glass substrate has dimensions of 20 cm x 60 cm. One element has a diameter of 15 mm and a diameter of 20 cm, and has a 40-stage series connection structure.

変換効率の比較は以下のごとくである。The comparison of conversion efficiency is as follows.

従来例 本発明1 本発明2 本発明3開放電圧(V)
   0.82 0.91  32    32短絡電
流(mへ/cm) 13.1 15.2  336  
 340曲線因子(%)58  65    54  
  54効率(%)    6.3 9.0   4.
84   4.9011Ts  (時間)   3  
>1000   >1000   >11000HII
  (時間)〜200〜200  〜200   > 
1000上記表において従来例は第1図の構造を有し、
且つ面積が3mmx3cm  (Icm’ )とした場
合ノjIl造である。本発明1ば第3図(A)の構造を
有し、裏面電極はCrF2としITOにより設けられた
場合でる。あり、面積は3mm23cm  (1cm’
)とした場合の特性である。本発明2は第2図の構造で
あって、20cm X 60cmの基板に40段直列接
続させて設け、充填材(7)裏面保護物(8)が設けら
れていない場合の特性である。さらに効率はAMI  
(100mW /cm)での変換効率を示す。またII
Tsは150’(:大気中での高温放置テス]・におい
て初期値に対し効率が10%以上の変化が発生するまで
の時間をしめず。またHUMば65°CRI+90%の
雰囲気での湿度テストにおいて10%以上の変化の効□
率を示すまでの時間を示す。
Conventional example Present invention 1 Present invention 2 Present invention 3 Open circuit voltage (V)
0.82 0.91 32 32 Short circuit current (to m/cm) 13.1 15.2 336
340 Fill factor (%) 58 65 54
54 Efficiency (%) 6.3 9.0 4.
84 4.9011Ts (hours) 3
>1000 >1000 >11000HII
(hours) 〜200〜200〜200>
1000 In the above table, the conventional example has the structure shown in Figure 1,
In addition, when the area is 3 mm x 3 cm (Icm'), the structure is 3mm x 3cm (Icm'). The first embodiment of the present invention has the structure shown in FIG. 3(A), and the back electrode is made of CrF2 and made of ITO. Yes, the area is 3 mm 23 cm (1 cm'
). The present invention 2 has the structure shown in FIG. 2, and has characteristics when 40 stages are connected in series on a 20 cm x 60 cm substrate, and the filler (7) and back surface protector (8) are not provided. Furthermore, efficiency is AMI
(100 mW/cm). Also II
Ts is 150' (: high temperature storage test in the atmosphere), and does not indicate the time until the efficiency changes by 10% or more from the initial value. Also, for HUM, the humidity test in an atmosphere of 65° CRI + 90%. The effect of a change of 10% or more in
Indicates the time it takes to show the rate.

以上の結果より明らかなごとく、裏面をCrF2とする
ことにより従来例の6.3%より9%にまで効率を向上
させることができた。ちなみにこのCrF2を105O
Aの厚さとし、さらにその上にアルミニュームを電極と
して形成させる場合は、さらに1%の効率の向上ができ
た。
As is clear from the above results, by using CrF2 on the back surface, the efficiency could be improved from 6.3% in the conventional example to 9%. By the way, this CrF2 is 105O
When the thickness was set to A and aluminum was further formed as an electrode on top of that, the efficiency was further improved by 1%.

かくのごとく、本発明の第1および第2の電極をCTF
とすることにより、効率を向上させることかできるに加
えてIITSにおいて従来例が3時間しか特性を有せな
かったのに対して1000時間以−ヒも安定な特性を有
することかできた。
As described above, the first and second electrodes of the present invention are formed using CTF.
By doing so, in addition to being able to improve efficiency, it was also possible to have stable characteristics for more than 1000 hours at IITS, whereas the conventional example had characteristics for only 3 hours.

さらに本発明を第2図に示すことく複合集積化すると実
効変換効率において4.84%を得ることができ電圧も
32Vを得ることができた。IITSにおいても、10
00時間以上を有するがしかしHUMがやはり約200
時間とまだ十分ではないことが判明した。
Further, when the present invention is integrated into a composite structure as shown in FIG. 2, an effective conversion efficiency of 4.84% and a voltage of 32V can be obtained. At IITS, 10
00 hours or more, but HUM is still about 200
It turned out that time and still not enough.

このため裏面側にPVBとガラス基板とにより素子をサ
ンドウィンチ構造とさせ、第2図の(7’)、(8)を
設けると、本発明の3に示す如く、実効変換効率を4.
90%と本発明2と概略同一であるか、HllMにおい
て1000時間以上の光信頼性をうろことができた。
For this reason, if the element is made into a sandwich structure with PVB and a glass substrate on the back side, and (7') and (8) in FIG.
The optical reliability was 90%, which is approximately the same as that of Invention 2, or the optical reliability for 1000 hours or more in HllM.

合わせガラス構造とするため、さらに耐風圧テスト、耐
雨圧テストにおいても本発明の第2図の構造は最も高い
信頼性を有することができた。
Since it is a laminated glass structure, the structure shown in FIG. 2 of the present invention had the highest reliability in wind pressure tests and rain pressure tests.

また本発明の実施例において、従来例が変換効率6.3
%を有していたが、これは他の手段例えばガラス−CT
F界面をテスクチア−化して入射光側の光の反射を少な
くする等により、8〜10%と向上させることができる
場合、同様に実施例1における本発明L2,3.におい
ても特性の向上を図ることができることはいうまでもな
い。
In addition, in the embodiment of the present invention, the conventional example has a conversion efficiency of 6.3.
%, but this is different from other methods such as glass-CT
If the improvement can be improved to 8 to 10% by making the F interface Tescutia to reduce the reflection of light on the incident light side, the present invention L2, 3. in Example 1 can be similarly improved. It goes without saying that the characteristics can also be improved.

また本発明においてはひとつのPIN接合を有する場合
を主として示した。しかしこれにPINPIN・・・P
jN接合と少なくとも一つのPNまたはPIN接合をさ
せればよく、かかる面から考えると、本発明は光電変換
装置パネルとしてさらに商品化を促進するきわめて重要
な特徴を有していることが判明した。
Further, in the present invention, the case where one PIN junction is mainly shown is shown. But this is PINPIN...P
It is only necessary to make a jN junction and at least one PN or PIN junction, and from this point of view, it has been found that the present invention has an extremely important feature that will further promote commercialization as a photoelectric conversion device panel.

加えて例えば40cmx120cmのNEDO規格のパ
ネルを20cm X60cmを4枚、また20cmx4
0cmを6枚、20cm x20cmを12枚、40c
m X 40cmを3枚と複合化してアルミザソシ等を
枠組みすることが可能である。
In addition, for example, 4 NEDO standard panels of 40cm x 120cm, 4 pieces of 20cm x 60cm, and 4 20cm x 4
6 pieces of 0cm, 12 pieces of 20cm x 20cm, 40c
It is possible to combine three sheets of m x 40 cm to form a frame for aluminum slats, etc.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の光電変換装置の縦断面図を示す。 第2図は本発明の複合集積化した光電変換装置の縦断面
図を示す。 第3図は本発明の製造工程を示す。 特許出願人 0 jAH’:;’+ ?/        30 1Oも2印
FIG. 1 shows a longitudinal cross-sectional view of a conventional photoelectric conversion device. FIG. 2 shows a longitudinal cross-sectional view of the composite integrated photoelectric conversion device of the present invention. FIG. 3 shows the manufacturing process of the present invention. Patent applicant 0 jAH':;'+? / 30 1O is also 2 marks

Claims (1)

【特許請求の範囲】 ■、透光性の第1の絶縁基板と、該基板上の透光性導電
膜を有する第1の電極と、該電極上の光照射により光起
電力を発生する少なくともひとつのPNまたはPIN接
合を有する非単結晶半導体と、該半導体上の透光性導電
膜よりなる第2の電極と、該電極より離間して設けられ
た透光性の第2の絶縁基板と、該基板と前記第2の電極
間に充填された透光性絶縁物よりなることを特徴とする
光電変換装置。 2、特許請求の範囲第1項において、酸化スズを主成分
とする第1の電極と、P型半導体を主成分とする非単結
晶半導体とか密接して第1の界面を構成して設けられる
とともに、酸化の界面を構成して設けられたことを特徴
とする光電変換装置・
[Scope of Claims] (2) A first translucent insulating substrate, a first electrode having a translucent conductive film on the substrate, and at least one that generates a photovoltaic force by light irradiation on the electrode A non-single crystal semiconductor having one PN or PIN junction, a second electrode made of a transparent conductive film on the semiconductor, and a second transparent insulating substrate provided apart from the electrode. . A photoelectric conversion device comprising a transparent insulator filled between the substrate and the second electrode. 2. In claim 1, a first electrode mainly composed of tin oxide and a non-single crystal semiconductor mainly composed of a P-type semiconductor are provided in close contact with each other to form a first interface. In addition, a photoelectric conversion device/
JP58018622A 1983-02-07 1983-02-07 Method for manufacturing photoelectric conversion device Expired - Lifetime JPH0656893B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58018622A JPH0656893B2 (en) 1983-02-07 1983-02-07 Method for manufacturing photoelectric conversion device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58018622A JPH0656893B2 (en) 1983-02-07 1983-02-07 Method for manufacturing photoelectric conversion device

Publications (2)

Publication Number Publication Date
JPS59144180A true JPS59144180A (en) 1984-08-18
JPH0656893B2 JPH0656893B2 (en) 1994-07-27

Family

ID=11976718

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58018622A Expired - Lifetime JPH0656893B2 (en) 1983-02-07 1983-02-07 Method for manufacturing photoelectric conversion device

Country Status (1)

Country Link
JP (1) JPH0656893B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108780A (en) * 1979-02-14 1980-08-21 Sharp Corp Thin film solar cell
JPS57104278A (en) * 1980-12-22 1982-06-29 Semiconductor Energy Lab Co Ltd Photoelectric converting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55108780A (en) * 1979-02-14 1980-08-21 Sharp Corp Thin film solar cell
JPS57104278A (en) * 1980-12-22 1982-06-29 Semiconductor Energy Lab Co Ltd Photoelectric converting device

Also Published As

Publication number Publication date
JPH0656893B2 (en) 1994-07-27

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