JPS59139639A - Manufacturing device for semiconductor - Google Patents

Manufacturing device for semiconductor

Info

Publication number
JPS59139639A
JPS59139639A JP58012733A JP1273383A JPS59139639A JP S59139639 A JPS59139639 A JP S59139639A JP 58012733 A JP58012733 A JP 58012733A JP 1273383 A JP1273383 A JP 1273383A JP S59139639 A JPS59139639 A JP S59139639A
Authority
JP
Japan
Prior art keywords
section
pellet
lead frame
signal
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58012733A
Other languages
Japanese (ja)
Inventor
Yuzo Taniguchi
雄三 谷口
Michio Tanimoto
道夫 谷本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58012733A priority Critical patent/JPS59139639A/en
Publication of JPS59139639A publication Critical patent/JPS59139639A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7865—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/859—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector involving monitoring, e.g. feedback loop
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015—Shape
    • H01L2924/1016—Shape being a cuboid
    • H01L2924/10162—Shape being a cuboid with a square active surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To prevent the generation of defectives positively, to inhibit an increase of cost regarding a manufacturing device and to reduce cost by mounting an external-appearance inspecting section while being arranged to a position recognizing section set up to a wire bonder and processing each signal from these position recognizing section and external-appearance inspecting section by the same signal processing section. CONSTITUTION:When a lead frame 5 on which a pellet 6 is fixed is brought onto a bonding stage 15 in a pellet bonder 1, an ITV camera 16 picks up the surface of the pellet, and a signal is transmitted over a signal processing section 17. The relationship of a relative position between both the lead frame 5 and the pellet 6 is obtained by recognizing the shape and size of the lead frame and the pellet by a computer 19, and a signal comparing the position and a reference position is transmitted over an X-Y table 11 and a bonding head 12. The X-Y table 11 and the bonding head 12 set the position of a bonding tool 14 coinciding with the lead frame 5 and the pellet 6 at the initial stage, and can bond wires automatically according to a predetermined sequence.

Description

【発明の詳細な説明】 本発明は半導体装置の製造工程の一つであるワイヤボン
ディング全自動的に行ないかつその良否検査全自動的に
行なうことができるワイヤボンダを備えた半導体製造装
置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor manufacturing apparatus equipped with a wire bonder capable of fully automatically performing wire bonding, which is one of the manufacturing processes of semiconductor devices, and fully automatically inspecting the quality of the wire bonding.

半導体装置の製造工程、中でも形成された素子ペレット
を所要のパッケージ内に実装する所謂後工程では、ペレ
ット付、ワイヤボンディング、モールド（封止）等の各
工程を自動化することが進められておシ、既に実用化さ
れている。しかしガから、この種の自動機では前記した
各工程を連続して行なっているため製造された半導体装
置に不良が存在する場合にはいずれの工程が不良である
か直ちには判らず、改めて分解して不良原因を調べなけ
ればならない。また、前述した不良検査は現在では自動
化されていないため、全数検査若しくは抜き酸９検査の
効率が悪いという問題がある。In the manufacturing process of semiconductor devices, especially in the so-called post-process where formed element pellets are mounted in the required package, automation of each process such as pellet attachment, wire bonding, molding (sealing), etc. is progressing. , has already been put into practical use. However, since this type of automatic machine performs each of the above-mentioned processes in succession, if there is a defect in the manufactured semiconductor device, it is not immediately clear which process is defective, and the device must be disassembled again. The cause of the failure must be investigated. Furthermore, since the defect inspection described above is not automated at present, there is a problem that the efficiency of 100% inspection or acid extraction 9 inspection is low.

なお、実際に本発明者が前記不良品について検査を行な
−）たところ、不良原因の大部分はワイヤボンディング
工程以前、つまシベレソトボ／ディング、ワイヤボンデ
ィング等において生じる傾向にあることが判明している
。In addition, when the present inventor actually inspected the above-mentioned defective products, it was found that most of the causes of defects tend to occur before the wire bonding process, such as during the bonding process, wire bonding, etc. There is.

したがって本発明の目的はワイヤボンデイング後の外観
検査を自動的に行ない得るよう構成することにより、半
導体装置の全数検査を自動化して不良品の発生を確実に
防止すると共に検査をも含めた製造能率の向上を図るこ
とができる半導体製造装置を提供することにある。Therefore, an object of the present invention is to automate the complete inspection of semiconductor devices by automatically performing the visual inspection after wire bonding, thereby reliably preventing the occurrence of defective products, and improving manufacturing efficiency including inspection. An object of the present invention is to provide a semiconductor manufacturing apparatus that can improve the performance.

この目的を達成するために本発明は、ワイヤボンダに付
設されている位置認識部に並設して外観検査部を設け、
位置認識部と外観検査部とを同一の信号処理部にて処理
できるように構成したものである。In order to achieve this object, the present invention provides an appearance inspection section in parallel with the position recognition section attached to the wire bonder,
The position recognition section and the visual inspection section are configured so that they can be processed by the same signal processing section.

以下、本発明を図示の実施例により説明する。Hereinafter, the present invention will be explained with reference to illustrated embodiments.

第１図および第２図は本発明の半導体製造装置の一実施
例であシ、図示左側からベレットボンダ１、ワイヤボン
ダ２、モールド成形機３を一連に配設し、製造、組立て
られる半導体構体４は適宜な搬送手段にニジ左から右方
へ移動される。即ち、ペレットボンダ１に供給された多
連のリードフレーム５上には半導体素子ペレット６を所
定の位置に固着し、ワイヤボンダ２ではこのベレット６
とリードフレーム５とを極細線のワイヤ７にて接続する
。マタ、モールド成形機３では前記ベレット６やワイヤ
７を樹脂材にて一体にモールド封止し、場合によっては
その後にリードフレームの切断、曲成を行なって夫々独
立した半導体装ｆを形成する。1 and 2 show an embodiment of the semiconductor manufacturing apparatus of the present invention, in which a bullet bonder 1, a wire bonder 2, and a mold forming machine 3 are arranged in series from the left side of the figure, and a semiconductor structure 4 is manufactured and assembled. is moved from left to right by an appropriate conveyance means. That is, semiconductor element pellets 6 are fixed at predetermined positions on the multiple lead frames 5 supplied to the pellet bonder 1, and the pellets 6 are fixed in the wire bonder 2.
and the lead frame 5 are connected with a very fine wire 7. In the molding machine 3, the pellet 6 and the wire 7 are integrally molded and sealed with a resin material, and depending on the case, the lead frame is then cut and bent to form independent semiconductor devices f.

前記ワイヤボンダ２は、上流位置の位置認識部８を有す
るワイヤボンディング部９と、下流位置の外観検査部Ｉ
Ｏとで構成している。ワイヤボンディング部９Ｆｉ、Ｘ
Ｙテーブル１１上に搭載したボンディングヘッド１２か
ら突出したボンディングアーム１３の先端にボンディン
グツール１４を　　゛配設し、ボンディングステージ１
５上にセットされた前記半導体構体（リードフレーム５
とベレット６）４に対して公知のようにワイヤ７を接続
する。また前記ステージ１５の上方には位置認識部８の
工ＴＶカメラ１６を設置し、この工ＴＶカメラ１６の出
力を信号処理部１７に送出することにニジリードフレー
ム５とベレット６との実際の位置を認識し、この認識結
果に基づいて前記ワイヤボンディング作業全好適に行な
い得る。っｔｂ、信号処理部１７は工Ｔｖカメラ１６の
信号を例えば光量に基づいて２値化する画像処理部１８
と、この２値化さ′ｉ″した信号に基づいて形状、寸法
、位置を認識するコンピータ１９とを備え、ワイヤボン
ディングされる半導体構体４がボンティングステージ１
５上に移動されて来たときに短時間の動作でリードフレ
ーム５とベレット６の位置ヲ認酸し、前記ボンディング
ヘッド１２やＸＹテーブル１１等に認識し、たデータを
送出する。The wire bonder 2 includes a wire bonding section 9 having a position recognition section 8 at an upstream position, and an appearance inspection section I at a downstream position.
It is composed of O. Wire bonding part 9Fi,X
A bonding tool 14 is disposed at the tip of a bonding arm 13 protruding from a bonding head 12 mounted on a Y table 11, and a bonding stage 1 is installed.
The semiconductor structure (lead frame 5) set on the lead frame 5
and the bellet 6) and the wire 7 is connected in a known manner to the 4. Further, a mechanical TV camera 16 of a position recognition section 8 is installed above the stage 15, and the output of this mechanical TV camera 16 is sent to a signal processing section 17 to determine the actual positions of the rainbow lead frame 5 and the pellet 6. The wire bonding operation can be performed in a suitable manner based on this recognition result. tb, the signal processing unit 17 is an image processing unit 18 that binarizes the signal from the TV camera 16 based on the amount of light, for example.
and a computer 19 that recognizes the shape, size, and position based on the binarized signal 'i'', and the semiconductor structure 4 to be wire bonded is placed on the bonding stage 1.
5, the positions of the lead frame 5 and pellet 6 are recognized in a short time, and the recognized data is sent to the bonding head 12, the XY table 11, etc.

一方、外観検査部１０は検査テーブル２０上方に配置し
た工ＴＶカメラ２１を備え、ワイヤボンディングされた
半導体構体４が検査テーブル２゜上に移動さねて米たと
きにこれを撮像する。この工ＴＶカメラ２１は焦点深度
が極めて小さくなるような光学系構造とし、かつその焦
点位置は半導体構体の上側表面の最下面から最上面の間
の任意の平面位置に変化設定で゛きるようにしている。On the other hand, the appearance inspection section 10 is equipped with a mechanical TV camera 21 placed above the inspection table 20, which takes an image of the wire-bonded semiconductor structure 4 when it does not move above the inspection table 2°. The optical system structure of this engineered TV camera 21 is such that the depth of focus is extremely small, and the focal point position can be changed to any plane position between the bottom surface and the top surface of the upper surface of the semiconductor structure. ing.

また、ＩＴ■カメラ２１の出力は前記信号処理部１７に
送出し、特に形状、位置等の認＃全可能にしている。Further, the output of the IT camera 21 is sent to the signal processing section 17, so that the shape, position, etc. can be fully recognized.

なお、前記ベレットボンダ１やモールド成形機３は略従
来構造をそのｉｔ使用できるのでその詳細は省略する。It should be noted that the bullet bonder 1 and the mold forming machine 3 can have substantially conventional structures, so the details thereof will be omitted.

以上の構成によれば、ペレットボンダ１においてベレッ
ト６が固着されたリードフレーム５がボンディングステ
ージ１５上に到来されると、直ちに工ＴＶカメラ１６が
その表面を撮像し、信号を信号処理部１７に送出する。According to the above configuration, when the lead frame 5 to which the pellet 6 is fixed in the pellet bonder 1 arrives on the bonding stage 15, the mechanical TV camera 16 immediately images the surface and sends a signal to the signal processing section 17. Send.

ここでは、リードフレーム５やベレット６の像を画像処
理部１Ｂで２値化し、更にコンピュータ１９においてリ
ードフレーム５やベレット６の形状、寸法を認識するこ
とによジ両者の相対位置関係を求め、この位置と基面位
置とを比較した信号をＸＹテーブル１１やボンディング
ヘッド１２に送出する。この信号によシスＹテーブル１
１やボンディングヘッド１２はこのリードフレーム５や
ベレット６に合致するボンディングツール１４位置を初
期設定し、以下所定のシーケンスによって自動的にワイ
ヤボンディングを行なりことができる。Here, the images of the lead frame 5 and the pellet 6 are binarized by the image processing unit 1B, and the relative positional relationship between the two is determined by recognizing the shapes and dimensions of the lead frame 5 and the pellet 6 by the computer 19. A signal comparing this position with the base surface position is sent to the XY table 11 and bonding head 12. With this signal, system Y table 1
1 and the bonding head 12 can initially set the position of the bonding tool 14 that matches the lead frame 5 and the pellet 6, and then wire bonding can be performed automatically according to a predetermined sequence.

一方、このワイヤボンディング作業の最中、先にワイヤ
ボンディングが完成された半導体構体４は検査テーブル
２０上においてＩＴＶカメラ２１にニジ撮像される。こ
の際、■ＴＶカメラ２１は、第３図に示すように順序的
に焦点位置が変化され（Ｐ＋　〜Ｐ５　）、夫々の焦点
位置の像を順次信号処理部１７にて送出する。このため
、半導体構体４は断層的に撮像されて信号処理部１７に
おいて形状、位置等が認識されることになｐ、ｊ￥１な
る平面的な検査のみならず立体的な検査が可能となる。On the other hand, during this wire bonding work, the semiconductor structure 4 on which the wire bonding was previously completed is imaged by the ITV camera 21 on the inspection table 20. At this time, (1) The focal position of the TV camera 21 is sequentially changed (P+ to P5) as shown in FIG. Therefore, the semiconductor structure 4 is imaged tomographically and its shape, position, etc. are recognized by the signal processing unit 17, making it possible to perform not only a two-dimensional inspection but also a three-dimensional inspection. .

したがって、ワイヤ７の立体的な状態を検査すれば、ワ
イヤ７とリードフレーム５との接触（短絡）やワイヤ相
互間の接触（短絡）を極めて容易に検査できる。勿論、
ベレットやリードフレームにおけるワイヤの接続状態を
も検査できる。そして、この検査は工ＴＶカメラ２１の
無点位置変化を自動的にコントロールすれば、信号処理
部１７における処理も自動的に行なえるため、検査全工
程を自動化することができる。更に、この検査はワイヤ
ボンディング部９においてワイヤボンディング作業を行
なっている間、換言すればワイヤボンデインク部におい
て位置認識が既に完了されて信号処理部１７が作動して
いない間（遊んでいる間）に行なうので、信号処理部の
有効利用を図９、一方では新たに信号処理部全役けるこ
とを要しない。Therefore, by inspecting the three-dimensional state of the wire 7, contact between the wire 7 and the lead frame 5 (short circuit) and contact between the wires (short circuit) can be very easily inspected. Of course,
Wire connections in pellets and lead frames can also be inspected. In this inspection, if the pointless position change of the machine TV camera 21 is automatically controlled, the processing in the signal processing section 17 can also be performed automatically, so that the entire inspection process can be automated. Furthermore, this inspection is performed while the wire bonding work is being performed in the wire bonding section 9, in other words, while the position recognition has already been completed in the wire bonding section and the signal processing section 17 is not operating (while it is idle). Therefore, the signal processing section can be used effectively as shown in FIG. 9, and on the other hand, it is not necessary to newly use the entire signal processing section.

この検査の結果、良品をのみモールド成形機３に移送し
不良品は回収して補修を行ない再検査に付せば、少ガく
ともワイヤボンディング工程以前における不良品が発生
することは全くなく、伽に不良が生じたときにはそｔよ
ｐも後工程のパソケージ工程が原因であることは直ちに
判明し、その対策も迅速に行なうことができる。As a result of this inspection, if only good products are transferred to the molding machine 3 and defective products are collected, repaired, and re-inspected, there will be no defective products before the wire bonding process. When a defect occurs in the cage, it is immediately obvious that the cause is the subsequent package process, and countermeasures can be taken quickly.

ガお、前例ではベレットボンダ、ワイヤボンダおよびモ
ールド成形機全一体化した自動機として半導体製造装置
を構成しているが、ワイヤボンダを単独で構成すること
も勿論可能である。In the previous example, the semiconductor manufacturing apparatus was configured as an automatic machine that integrated a bullet bonder, a wire bonder, and a molding machine, but it is of course possible to configure the wire bonder alone.

以上のように本発明の半導体製造装置によれば、ワイヤ
ボンダに設けた位置認識部に並んで外観検査部を設け、
これら位置認識部と外観検査部の各信号処理全同一の信
号処理部において行表うように構成しているので、ワイ
ヤボンディングされた半導体構体の検査を自動的にしか
も全数検査することができ、不良品の発生を確実に防止
することができると共に、既存のワイヤボンダに新たに
外観検査部を付設する場合にもその信号処理部は既設の
位置認識部のものを利用できるので、製造装置のコスト
高を抑制して低コストに構成することができるとい、５
効果を奏する。As described above, according to the semiconductor manufacturing apparatus of the present invention, the appearance inspection section is provided in line with the position recognition section provided on the wire bonder,
Since the signal processing of the position recognition unit and the visual inspection unit is configured to be performed in the same signal processing unit, wire-bonded semiconductor structures can be inspected automatically and 100%. It is possible to reliably prevent the occurrence of defective products, and even when adding a new visual inspection section to an existing wire bonder, the signal processing section can be used from the existing position recognition section, reducing the cost of manufacturing equipment. It is said that it can be configured at low cost by suppressing the high cost.
be effective.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図および第２図は本発明装置の一実施例の正面図と
平面図、 第３図は検査方法を説明するための半導体構体の正面図
である。 １・・・ベレットボンダ、２・・・ワイヤボンダ、３・
・・モールド成形機、４・・・半導体構体、５・・リー
ドフレーム、６・・・ベレット、７・・・ワイヤ、８・
・・位置認識部、９・・・ワイヤボンディング部、１０
　内外Ｗｉｌ検査部、１４・・・ボンディングツール、
１６・・・ＩＴＶカメラ、１７・・・信号処理部、１８
・・・画像処理部、１９・・・コンピュータ、２１・・
・ＩＴＶカメラ。1 and 2 are a front view and a plan view of an embodiment of the apparatus of the present invention, and FIG. 3 is a front view of a semiconductor structure for explaining the inspection method. 1...Bellet bonder, 2...Wire bonder, 3.
...Mold forming machine, 4...Semiconductor structure, 5...Lead frame, 6...Bellet, 7...Wire, 8...
...Position recognition section, 9...Wire bonding section, 10
Internal and external Wil inspection department, 14... bonding tool,
16... ITV camera, 17... Signal processing section, 18
...Image processing unit, 19...Computer, 21...
・ITV camera.

Claims (1)

【特許請求の範囲】 １、少なくとも位置認識部を有するワイヤポンダを備え
た半導体製造装置において、前記位置認贈部に並んで外
観検査部を設け、位置認識部と外観検査部の各出力信号
を同一の信号処理部により処理するように構成したこと
を特徴とする半導体製開蓋をもって同一の信号処理部で
処理する特許請求の範囲第１項記載の半導体製造装置。 ３、信号処理部は、工ＴＶカメラ等の撮像信号を２値化
する画像処理部と、この２値化された信号に基づいて形
状、寸法、位置１［識するコンピュータとを備えてなる
特許請求の範囲第１項又は第２項記載の半導体製造装置
。[Claims] 1. In a semiconductor manufacturing apparatus equipped with a wireponder having at least a position recognition section, an appearance inspection section is provided alongside the position recognition section, and each output signal of the position recognition section and the appearance inspection section is the same. 2. The semiconductor manufacturing apparatus according to claim 1, wherein processing is performed by the same signal processing section having a semiconductor opening lid. 3. The signal processing unit includes an image processing unit that binarizes the image pickup signal of an industrial TV camera, etc., and a computer that recognizes the shape, size, and position based on the binarized signal. A semiconductor manufacturing apparatus according to claim 1 or 2.
JP58012733A 1983-01-31 1983-01-31 Manufacturing device for semiconductor Pending JPS59139639A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58012733A JPS59139639A (en) 1983-01-31 1983-01-31 Manufacturing device for semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58012733A JPS59139639A (en) 1983-01-31 1983-01-31 Manufacturing device for semiconductor

Publications (1)

Publication Number Publication Date
JPS59139639A true JPS59139639A (en) 1984-08-10

Family

ID=11813633

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58012733A Pending JPS59139639A (en) 1983-01-31 1983-01-31 Manufacturing device for semiconductor

Country Status (1)

Country Link
JP (1) JPS59139639A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6139537A (en) * 1984-07-31 1986-02-25 Shinkawa Ltd Tape bonder
JPS63144531A (en) * 1986-12-03 1988-06-16 ビユ−・エンジニアリング・インコ−ポレ−テツド Semiconductor device image pickup tester
US4872052A (en) * 1986-12-03 1989-10-03 View Engineering, Inc. Semiconductor device inspection system
JP2020013938A (en) * 2018-07-19 2020-01-23 セイコータイムシステム株式会社 Inspection apparatus of lead frame

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6139537A (en) * 1984-07-31 1986-02-25 Shinkawa Ltd Tape bonder
JPS63144531A (en) * 1986-12-03 1988-06-16 ビユ−・エンジニアリング・インコ−ポレ−テツド Semiconductor device image pickup tester
US4872052A (en) * 1986-12-03 1989-10-03 View Engineering, Inc. Semiconductor device inspection system
JPH0569304B2 (en) * 1986-12-03 1993-09-30 Byuu Eng Inc
JP2020013938A (en) * 2018-07-19 2020-01-23 セイコータイムシステム株式会社 Inspection apparatus of lead frame

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