JPS59136870A - Integration time variable type dual slope integrator - Google Patents

Abstract

PURPOSE:To ensure more flexible measurement compared with a conventional case where the integration time is fixed by varying the integration time and at the same time correcting the discharge time in response to the integration time. CONSTITUTION:A control circuit 16 sets the integration time to a counter 11 for integration time. Then the circuit 16 actuates the counter 11 to close a switch 3. Thus the signal to be measured which is sent from a terminal 1 is applied to an integrator 5. The counter 11 opens the switch 3 when the set integration time elapses and completes the integration of the integrator 5. Then the circuit 16 closes a switch 4 and discharges the integrator 5 with the discharge signal sent from a terminal 2. This discharge time is counted by a counter 7 for discharge time. Here the output of the counter 7 is corrected by a calculator 12 for correction of integration time. Thus it is possible to perform more flexible measurement compared with a conventional case when the integration time is fixed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improvements in dual slope integrators, and more particularly to dual slope integrators that have increased flexibility by making the integration time variable.

FIG. 1 shows a block diagram of a conventional dual slope integrator, and FIG. 2 shows a graph of changes over time in the integral value of the conventional dual slope integrator. In FIG. 1, the input terminal 1 is supplied with the signal to be measured, and the input terminal 2 is supplied with the discharge layer signal.The control circuit 6 causes the switch 3 to operate for a certain period of time T.

Only the clothes can be closed. As a result, the input signal -, ridge (FIG. 2) is integrated by the integrator 5 for a certain period of time 'ro. Thereafter, the control circuit 6 closes the switch 4 and discharges until the integral value becomes O.

The discharge times Do and Dl (FIG. 2) of the integrator 5 are counted by a discharge time counter 7, and the resulting count is outputted from an output terminal 8. FIG. 2 shows α#(the above-mentioned integration-discharge operation). In the same figure, the vertical axis is the integrator and the horizontal axis is time.

As can be seen from the above example, in the conventional dual slope integrator, the integration time of the signal under test. constant (To)
The value of the signal to be measured is determined from the discharge times Do and D+. However, depending on the measurement conditions
[In some cases, it may not be possible to secure a constant integration time, or if the integration time is made variable, the control of the measuring instrument may be simplified. For example, when measuring time-varying signals, the integration time should not be determined by the convenience of the measuring instrument;
C must be determined depending on the characteristics of the signal under test. In addition, if a sufficient integral value cannot be secured with the integral time determined by the characteristics of the signal under test, etc., the integral operation can be performed by repeatedly generating the signal under test (repeatedly to obtain a sufficient integration time). For example, in sampling integration, the integration time required to ensure a sufficient amount of integration C1 is 1 Qrris, but under certain conditions, the integration time per time is only 3 ms. A fraction of the integration time will appear.For this reason, if you want to ensure an accurate integration time of 10 m5, you will have to adjust the final integration time, and if you start integration at the same timing as the previous integration, the integration interval will be Since the center time of the measurement changes, the integration start timing must also be changed in some cases. In order to carry out such control, the configuration of the measuring instrument becomes complicated.

The present invention eliminates the drawbacks of the conventional dual slope integrator as described in -F, and is therefore characterized by making the integration time variable and correcting the discharge time in accordance with the integration time.

The present invention will be described in detail below based on the drawings. FIG. 3 is a block diagram of a variable integration time type dual slope integrator which is an embodiment of the present invention. In FIG. 3, the same parts as in FIG. 1 are designated by the same reference numerals. In FIG. 3, first, the control circuit 16 sets the C integration time to the integration time counter 11. In FIG. The set integration time is calculated within the control circuit 16 based on measurement conditions and the like. Then, the control circuit 16 starts the integral time counter 11 and closes the switch 3. The signal under test applied from the input terminal 1 enters the °C integrator 5 via the switch 3 and is integrated. When the set integration time has elapsed, the integration time counter 11 discharges the integrator 5 until the integral value reaches zero using a discharging signal that opens the switch 3. stop'
[The discharge time is counted by the discharge time counter 7. In the present invention, since the integral time is variable, the output of the discharge time counter 7 is further corrected in the integral time correction calculator 12. For example, while the necessary integration time mentioned above is fixed at one time, that is, the reference integration time is 'ro,' the integration time counter 1
Assuming that the variable integration time set to 1 is r1, the output D1' of the discharge time counter 7 is multiplied by the correction - #'I'o/'rr to calculate the discharge for the reference integration time 'ro'. Convert to time (count value)
Output from output terminal 8. In addition, integral time correction calculator 1
2 is the set integration time °r1 and reference integration time 'l' for calculating the correction coefficient To/TI.

are inputted from the integral time counting column 11 and the control circuit 16, respectively. The terminal 10 of the integration time counter 11 is a signal input terminal for stopping the integration from the outside. FIG. 4 also shows the standard integration time 'ro' and the variable integration time 'rI.
3 is a graph showing the time change of the integral value for the same human input signal in the integrator 5 in FIG. 3. As already mentioned, the discharge time D' corresponding to the variable integration time r1
To convert 1 to the discharge time corresponding to the reference integration time 'ro, use 1r.

D=DIX five All you have to do is do some calculations.

Although the time variation of the integral value shown in FIG. 4 shows the case where continuous C-integration is performed, it is obvious that the present invention can also be applied to the case of sampling integration. FIG. 5 is a graph showing changes in integral values over time in the case of sampling integration. In FIG. 5, an example is shown in which an integral operation of 11 hours is repeated four times each time. In this case, 'r1 of the above-mentioned correction coefficient To/'r1 may be set to 4·11.

As explained above, according to the present invention, by making the integration time variable, more flexible measurement is possible than in the past.

In another embodiment of the present invention, instead of setting the C1 integration time, the integral value is integrated until it reaches a certain level, and the integration time is set to the correction coefficient To It can also be used as T in /T+. 6th
The figure is a block diagram of an embodiment of a variable integration time type dual slope integrator for realizing this. In the block diagram of FIG. 6, the parts basically different from those in FIG. 3 are a level comparator 20 and a reference level voltage source 22. When the control circuit 26 starts the integral time counter 21,
The counter 21 starts counting the integration time and at the same time closes the switch 3 to start integrating the signal under measurement. The integral value of the integrator 5 is led to a level comparator 20 and compared with a reference level voltage from a reference level voltage source 22. Then, when the integral value reaches the reference level voltage, the level comparator 20 starts integrating A stop signal is given to the time counter 21. This stop signal causes the C integral time counter 21 to stop counting and open the switch 3. After that, the control circuit 2
6, the switch 4 is closed and the integrated value in the integrator 5 is discharged until it becomes O. This discharge time is counted in °C by a discharge time counter 7. Thereafter, the integral time correction calculator 12 obtains the standard integral times "Os, integral time T, and discharge time D+" from the control circuit 26, the integral time counter 21, and the discharge time counter 7, respectively.'C1 standard integral time To, The discharge time (count m) D is calculated using the calculation formula and outputted from the output terminal 8. FIG. 7 is a graph showing changes over time in the integral value of the integrator 5 in FIG. 6 for two signals under measurement U, . . . U2 having different levels. Here, since the integration time and discharge time of the signal under test UItU2 are T, D1'', T2 and D2'', the reference integration time To is converted to K, and the discharge time is D.
i"X To/'rI, D2/X T6/'r
2.

According to this embodiment, the measurement range of a single range can be increased simply by changing the clock frequency of the discharge time counter 21. For example, if this clock frequency is increased by 10 times, it is possible to measure up to 10 times as many inputs with the same resolution without changing the range.

In addition to this, various other applications can be considered by changing the conditions for stopping the integration of the signal under test.

The present invention can be used, for example, in a length integrator, a length integrator, etc. as shown in Japanese Patent Application No. 173854/1982, and has a great effect on temperature.

[Brief explanation of drawings]

Figure 1 is a block diagram of a conventional dual slope integrator.
FIG. 2 is a graph showing the time change of the integral value of the integrator in FIG. Figure 3 is a graph showing the time change of the integral value of the integrator, Figure 5 is a graph showing the time change of the integral value when the integrator in Figure 3 performs sangrifuge integration operation, and Figure 6 is a graph showing the time change of the integral value of the integrator in Figure 3. FIG. 7 is a block diagram of a variable integration time type dual slope integrator according to another embodiment of the present invention, and FIG. 7 is a graph showing changes over time in the integral value of the integrator in FIG. 5: multiplier, 6, 16, 26: control circuit, 7: discharge time counter, 11.21: integration time counter, 20 two-level comparator, 22: reference level voltage source. Applicant: Yokogawa Koushi Vnt Packard Co., Ltd. Agent
Patent Attorney Tsugu Hasegawa I-Jun

Claims (1)

[Claims] an integrator that discharges after integrating an input signal; a means for controlling the integration time of the integrator; a means for measuring the discharge time of the integrator; A variable integration time type dual slope integrator is provided with a correction calculation means that performs correction calculation according to the output and outputs the result.