JPS59132247A - Quartz clock pll synthesizer tuner - Google Patents

Abstract

PURPOSE:To correct the shift of center frequency due to the variation in components by controlling a bias voltage with the output of a detector at reception. CONSTITUTION:When a broadcast signal is received, a changeover switch 16 is switched to a charge pump amplifier 17. A DC voltage along with the S-curve characteristic of a detector 5 in response to a shift in the center frequency produced by the variation in components is outputted in this case and inputted to the charge pump amplifier 17. A capacitor C2 is charged/discharged so that the DC voltage is 0V ad a bias voltage of a varactor diode 15 is obtained, an oscillating frequency of a crystal oscillating circuit 12 is corrected and an IF frequency is locked in the best condition.

Description

[Detailed Description of the Invention] The present invention provides:
This invention relates to a quartz lock PLL synthesizer tuner that allows the F stage and detector to operate well.

The conventional quartz lock PLL synthesizer tuner is
As shown in FIG. 1, the local oscillator is composed of a voltage controlled oscillator 6. The output of the voltage controlled oscillator 6 is input to a programmable frequency divider 7 controlled by a microcomputer 13 and frequency-divided. Further, as shown in Figure 2-1, the output of the configured crystal oscillator 12 is frequency-divided by a programmable frequency divider 11 controlled by a microcomputer 13. These divided voltages f! The output signal of the II-controlled oscillator 6 and the frequency-divided output signal of the crystal oscillator 12 are input to a phase comparator 8 for phase comparison, and an output corresponding to the phase difference is obtained. Then, the output of the phase comparator 8 is amplified by the position flow amplifier 9, and is passed through the low-pass filter 10.
The oscillation frequency is locked by a closed loop, such as zero or more, which is input as a control voltage to the voltage controlled oscillator 6 via the control voltage.

Further, the above-mentioned control voltage 1 is also used as a control voltage for tuning on the RF amplification section. In this way, the local oscillation frequency signal obtained from the voltage controlled oscillator 6 and the reception frequency signal obtained from the RF amplification section are input to the mixer 3,
Obtain an intermediate frequency signal. This intermediate frequency signal is passed through an IF (intermediate frequency) amplification section 4 and a detection section 5 to obtain a detected output.

Since the conventional quartz lock PLL synthesizer tuner is configured as described above, the local oscillation frequency can be accurately fixed at the set frequency, and therefore an IF frequency accurate to the set frequency can be obtained. However, the IF amplifying section and the detecting section have unsatisfactory performance in terms of distortion and selectivity due to deviations between the set IF frequency and the actual center frequency due to variations in components. Therefore, there was a device that corrected it using the following method.The capacitor q in the crystal oscillation circuit shown in Fig. 2 was configured to be variable, so that it could be adjusted to a certain receiving frequency such as the center frequency of the receiving band. Only for 1., the oscillation frequency of the crystal oscillator 12 is varied by varying the capacitor Q, and - the local oscillation frequency is varied.
The IF frequency was corrected for optimal operation. However, at frequencies other than the above reception frequency,
There is a drawback that a deviation remains between the set IF frequency and the actual center frequency without being corrected.

Therefore, the present invention has been made in view of the above points, and consists of a variable capacitance diode instead of the capacitor CI, and the detector output is used as a control voltage of the variable capacitance diode, that is, as a reference frequency control signal. Additionally, the intermediate frequency is corrected.

Hereinafter, an embodiment of the present invention will be explained based on FIG. 4. In FIG.
By switching to the side b, a bias voltage is applied to the variable capacitance diode 15 so that the crystal oscillator 14 oscillates at a predetermined frequency. Next, when a broadcast signal is received, the selector switch 16 is switched to the charge pump amplifier 17 side. At this time, if a shift occurs in the center frequency due to variations in the components of the IF amplifier 4 and the detector 5, a DC voltage along the S-curve characteristic of the detector 5 is output in an amount corresponding to the shifted frequency. The DC voltage is input to the charge pump amplifier 17. Then, the capacitor C2 is charged and discharged so that the DC voltage becomes Ov. Charging t of this capacitor C2
The oscillation frequency of the crystal oscillation circuit 12 is corrected by the IAS pressure, and the IF frequency is locked in the best condition. .

In the above embodiment, the case of FM reception was explained, but in the case of AM reception, a detection circuit with an S curve characteristic is provided between the detector output and the charge pump amplifier input, so that the same result as in the above embodiment can be achieved. It has the effect of

Also, as shown in FIG. 5, a signal is used instead of the switch 16. The bias voltage of the variable capacitance diode ° 15 may be switched using an electronic switch 19 operating on the meter, level, turn, signal. meter. When the level is not input, the transistor Q2 is not ON, and the voltage of the variable capacitance diode 15 is supplied at 1 voltage. When the signal, meter, level is input, Transistor Q8 is ON, transistor 1 is OFF, and the internal pressure is supplied from charge pump amplifier 17. Therefore, the same effect as in the above embodiment is achieved. It is also possible to use a relay or the like instead of the electronic switch.

As described above, according to the present invention, the bias voltage is supplied from the DC power supply to the variable capacitance diode that controls the oscillation frequency when not in the reception state, and the bias voltage is controlled by the detector output during reception, so that the parts It is possible to correct deviations in the center frequency due to variations in the center frequency.

[Brief explanation of the drawing]

FIG. 1 is a diagram of a conventional synthesizer, FIG. 2 is a diagram of a conventional crystal oscillation circuit, FIG. 3 is a block diagram of a synthesizer tuner of the present invention, and FIG. 4 is a diagram of a crystal oscillation circuit of the present invention. FIG. 5 is a diagram showing another embodiment of the present invention. 1...Antenna 2...RF amplifier 3...Mixer 4...IF amplifier 5...Detector
6... Voltage controlled oscillator 7.11... Programmable frequency divider 8... Phase comparator 9... DC amplifier 10...
Low-pass filter 12...Crystal oscillation circuit 13...Microcomputer 14...Crystal oscillator 15...Variable capacitance diode 16...Switch 17...Charge pump amplifier 18゛...DC cylinder 1 source 19...Electronic switch C*, Ct...Condenser t Ql-Qh...
Transistor patent applicant Pioneer Corporation Figure 1 Figure 2 Figure 5

Claims (1)

[Scope of Claims] A crystal oscillator is constructed with a variable frequency diode, is provided with a detector that outputs a voltage according to the frequency, and has a charge pump amplifier that amplifies the detected output, and has a charge pump amplifier that amplifies the detected output. A quartz lock PLL synthesizer tuner, characterized in that the local oscillation frequency is corrected by a variable capacitance die of the crystal oscillator through a charge pump and an E amplifier.