JPS59126321A - Multistage darlington transistor - Google Patents

Abstract

PURPOSE:To constitute a circuit wherein an output-stage transistor (TR) turns off securely lastly at low cost by connecting a speed-up diode which is connected to the base side of the output-stage TR invariably between the emitter and base of a TR right before it when the speed-up diode is connected to >=3 stages of multistage Darlington TRs. CONSTITUTION:A figure shows an example of four stages of Darlington TRs, and speed-up diodes 3, 32, and 33 are connected to base-emitter junctions of the TRs 1, 12, and 13 in an antiparallel direction. When the base circuit of this Darlington TR is cut off, the TRs turn off in the order of 1, 12, 13, and 2, so TRs of small chip size are usable as the TRs except the output-stage TR2 without requiring wide RBSOA characteristics. Further, the number of the speed-up diodes is only n-1.

Description

[Detailed description of the invention] The present invention is based on improving turn-off time.

This invention relates to a multi-stage Darlington transistor with three or more stages in which a speed-up diode is connected between the emitters.

In order to suck out carriers from the base of the output stage transistor when the Darlington transistor is off and shorten the turn-off time, an emitter is connected between the base and emitter of the front stage transistor 1, that is, the base of the output stage transistor 2, as shown in FIG. It is known to connect a diode 3, called a speed-up diode, antiparallel to the junction. Similarly, in a multi-stage Darlington transistor with three or more stages, in order to suck out carriers from the base of the transistor at the later stage, as shown in FIGS. It is conceivable to connect speed-up diodes 32 and 33 between them. However, in this case, assuming that the transistors at each stage are in a sufficiently saturated on state, and the base and emitter saturation voltages are the same, vBF, and the voltage drop value between the base and collector of the transistor 10 is 1, then, for example, as shown in Figure 2. , the collector and emitter of transistor 1 mmvoB, = vB, -vF
Collector and emitter saturation voltage V of transistor 12. 8
2 size ■BB-vF Collector and emitter saturation voltage of transistor 2 vCES = 3■BE2V.

Therefore, depending on the setting of hFFf of each stage transistor, there may be more excess carriers in transistor 12 than in transistor 2. Therefore, if the same type of diode as diode 3 is used as diode 32, the base circuit will be cut off.
When reverse bias is applied across BE, transistor 1
2) If the transistor turns off first, the power supply voltage may be applied to the collector of transistor 1 and transistor 1 may be destroyed. Therefore, the safe operating area when reverse biasing between the base and emitter (RBSC) is required to be wide not only for the transistor 2 but also for the transistor 12, which increases the area of the transistor 12 and increases the cost. Alternatively, as shown in FIG. 4, there is a method of using diodes 34 and 35 instead of diode 32, but this causes an increase in the number of speed-up diodes. In other words, in an n-stage Darlington transistor, x(yl-t)
diodes rFl are required, resulting in a huge number of diodes.

SUMMARY OF THE INVENTION An object of the present invention is to realize, at low cost, a circuit in which an output stage transistor is reliably turned off last when a speed-up diode is connected to a multi-stage Darlington transistor of three or more stages.

This purpose is for multi-stage Darlington transistors with three or more stages in which an anti-parallel speed-up diode is connected to the emitter junction of each transistor except the output stage.
This is achieved by connecting an anti-parallel speed-up diode to the emitter junction of the transistor immediately preceding the output stage between the emitter and base of that transistor.

Embodiments of the present invention will be described below with reference to the drawings. FIG. 5 shows an embodiment for a four-stage Darlington transistor, in which speed-up diodes 3, 32, and 33 are connected in antiparallel to the base and emitter junctions of transistors 1, 12, and 13 in each stage, respectively. When the base circuit of this Darlington transistor is cut off, transistors 1.12 and 13.2 are turned off in this order, so transistors other than output stage transistor 2 have a wide R
BSOA characteristics are not required and small chip size transistors can be used. Also, the number of speed-up diodes can be fi-1.

FIG. 6 shows another embodiment in which a speed-up diode 32 is placed anti-parallel to the emitter junction of transistor 12.
is connected between the base of the first stage transistor 1. In other words, since diode 3 and diode 32 are connected in parallel, transistor 120 then transistor 1
In some cases, the transistor 13 does not turn off and the transistor 13 turns off before the transistor 12, as shown in the collector current diagram of FIG. However, since diode 33 is connected in series with diode 32, it is transistor 2 that turns off last, resulting in a high collector-emitter voltage (vol
il) is applied only to transistor 2. Therefore, a wide RBSOA is required for transistor 2.
The front transistor has a wide RBSOA.
is not required and the number of speed-up diodes is now j
) n-1 pieces are enough.

As described above, when a speed-up diode is connected to a multi-stage driver 5-Lington transistor of three or more stages, the one connected to the base side of the output stage transistor is always connected between the emitter and base of the transistor immediately before it. After the previous stage transistor is turned off, the output stage transistor is finally turned off. As a result, the number of speed-up diodes can be minimized, and since the front-stage transistor is not required to have a wide RBSOA, a Darlington transistor with a short turn-off time can be constructed economically, so the effect obtained is extremely large. Of course, the present invention is applicable not only to the Darlington transistor made up of the NPN transistor 2 but also to the case made up of PNP transistors. ,

[Brief explanation of drawings]

Figures 1 to 4 are circuit diagrams showing various connection examples of speed-up diodes in Darlington transistors, Figure 5 is a circuit diagram showing one embodiment of the present invention, and Figure 6 is a circuit diagram showing another embodiment. 7 is a graph showing an example of the time course of the collector current and collector-emitter voltage of each element in the circuit of FIG. 6 at turn-off. 4... First stage transistor, 2... Output stage transistor, 3.32.33... Speed up diode, 12
．． 13 River middle stage transistor. 7-

Claims (1)

[Claims] 1) In a multi-stage Darlington transistor with three or more stages in which an anti-parallel speed-up diode is connected to the emitter junction of each transistor except the output stage, an anti-parallel speed-up diode is connected to the emitter junction of the transistor immediately before the output stage. is connected between the emitter and the base of the transistor.