GB2307609A

GB2307609A - Modified Darlington and Sziklai amplifiers

Info

Publication number: GB2307609A
Application number: GB9523823A
Authority: GB
Inventors: Theodoros Loizos Pallaris
Original assignee: Individual
Current assignee: Individual
Priority date: 1995-11-21
Filing date: 1995-11-21
Publication date: 1997-05-28
Also published as: GB9523823D0

Abstract

A compound transistor circuit comprises: a first transistor (T1) and a second transistor (T2) arranged somewhat like a Darlington configuration (Figure 6) or a Sziklai configuration (Figure 7); a first diode (D1) connected from the base to the emitter of the second transistor and oriented to bypass a portion of the base current of the second transistor; and a second diode (D2) connected in series with the collector of the second transistor and oriented to pass the collector current of the second transistor. The response speeds of the circuits are higher than those of the conventional Darlington and Sziklai circuits because the diodes are providing proper biasing to the two transistors. In the Figure 6 arrangement, only part of the leakage current of the first transistor is amplified by the second transistor, and therefore the overall leakage current is not as high as in a conventional Darlington circuit. The circuit of Figure 6 has a higher current gain, lower output resistance and higher input resistance than a single stage emitter follower, but not as high an input impedance as a conventional Darlington circuit.

Description

TITLE Compound Transistor Circuits DESCRIPTION This invention relates to compound transistor circuits, and in particular to such circuits which include first and second transistors arranged somewhat like a Darlington or Sziklai configuration.

A Darlington pair configuration of transistors is very well known and an NPN example is shown in Figure 1. The base and collector of an NPN first transistor T1 are connected to base and collector nodes B, C, respectively, of the compound transistor; the collector and emitter of an NPN second transistor T2 are connected to the collector node C and to an emitter node E, respectively, of the compound transistor; and the emitter of the first transistor is connected to the base of the second transistor. The compound transistor has a very high input impedance. It has a voltage gain which is close to unity.

Compared with a single-stage emitter-follower, it has a higher current gain and a lower output resistance. It behaves like a single transistor with a current gain equal to the product of the current gains of the two transistors, and this can be very useful where high output currents are required.

A drawback of the Darlington arrangement is that the leakage current of the first transistor T1 is amplified by the second transistor, and hence the overall leakage current may be very high. The overall base emitter drop is twice normal, and the saturation voltage is at least one diode drop, because the emitter of the first transistor T1 must be a diode drop above the emitter of the second transistor T2. A significant drawback is that the combination tends to act like a rather slow transistor because the first transistor T1 cannot quickly turn off the second transistor T2. A known way of attempting to deal with this problem is illustrated in Figure 2, in which a resistor R is connected from the base to the emitter of the second transistor T2.This resistor R also reduces the amount of leakage current through the first transistor T1 which tends to bias the second transistor T2 into conduction. The choice of the value of R is a compromise between reducing the leakage current, improving the response time, and not overly reducing the gain of the circuit. It is known also to include a further resistor R1 in parallel with the base-emitter junction of the first transistor T1, as shown in Figure 3, for example in the RCA 2N6383, 2N6384 and 2N6385 power transistors.

A Sziklai, or complementary Darlington, arrangement is also very well known, and an NPN example is shown in Figure 4. The base and emitter of an NPN first transistor T1 are connected to base and emitter nodes B, E, respectively, of the compound transistor; the collector and emitter of a PNP second transistor T2 are connected to the emitter node E and to a collector node C, respectively, of the compound transistor; and the collector of the first transistor is connected to the base of the second transistor. This compound transistor acts like an NPN transistor, again with a large current gain. The compound transistor has a high input impedance. It has only a single base-emitter drop and cannot saturate to less than a diode drop.Like the Darlington pair, the Sziklai arrangement acts like a rather slow transistor, and it is known to connect a resistor from the base to the emitter of the second transistor T2, as shown in Figure 5, to improve the speed.

In accordance with the present invention, a first diode is connected from the base to the emitter of the second transistor and oriented to bypass a portion of the base current of the second transistor; and a second diode is connected in series with the collector of the second transistor and oriented to pass the collector current of the second transistor.

In a preferred form, when applied to a configuration somewhat like a Darlington pair, the base of the first transistor is connected to a base node of the circuit, the emitter of the first transistor is connected to the first diode and to the base of the second transistor, an emitter node of the circuit is connected to the emitter of the second transistor and to the first diode, and a collector node of the circuit is connected to the collector of the first transistor and to the second diode.

In a preferred form, when applied to configuration somewhat like s Sziklai pair, the base of the first transistor is connected to a base node of the circuit, the collector of the first transistor is connected to the first diode and to the base of the second transistor, a collector node of the circuit is connected to the emitter of the second transistor and to the first diode, and an emitter node of the circuit is connected to the emitter of the first transistor and to the second diode.

The circuit may be provided in the form of an integrated circuit, and the circuit may have an accessible connection to the base and/or collector of the second transistor.

Specific embodiments of the invention will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 is a circuit diagram of a basic Darlington pair configuration; Figures 2 and 3 are circuit diagrams of known modified Darlington pair configurations; Figure 4 is a circuit diagram of a basic Sziklai, or complementary Darlington pair, configuration; Figure 5 is a circuit diagram of a known modified Sziklai configuration; Figure 6 is a circuit diagram of a circuit somewhat like a Darlington pair according to one embodiment of the present invention; and Figure 7 is a circuit diagram of a circuit somewhat like a Sziklai pair according to another embodiment of the present invention.

Referring to Figure 6, the NPN Darlington-type circuit has base, emitter and collector nodes B, E, C, respectively. An NPN first transistor T1 has its base and collector connected to the base and collector nodes, respectively, and its emitter connected to the base of an NPN second transistor T2. The second transistor has its emitter connected to the emitter node E, and its collector connected via a series diode D2 to the collector node. The diode D2 is oriented so as to conduct collector current to the second transistor T2. Another diode D1 is connected in from the base to the emitter of the second transistor T2 and is oriented so that it can bypass part of the base current of the second transistor T2.

The voltage gain of the circuit of Figure 6 is close to unity, as in the conventional Darlington circuit. The saturation voltage is at least one diode drop, since the emitter of the first transistor T1 must be a diode drop above the emitter of the second transistor, as in the conventional Darlington circuit. The base-emitter drop is twice normal, as in the conventional Darlington circuit of Figure 1. However, the response speed of the circuit of Figure 6 is higher than that of the conventional circuits because the diodes are providing proper biasing to the two transistors T1, T2. Only part of the leakage current of the first transistor T1 is amplified by the second transistor T2, and therefore the overall leakage current is not as high as the conventional Darlington circuit of Figure 1.

The circuit of Figure 6 has a higher current gain, lower output resistance and higher input resistance than a single stage emitter follower, but not as high an input impedance as a conventional Darlington circuit.

Referring to Figure 7, the NPN Sziklai circuit has base, emitter and collector nodes B, E, C, respectively. An NPN first transistor T1 has its base and emitter connected to the base and emitter nodes B, E, respectively, and its collector connected to the base of a PNP second transistor T2. The second transistor T2 has its emitter connected to the collector node C, and its collector connected via a series diode D2 to the emitter node. The diode D2 is oriented so as to conduct collector current from the second transistor T2. Another diode D1 is connected from the base to the emitter of the second transistor T2 and is oriented so that it can bypass part of the base current of the second transistor T2.

The response speed of the circuit of Figure 6 is higher than that of the conventional circuits because the diodes are providing proper biasing to the two transistors T1, T2.

It will be appreciated that complementary PNP versions of the circuits described above may be provided by using opposite polarity transistors T1, T2 and oppositely oriented diodes D1, D2.

The circuits described above may be constructed as integrated circuits.

In addition to the collector, emitter and base nodes of the circuits described above, the base of the second transistor and other electrode of the first transistor may be made externally accessible as node K, and the collector of the second transistor may be made externally accessible as node N.

Although a cascade of two transistors has been described in each of the above arrangements, it will be appreciated that more transistors may be added to the cascade.

Claims

1. A compound transistor circuit, comprising: first and second transistors arranged somewhat like a Darlington or Sziklai configuration; a first diode connected from to the base to the emitter of the second transistor and oriented to bypass a portion of the base current of the second transistor; and a second diode connected in series with the collector of the second transistor and oriented to pass the collector current of the second transistor.

2. A circuit as claimed in claim 1, and having collector, base and emitter nodes, the first and second transistors being arranged somewhat like a Darlington configuration with the base of the first transistor connected to the base node, the emitter of the first transistor connected to the first diode and to the base of the second transistor, the emitter node connected to the emitter of the second transistor and to the first diode, and the collector node connected to the collector of the first transistor and to the second diode.

3. A circuit as claimed in claim 1, and having collector, base and emitter nodes, the first and second transistors being arranged somewhat like a Sziklai configuration with the base of the first transistor connected to the base node, the collector of the first transistor connected to the first diode and to the base of the second transistor, the collector node connected to the emitter of the second transistor and to the first diode, and the emitter node connected to the emitter of the first transistor and to the second diode.

4. A circuit as claimed in any preceding claim, and in the form of an integrated circuit.

5. A circuit as claimed in any preceding claim, and having an accessible connection to the base of the second transistor.

6. A circuit as claimed in any preceding claim, and having an accessible connection to the collector of the second transistor.

7. A compound transistor circuit substantially as described with reference to the drawings.