JPS59125499A - Terminal calling system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field] The present invention relates to a telemeter system.
The present invention relates to a method for selectively calling a terminal device from a medium-sized medium in a telemeter system.

[Prior art]

In a telemeter system, a large number of terminal devices (station equipment) installed in remote locations are used, rather than central equipment (station own equipment).
Transmission 1d) All selectively called, and each terminal device sends data to the solid device 1d when called. There are various calling methods for this terminal device, but a typical one is to synchronously count the counters provided in each terminal device under control from the solid device side, and each terminal device uses the value of the internal counter. There is a method in which data is transmitted when the value matches a value unique to the device itself.

Is this a terminal device calling method using synchronous counting?
Conventionally, the clock pulse and reset pulse for synchronous count control are modulated (for example, frequency modulated) and transmitted to each terminal device through a common line, or each pulse is transmitted as a DC pulse through separate lines. The king has adopted one of these methods. However, in the former case, modulation circuits and demodulation circuits must be installed in the solid equipment and end-to-end equipment, respectively, and in a telemeter system that transmits data directly without modulating it, the solid equipment and terminal equipment become complicated. There is a problem of inviting On the other hand, the latter method not only increases the number of lines between the solid device and the terminal device, but also has the problem of being prone to malfunction due to pulse attenuation and noise mixing during transmission.

[Purpose of the invention]

The present invention has been developed in view of the above problems, and it is possible to reliably call the terminal equipment M from the solid equipment through the minimum number of lines. The purpose of this invention is to provide a new terminal device calling method that can simplify the internal circuitry of the device.

[Structure of the invention]

In the present invention, a control line common to all the terminal devices is provided between the solid device and the terminal device, and means for opening and closing the control line is provided in all the solid devices. In addition, in each terminal device, two terminals with different time constants are connected to the control line so as to discharge when the control line is closed, and a photovoltaic voltage is constantly applied.
The output voltage of each charging/discharging circuit is input, the counter is reset when the control line is closed for a first time, and a 20th
A counter control circuit is provided which causes a counter to count up or count down when a control line is closed for a certain amount of time. Then, on the solid equipment side, the control line is closed for a first time to reset the counter of each terminal device, and then the control line is intermittently closed for a second time, and the counter of each terminal device is reset. Let it go up or down (
Finally, the terminal devices are sequentially called and data is sent to the solid device 1d.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described with reference to all the drawings.

FIG. 1 shows the system configuration of a telemeter system according to the present invention. In the figure, 1 is a solid device, C\
There are four railway lines L1 to L11. 2 is a terminal device, which is connected to the solid device 1 via lines L1 to L11, respectively.
The connection is broken.

The configuration of the solid device 1 will be explained with reference to FIG.

In the figure, reference numerals 3 and 4 indicate DC power supplies, which are connected in series. The positive pole of the power supply 3 is always connected to the line L1, and the negative pole is always connected to the line L2. Line L5 is switch 5.6
The line L4 is connected to the positive electrode of the power source 3 or the negative electrode of the power source 4 through the resistor Tt-, and the line L4 is always connected to the negative electrode of the power source 4 via the resistor Tt-. 8 is a voltage reading circuit that reads the voltage across the resistor 7 (receiving 1A data);
is a control circuit that controls the switch 5.6 and the voltage reading circuit 8.

FIG. 3 is a circuit diagram of the terminal device 20. The terminal device 2 has the same configuration except for how to select the output terminal of the counter, which will be described later.

In FIG. 3, 11 is a voltage stabilizing circuit, which includes Darlington-connected transistors Q1 and Q2, and a line L1.
, L2, and a Zener diode Zfll. The connection point between Zener diode ZDI and resistor R1 is connected to the base of transistor q2. The voltage v1 of the power supply 3 in the solid equipment 1 is applied between the lines IJ1 and I'2, but the voltage between the lines L1% and IJZ at the connection position of each terminal device is the voltage drop due to the lines L1 and L2 on the way. The amount of voltage drop varies depending on the line length from the terminal device to the solid device and the line current value. Therefore, in this embodiment, the lines L1, L
The voltage between the two is input to the voltage stabilizing circuit 11151g, and it is busy trying to obtain a constant DC voltage at the output side of the circuit.

12.13t: i charging/discharging circuits, and as mentioned above, the time constants are different. The charging/discharging circuit 12 consists of a capacitor C1, resistors R2, R5, and diodes ``1'' and ``R2.'' The other charging/discharging circuit 13 consists of a foundation C2, resistors R11, R5, and diodes D5, Dll.Resistors R2, R11 capacitors C!1%02 and \Moni-1?, respectively, determine the constant time constant, and the output voltage of the voltage stabilizing circuit 11 is applied to the capacitor C!1% as a photovoltaic voltage via resistors R2 and R4. dl!, is applied.Resistors R3 and R5 together with capacitors c1 and C2 determine the discharge time constant. It is connected to the line L5.Diodes D2 and Dll are provided to prevent reverse current, and the diode Dl and R3 are connected to the capacitor C1.
, 02 is a counter control circuit 14, which is composed of two voltage detection circuits 15 and 16. These voltage detection circuits 15 and 16 detect whether the input voltage is above or below a predetermined threshold, and specifically, a well-known Schmitt trigger circuit or the like is used. The output voltage e1 of one charge/discharge circuit 12 is input to one voltage detection circuit 15, and the output voltage e2 of the other charge/discharge circuit 13 is input to the other voltage detection circuit 16. Each voltage detection circuit 15
．． The output voltages e3 and e4 of the counter 16 are supplied to the reset manual power R and the clock manual power aX of the counter 17, respectively. Note that the power supply voltage for the counter 17 and the voltage detection circuits 15 and 16 is supplied from the voltage stabilization circuit 11.

Reference numeral 18 denotes a voltage stabilizing circuit, which consists of Darlington-connected transistors Q5, Qjl, C5, C6, a Zener diode zD2, resistors R6, R2, and a capacitor C5. This voltage stabilizing circuit 18 operates only when the counter 1T counts up to a value (1) unique to the terminal device, and outputs a constant voltage between the output lines 1B and 20, which is a constant voltage between the lines L1 and I'2. ! /c Taiki. That is, when the output corresponding to the value (1) of the counter 17 is at the "L" level, the transistor Q4 is turned off, so the voltage stabilizing transistor Q5 is in the off state, but the value (1) of the counter 11 is While the output corresponding to K is at the "H" level, transistor QII is on, and Zener diode ZD2 and line #
6L2, transistors Q5 and C6
When the bias voltage is lost, the stabilized voltage is output to the output line 19.2.
Taiki vomits between 0 and 0. When a voltage is output between the output lines 19 and 20, the subsequent sensor circuit 21 operates.

The sensor circuit 21 detects strain with a bridge-type strain meter 23 (for example, a meridian strain meter), converts the strain value (transmission theta) into a current, and sends it to the solid device 1 46. . 22F
It is a ratio operational amplifier that drives the i-strain meter 23 with a constant current, and its operating voltage is given through the output lines 19 and 20. Strain meter 23
A first terminal of is connected to the stripe power of operational amplifier 22, and a second terminal opposite thereto is connected to the inverting input of operational amplifier 220 (-
) K is connected to the output line 20 through the resistor R1σ.
connected to. A constant voltage Li2 is applied to the non-inverting input (+) of the operational amplifier 22 from the battery 2T.

The operational amplifier 624.2s, the door Y resistor Q7, the Q8 diode D5, R6, and the resistor R11 are the third and fourth strain meters of the strain meter 23.
A current conversion circuit is configured to flow a current proportional to the potential difference between the terminals through a loop of lines L3 and R4. Operational amplifier 24
．． 25 operates using the voltage between the output lines 19 and 20 as the operating voltage, and the outputs are the transistors Q7 and C8, respectively.
The base of and the inverting input (-) are transistors Q7 and C8.
emitter, non-inverting input (the third and fourth of the strain meter
connected to the terminal. Transistor Q7, QB1F diode J)5, R6, and resistor R11 are connected in series with line L5, "11. Although detailed operation analysis will be omitted,
During the period when the voltage stabilizing circuit 18 is operating and voltage is applied between the lines L5 and R1I, the lines L5 and R1I are
4, a current with a value expressed by the following equation flows.

' / R1l Here, e is the output of the strain meter 23, that is, the potential difference between the third and fourth terminals.The operational amplifiers 24 and 25 have sufficiently large open gain and input impedance.

Here, charge/discharge circuit 12.13 and voltage detection circuit 15
．． 18 will be explained.

When the switch 6 in the "solid device" is opened, the capacitors 01 and C2 are charged, and the output voltages e1 and e2 of each charging/discharging circuit 12.13 are finally the applied charging voltage, i.e. The IB power voltage of the voltage stabilizing circuit 11 increases to (positive voltage). In that state, close the switch 6 and
When I5 loop is closed, condenser? 01.02, the discharge begins and the output voltages e1 and e2 gradually decrease. Since the power supply 4 is inserted into the loop of the lines 112 and L5 with a polarity that promotes discharge, the output voltages e1 and e2 drop beyond 0pol, but when they drop to the negative voltage that makes the diodes D1sD2 conductive, It will not descend further. When the switch 6 is fully closed, charging starts and the output voltages θ and e2 rise again.

When the output voltage ei,62 of the charge/discharge circuit 12.13 is equal to or higher than a predetermined threshold, the voltage detection circuit 15.16 maintains the output voltage e3,eIl'ftrH' level, but the output voltage ei,' 2 is the threshold) If it is low, the output voltage e5, eI
Keep I at rLJ level. The time T1, T2 required for the output voltages e1 and e2 to drop to the above threshold values after starting discharging from a fully charged state, and the time T1 and T2 required for the output voltages e1 and e2 to fall to the threshold values when starting charging from a completely discharged state. The time to rise T5.1 is T5>>Tq>>Tc
As in the relationship of completed T2, =nden'? Oi, 02, the values of the resistors R2 to R5, the threshold of the voltage detection circuit 15.16,
And the voltage of the power supply 4 is determined. Although it is not necessary to insert the power supply 4 into the discharge loop, if the power supply 4 is inserted and current is drawn, the voltage detection circuit 15.1
In addition to making it easier to set the threshold value of 6, the discharge curve approaches a straight line, so there are advantages such as the voltage detection circuit using the voltage detection circuits 15 and 16 becomes sharper.

Next, the overall operation of this embodiment will be explained with reference to the timing diagram of FIG.

The control circuit 9 of the solid device 10 closes the switch 6 with the switch 5 open (time 11) before starting the call assignment of each terminal device 2. This) Charging and discharging times 12.1
After 71 hours, the output voltage e5 of the voltage detection circuit 15 is inverted to the "L" level, and the counter 11 is reset. At time t2, when time Ta (Ta>Tl) has elapsed since time t1, control circuit 9 opens switch 6. Charging of the charging/discharging circuits 12 and 13 begins, and first, the output voltage e of the voltage detection circuit 16 is inverted to the rnJ level, and then the output voltage e5 of the voltage detection circuit 15 is inverted to the rHJ level. This completes resetting the counters 1T in all terminal devices 2.

The control circuit 9 starts from time t2 for Tb time (Tb>>T5
), the switch 6 is held open until a time t5' at which the charging/discharging circuit 12.14 is completely charged, and then the switch 6 is closed for a time Tc (TI>To>T2). Since the output voltage θ2 of the charge/discharge circuit 13 drops below the threshold of the voltage detection circuit 16 (because TO>T2), the output voltage e4 of the voltage detection circuit 16 is inverted to the rLJ level,
The counter 17 counts up by 1. Thereafter, the output voltage θ2 rises again, and when it exceeds the threshold value, the output voltage θpeng is inverted to the r34 level. On the other hand, since the output voltage e1 of the charge/discharge circuit 12 starts to rise again before falling to the threshold of the voltage detection circuit 15 (because Tl>TO), the output voltage θ of the voltage detection circuit 15 remains at rHJ level. be. The control circuit 9 keeps the switch 6 open for T (1 hour) from time tII to t5, and after fully charging the charging/discharging circuit 12.13e, the switch 6t is closed again for the time T. From this K, The counter 1T in each terminal device 2 counts up by 1. Similarly, by intermittently closing the Td time interval switch 6ffiTc time by time, the counter 17 is sequentially counted up and amplified.

In parallel with such count-up control, the control circuit 9 closes the switch 5 at fixed time intervals while the switch 6 is open, and instructs the voltage reading circuit 8 to read.

On the other hand, among the many terminal devices 2, in only one terminal device whose value of the internal counter IT matches the value unique to the device itself, the transistor Ql+ is turned on and the sensor circuit 21 is activated.
Data transmission 1d becomes possible. That is, that one terminal device is being called by the solid device 1 at that time. Then, when the switch 5 in the solid device 1 is closed,
A current having a value corresponding to the strain value (transmission 1t data) detected by the strain meter 23 is sent from the senna circuit 21 in the specific terminal device being called at that time to the loop of the lines L5 and I'll. . The electric current is converted into voltage by a resistor 7 in the solid device 1 and read by a voltage reading circuit 8.

〔Effect of the invention〕

As described in detail above, the present invention is capable of controlling the charging and discharging of each charging and discharging circuit by opening and closing the lines connected to the two charging and discharging circuits in each terminal device on the solid device side. This is a configuration in which a clock pulse (corresponding to the above-mentioned θ) and a reset pulse (corresponding to the above-mentioned 05) for synchronization counting are generated inside the terminal device. In other words, it is a configuration in which the clock and reset are controlled through a common line, and the number of lines for synchronous count control is reduced compared to a system in which the four-clock pulse and reset pulse are transmitted through separate lines from a solid device.
I can do that. In addition, in a system in which clock pulses and reset pulses are directly transmitted from a solid device, malfunctions are likely to occur due to attenuation of each pulse and noise contamination, but the present invention provides a charging/discharging circuit that is inherently less susceptible to noise. 1 to generate clock pulses and reset pulses within the terminal device based on i! #! There is no need to worry about operation.

Furthermore, since there is no need for a modulation circuit and a demodulation circuit as in the system that modulates and transmits clock pulses and reset pulses, the circuit configuration related to call control in the solid equipment and terminal equipment can be configured as in the above embodiment. It can be simplified.

[Brief explanation of the drawing]

Figures 1 to 4 are for the purpose of explaining an embodiment of the present invention. Figure 1 is a system configuration diagram of a telemeter system, Figure 2 is a circuit diagram of a solid device, and Figure 3 is a diagram of a system configuration of a telemeter system. is a circuit diagram of the terminal device, and FIG. 4 is a timing diagram for explaining the operation. DESCRIPTION OF SYMBOLS 1...Solid device, 2...Terminal device, 4...Power source for current attraction, 6...Switch for charge/discharge control,
12.13...-Charge/discharge circuit, 14... Counter control circuit, 15.16... Voltage stabilization circuit, vll
...-counter, 18... voltage stabilization circuit,
21...Sensor circuit, L□~L4, line, line. Figure 1 Itll + 1111 1 1111 1

Claims (3)

[Claims] (1) In a telemeter system that selectively calls multiple terminal devices from a solid device and sends data to the solid device, there is a line common to all terminal devices between each terminal device and the solid device. If a means for opening and closing the line is provided, a means for opening and closing the line is provided in all solid equipment, and in each terminal device, it is connected to the line so as to discharge when the line is closed, and a charging voltage is constantly applied. Input the output voltages of two different photodischarge circuits, a counter, and the two charging/discharging circuits, and b:
resetting the counter when the path is closed for a first time;
a counter control circuit that causes the counter to count up or to ground when the line is closed for a second time different from the first time; A terminal device calling method characterized in that after fc, the circuit is intermittently closed for the second time period. (2) Patent claim @ Disciple 1 characterized by C connecting a power source for current suction in series to the line connected to the charging/discharging circuit.
Terminal device calling method described in section. (3) The counter control circuit has a voltage control circuit τ1 which inverts the logic level of the output voltage depending on whether the output voltage of one photodischarge circuit is higher or lower than a predetermined threshold value, and a charge/discharge circuit of the other circuit. and a second voltage detection circuit that inverts the logic level of the output voltage depending on whether the output voltage of the circuit is higher or lower than a predetermined threshold, and a second voltage detection circuit that inverts the logic level of the output voltage depending on whether the output voltage of the circuit is higher or lower than a predetermined threshold. 2. The terminal number identification method according to claim 1, wherein the second voltage is supplied to the reset input of the counter, and the output voltage of the second voltage circuit is supplied to the clock input of the counter.