JPS5812140Y2 - level display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a level display device, and more particularly to a level display device having a signal peak level display function.

As an input signal level display device, for example, a fluorescent display tube or L
Digital display devices using ED display elements and the like are often used.

When adding a peak level display function to such a display device by pressing a button, there are methods such as providing a peak hold circuit or setting a longer recovery time for the display drive circuit, but it is possible to display and identify the low level following the peak level of the input signal. It is difficult to do so.

On the other hand, if the recovery time is shortened or the average level is displayed, it is difficult to determine the peak level of the signal, especially in the case of fluorescent display tubes, etc. due to their good response characteristics. .

SUMMARY OF THE INVENTION An object of the present invention is to provide a level display device that has a simple configuration, is capable of identifying signal level peaks, and is also capable of displaying and identifying low levels following the peak levels.

The front of the car will be explained below using drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, in which an input signal IN to be displayed is inputted to a peak hold circuit 2 through a buffer amplifier 1.

The peak hold circuit 2 includes a rectifying diode D1. Capacitive element C1 charged by the rectified output of the diode D1
, and the terminal voltage B of the capacitive element C1 becomes a peak hold output.

On the other hand, the output A of the buffer amplifier 1 has a rectifying diode D2 and a capacitive element C2 that is instantly charged by this rectified output, and the terminal voltage C of the capacitive element C2 corresponds to the peak of the human input signal. A voltage is generated.

A resistor R3 is connected to both ends of the capacitive element C2, and the charging voltage of the capacitive element is discharged with a time constant C29R3.
A peak detection circuit 3 is configured by the resistor R3 and the resistor R3.

A comparator 4 compares the output of the peak detection circuit 3, that is, the terminal voltage C of the capacitive element C2, and the voltage divided by the resistors R1 and R2 of the peak hold voltage B.

This output switching element is the transistor Q and the resistor R4.
The discharge circuit 5 is connected in series with the discharge circuit 5.

The discharge circuit 5 is connected in parallel with the capacitive element C1, so that by controlling the transistor Q on and off, the electric charge of the capacitive element CI is discharged to attenuate the peak hold voltage, thereby canceling the reset of the peak hold operation. .

This voltage B is used as an input signal to the driver circuit 6 to drive the fluorescent display tube 7.

Figure 2 shows the operating waveforms of each part (A, B, and C) that can be pressed in Figure 1, and the output A of the buffer amplifier 1 is
Assuming that the music signal is as shown in A, the terminal voltages B and C of the capacitive elements CI and C2 instantly rise to a predetermined voltage in response to the peak of the signal at time t1.

In this S, the discharge time constant Cx (Ri+Rz) determined by the voltage divider circuit resistors R1 and R2 is changed to the time constant C determined by the resistor R3.
It can be seen that by setting the voltage to be much higher than 2Ra, the voltage waveforms shown in FIG. 2B and C are obtained between time t1 and t2.

Here, one input terminal C of comparator 4 is the other input voltage (
When the voltage B) becomes lower than ×-11-1, R1+R2 When the button is pressed at time t2, and the output of the comparator 4 changes from low level to high level, the transistor Q transitions from off to on state, and the discharge circuit 5 is activated and the charge in the capacitor C1 is discharged.

Here, the comparator 4 controls the transistor Q on and off so that (B voltage) x 8□ + 8° = C voltage, so the B voltage, that is, the output type motor R1 + R2 of the level hold circuit 2 becomes C voltage x, Therefore, the discharge time constant of the capacitive element CI2 is determined by the time constant C2R3.

Therefore, between times t and -t2, the peak hold of the signal is displayed, and after time t2, the so-called recovery time of the hold section is accelerated so that a low level signal following the peak level can be displayed.

As detailed above, according to the present invention, it is possible to easily decipher the peak level of a signal with the simple i configuration, and also to identify low level signals after the peak level, making it difficult to set the recording level. Ideal for level display devices such as cassette decks.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a waveform diagram showing the operation of the circuit shown in FIG. Explanation of symbols of main parts, 2...Peak hold circuit,
3...Peak detection circuit, 4...Comparison circuit, 5...
Discharge circuit, 7... Display section, 1tC2... Capacitive element, R3, R4... Discharge resistor.

Claims (3)

[Scope of utility model registration request] (1) A peak hold circuit that holds the peak level of the human signal, a peak detection circuit that detects the peak level of the input signal, and a divided voltage of the detection output of the peak detection circuit and the output voltage of the peak hold circuit. a comparison circuit for comparison; a reset means for releasing the hold operation of the peak hold circuit in response to the output of the comparison circuit;
A level display device comprising: level display means driven to display by the output of the peak hold circuit. (2) The peak hold circuit includes a capacitive element charged by the input signal, and the reset means includes discharging means for discharging the charge of the capacitive element in response to the output of the comparing circuit. A level display device according to claim 1 of the utility model registration claim. (3) The discharging means comprises a series connection circuit of a switch element and a resistor which are on/off controlled by the output of the comparison circuit, and the series connection circuit is connected in parallel to the capacitance element of the peak hold circuit. A level display device according to claim 2 of the claimed utility model registration.