JPS59124780A - Manufacture of josephson integrated circuit - Google Patents

Abstract

PURPOSE:To prevent the disconnection of an electrode and a wiring by patterning a metallic thin-film constituting the circuit while using a film made of an etching-resisting material as a mask, forming a film made of a specific material on the thin-film and lifting off and patterning the film made of the specific material. CONSTITUTION:The superconducting metallic film 2 made of an element such as niobium is formed on a base 1, and a photo-resist film 3 is formed selectively on the film 2. The film 2 is etched while using the film 3 as a mask. The aluminum film 4 is formed through a method such as an evaporation method. The film 3 is dissolved through a dip in acetone and removed. Consequently, one part of the Al film 4 existing on the film 3 is lifted off, and the Al film 4 is patterned. The residual film 4 is all changed into an insulating film 4' consisting of porous Al2O3 through anodic oxidation. An anodic oxidation film is also formed on the film 2 at that time, but the thickness of the oxide film on the surface of Nb is limited to a fixed value because the oxidation of Nb is saturated though the oxidation of Al is proportioned to the time even at constant voltage. The superconductive metallic film 2 is formed to a shape buried into the insulating film 4' by previously selecting the thickness of the film 4 properly, and the surface of the film 2 is flattened.

Description

TECHNICAL FIELD OF THE INVENTION The present invention relates to (1) a method for manufacturing a Josephson integrated circuit, and more particularly, to a method for manufacturing a Josephson integrated circuit having multilayer wiring in which each layer is flat.

Prior art and problems For example, S QU T D (S supercondu
ctjngQuantum
CE Device) type Josephson integrated circuits must have a structure in which a pattern formed of a metal thin film and a pattern formed of an insulating thin film are superimposed in multiple layers.

In such a multilayer structure, each layer has unevenness, and due to the difference in level, the electrodes and wiring formed of the metal thin film are likely to be disconnected. When the thickness of the electrode/wiring is equal to or less than the level difference, the disconnection occurs at a considerably high rate.

Therefore, in order to sufficiently cover such steps, it is necessary to increase the film thickness, but the patterning accuracy decreases accordingly, making it impossible to form fine patterns and making it difficult to achieve high integration. It's becoming a bottleneck.

Purpose of the Invention The present invention enables electrodes and wiring made of a thin metal film to be embedded in an insulating (2) film so that unevenness does not occur on the surface even if a multilayer wiring structure is adopted. This is intended to prevent disconnection of electrodes and wiring.

Structure of the Invention The present invention provides a structure in which, when a metal thin film is patterned using an appropriate etching-resistant mask, the structure consisting of this etching-resistant mask and the remaining metal thin film is suitable for passing through the so-called lift-off method. For example, by forming a film using a material selected from aluminum, tantalum, or silicon using a vapor deposition method, and then performing lift-off and patterning, the remaining aluminum, tantalum, or silicon may be used. The film of the material is oxidized using a technique such as anodic oxidation to convert it into an insulating film, and the residual metal thin film is embedded in the insulating film to obtain a structure with a flat surface. It is something.

Embodiment of the Invention Figures 1 to 6 are cross-sectional side views of essential parts of a Josephson integrated circuit at important process points for explaining an embodiment of the present invention (3). Describe with reference to figures.

Refer to Figure 1 ■ Easily attach the base 1. Various types of base 1 can be used, such as a silicon semiconductor substrate on which a thermal oxide film is formed, a ground plane formed on such a silicon semiconductor substrate, and a sapphire substrate. .

See Figure 2■ For example, by applying the active sputtering method,
A superconducting metal film 2 made of, for example, niobium (Nb) is formed to a thickness of, for example, about 1,500 (people).

(2) A photoresist film 3 is selectively formed using a photolithography technique using normal ultraviolet exposure. As the photoresist, AZI350J (Azoplate Sibley, Inc. [USA]) can be used.

See Figure 3 ■ Superconductivity using the photoresist film 3 as a mask (4) Etching the metal film 2 using an appropriate technique such as chemical etching, plasma etching, or reactive ion beam etching. do.

Refer to FIG. 4. For example, an aluminum film 4 is formed to a thickness of about 1000 C by, for example, a vapor deposition method.

(2) Immerse in acetone to melt and remove the photoresist film 3. Due to this, photoresist Mlt!
3 Since a part of the /l film 4 that was present in J2 is lifted off, the A/ film 4 is patterned.

Refer to Fig. 5 ■ Anodic oxidation is performed using an electrolyte that is corrosive to aluminum oxide (Aj! 203), and the remaining aluminum film 4 is completely transformed into porous AI! Insulating film 4 consisting of 203
Convert to ′. At this time, an anodic oxide film is also formed on the superconducting metal film 2-H, which is Nb, but AI! While the oxidation of Nb proceeds in proportion to time even at a constant voltage, the oxidation of Nb reaches saturation, so the oxidation thickness of the Nb surface (Table 5) remains at a constant value. If, Nb
If it is not desirable for an oxide film to grow on the surface, anodic oxidation may be performed before removing the photoresist film 3. Generally, it is useful to leave the oxide film formed on the Nb surface as it can prevent short circuits with the upper layer.

After this step, by appropriately selecting the thickness of the Aβ film 4, the superconducting metal film 2 becomes embedded in the insulating film 4', and its surface becomes flat.

See FIG. 6 (2) Thereafter, an insulating film 5 is formed as required to prepare for the formation of multilayer wiring. The insulating film 5 may be a SiO insulating film formed by a vapor deposition method, a 5ho2 insulating film formed by a spuck method or a chemical vapor deposition method, a Si 3 N 4 insulating film, a phosphosilicate glass (PSG) film, or a phosphorus silicate glass (PSG) film, or a phosphorus silicate glass (PSG) film. A7 formed by law! A film obtained by anodizing the film and converting it into a /1203 film can be used.

Effects of the Invention When forming multilayer wiring in a Josephson integrated circuit (6), the present invention involves patterning a thin metal film constituting the circuit using a film of an etching-resistant material as a mask, and then patterning a layer of aluminum, tantalum, or silicon on top of the thin metal film that constitutes the circuit. By forming a film of the selected material and then removing the film used as the mask, patterning is performed by removing the film of aluminum, etc., and oxidizing the remaining film of aluminum, etc., to form aluminum. The completed product has a structure in which a patterned metal thin film is embedded in an insulating film, and its surface is flat.

Therefore, the upper layer wiring formed on it is also flat and there is no risk of disconnection, so there is no need to increase the thickness of the film to cover the steps as in the past, and as a result, microfabrication is easy. This is effective in improving the level of construction.

[Brief explanation of the drawing]

1 to 6 are cross-sectional side views of essential parts of a Josephson integrated circuit at key points in the process for explaining one embodiment of the present invention. (7) In the figure, 1 is a base, 2 is a superconducting metal film, 3 is a photoresist film, 4 is a /l film, 4' is an insulating film made of AA203, and 5 is an insulating film. Patent Applicant Fujitsu Co., Ltd. Representative Patent Attorney 9 Mushi Kugobe (3 others) (8) Figure 1 Figure 2 Figure 3 Figure 38 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] A thin metal film is formed on the base to form the circuit, and then
A film of an etching-resistant material forming a circuit pattern is formed on the metal thin film, and then, using the film as a mask, the gold B
A thin film is buttered, and then a film of a material selected from aluminum, tantalum, or silicon is formed on the entire surface, and then a film of the etching-resistant material is formed on the film of a material selected from aluminum, tantalum, or silicon. the remaining coating of material selected from aluminum, tantalum, or silicon; Method.