JPS59122284A - Deflecting device - Google Patents
Deflecting deviceInfo
- Publication number
- JPS59122284A JPS59122284A JP23115082A JP23115082A JPS59122284A JP S59122284 A JPS59122284 A JP S59122284A JP 23115082 A JP23115082 A JP 23115082A JP 23115082 A JP23115082 A JP 23115082A JP S59122284 A JPS59122284 A JP S59122284A
- Authority
- JP
- Japan
- Prior art keywords
- coils
- supplied
- amount
- deflecting
- deflection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Details Of Television Scanning (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はカラーテレビ受像機のカラー陰Wia管に適用
される偏向装置に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a deflection device applied to a color shadow Wia tube of a color television receiver.
背景技術とその問題点
一般にカラーテレビジョン受像機に於いては電気回路は
IC化、LSI化されつつあるが、偏向系は偏向装置に
高耐圧、大電流を必要とする為ハイパワートランジスタ
を使用することとなりIC化、LSI化は困難であった
。Background technology and its problems In general, electric circuits in color television receivers are becoming integrated circuits and LSIs, but the deflection system uses high-power transistors because the deflection device requires high withstand voltage and large current. Therefore, it was difficult to convert it into an IC or LSI.
発明の目的
本発明は斯る点に鑑み偏向系をIC化、LSI化できる
様にした偏向装置を提供することを目的とする。OBJECTS OF THE INVENTION In view of the above, an object of the present invention is to provide a deflection device in which the deflection system can be integrated into an IC or an LSI.
発明の概要
本発明は偏向コイルを多分割コイルで構成し、この各多
分割コイルをその位置に応じて偏向量とミスコンバージ
ェンス補正量、ビンクッション歪補正量等とを記憶した
デジタルメモリの出方信号にて駆動する様にし、偏向系
の電気回路をIC化、LSI化できる様にしたものであ
る。Summary of the Invention The present invention comprises a deflection coil made up of multi-divided coils, and a digital memory that stores the deflection amount, misconvergence correction amount, bin cushion distortion correction amount, etc. for each multi-divided coil according to its position. It is designed to be driven by a signal, and the electric circuit of the deflection system can be integrated into an IC or LSI.
実施例
以下図面を参照しながら本発明偏向装置の一実施例につ
き説明しよう。Embodiment Hereinafter, one embodiment of the deflection device of the present invention will be described with reference to the drawings.
第1図忙於いて、(11はカラー陰極線管を示し、(2
)はこのカラー陰極線管fi+のネック部に配された偏
向コイルを示す。In Figure 1, (11 shows a color cathode ray tube, (2
) indicates a deflection coil arranged at the neck of this color cathode ray tube fi+.
本例に於いては、上下一対で且つ左右対称なコ4 /’
(2Ha)(2Hb)(2Hc)及び(2Hd)より
成る水平偏向コイル(2H)を夫k ノi イル(2H
a) (2Hb) (2I−1c)及び(2Hd )を
多分割例えば全く同じ巻線数の9分割のコイルLl、L
2・・・L9により構成する。In this example, there is a pair of upper and lower and symmetrical 4/'
A horizontal deflection coil (2H) consisting of (2Ha) (2Hb) (2Hc) and (2Hd) is
a) (2Hb) (2I-1c) and (2Hd) are multi-divided, for example, 9-divided coils Ll and L with exactly the same number of windings.
2...Constructed by L9.
以下このコイ/’ (2Ha ) (2Hb ) (2
Hc)及ヒ(2Hd)ノ駆動回路につき第3図を参照し
て説明するにコイル(2Hb ) (2Hc )及び(
2Hdンの夫々の構成はコイル(2Ha)の構成と同様
であるので、以下コイル(2Ha)のみKついて説明す
る。Below this carp/' (2Ha) (2Hb) (2
The drive circuit for coils (2Hb) and (2Hd) will be explained with reference to FIG.
Since the configuration of each of the 2Hdn is similar to the configuration of the coil (2Ha), only the coil (2Ha) will be described below.
第3図に於いて’1 + M2・・・M9は夫々コイル
L11L2・・・L9に対応して設けられたデジタルメ
モリを示し、このデジタルメモリM1.M2・・・・M
9は水平期間THのサンプリング数例えば「8」とした
ときは夫々8個の単位フレームメモリ5ItS2・・・
S8より構成し、夫々の単位フレームメモリS1.S2
・・・S8には第4図に示す如きフレーム信号を記憶す
る如くなす。この1フレ一ム信号は例えば16ピツトで
構成し、初めの1ビツトは水平用であるか垂直用である
かの判別信号とし、次の3ビツトを供給すべきコイルの
コイル番号信号とし、次の3ビツトを偏向量信号とし、
次の3ビツトをミスコンバージェンス補正量信号とし、
次の3ビツトをビンクッション歪補正量信号とし、゛最
後の3ビツトをその他の補正量信号とする。この場合、
この9つのコイルL1.L2・・・L9のカラー陰極線
管(1)のネック部の中心を通る水平面より成す角度θ
を夫々θ工、θ2・・・θ9としたとき偏向量信号のア
ナログ量としての電流値Inは
I、:= IoΣ(kn) 1” (21、−1)θ(
i=1.2 ・ ・・)
で近似でき、ある時点に於けるコイルL1.L2・・・
・L9の電流工及び巻数Nの積(アレベアターン)との
角度分布は第5図に示す如くそのコイルL1 r ”2
・・・L9の配された位置により決定される。又ミスコ
ンバージェンス補正量及びビンクッション歪補正量も同
様にこのコイルL1 * ”2・・・L9の配された位
置により決定される。更に夫々の偏向量、ミスコンバー
ジェンス補正量及びビンクッション歪補正量は1水千期
間THK於けるサンプリング時点により異なることは勿
論である。又必要に応じその他の補正量をも記憶する。In FIG. 3, '1 + M2...M9 indicate digital memories provided corresponding to the coils L11L2...L9, respectively, and these digital memories M1. M2...M
9 is the sampling number of the horizontal period TH, for example, when it is "8", 8 unit frame memories 5ItS2...
S8, each unit frame memory S1. S2
. . . A frame signal as shown in FIG. 4 is stored in S8. This one frame signal is composed of, for example, 16 pits, the first bit is used as a signal to determine whether it is for horizontal use or vertical use, the next 3 bits are used as a coil number signal for the coil to be supplied, and the next The 3 bits are the deflection amount signal,
The next 3 bits are the misconvergence correction amount signal,
The next 3 bits are used as the bottle cushion distortion correction amount signal, and the last 3 bits are used as other correction amount signals. in this case,
These nine coils L1. Angle θ formed by the horizontal plane passing through the center of the neck of the color cathode ray tube (1) of L2...L9
When θ is θ, θ2...θ9, the current value In as an analog quantity of the deflection amount signal is I, := IoΣ(kn) 1" (21, -1) θ(
i=1.2 . . ) can be approximated by the coil L1. L2...
・The angular distribution of the electric current of L9 and the product of the number of turns N (arevea turn) is as shown in Fig. 5.
...Determined by the position of L9. Also, the amount of misconvergence correction and the amount of bottle cushion distortion correction are similarly determined by the position where the coils L1 * "2...L9 are arranged. Furthermore, the amount of deflection, the amount of misconvergence correction, and the amount of bottle cushion distortion correction are determined respectively. It goes without saying that the value differs depending on the sampling time in the THK period.Other correction amounts are also stored as necessary.
このデジタルメモリMl、M2・・・M9の夫々の単位
フレームメモリ51g52・−・S8の夫々の記憶信号
を演算機能を有するプロセッサ(3)で読み出し得る如
くなす。又カラーテレビジョン受像機の同期分離回路(
4)よりの同期信号をこのプロセッサ(3)に供給する
と共にこの同期信号をクロツタ信号発生回路(5)に供
給し、このクロック信号発生回# (5)よりのクロッ
ク信号をプロセッサ(3)K供給する。このプロセッサ
(3)に於いては水平同期信号に同期し、9個のデジタ
ルメモリM1.M2・・・鳩の単位フレームメモリを同
時にクロック信号に従って所定時間間隔毎にS1→S2
→S3→s4→s5→S6→S7→S8→S1・・・と
水平期間周期で繰返し読み出す如くなす。このデジタル
メモリM1 +楠・・・M9より読み出された1フレー
ムの信号は夫々デコーダ(61)(62)・・・・′I
(,69)に供給される如くなす。このデコーダ(61
)、(6z)・・・(69)の出力信号をマトリックス
回路(71)(72)・・・(79) K供給される。The signals stored in the unit frame memories 51g52, . . ., S8 of the digital memories M1, M2, . Also, the synchronization separation circuit of color television receivers (
4) is supplied to this processor (3), this synchronizing signal is supplied to the clock signal generation circuit (5), and the clock signal from this clock signal generation circuit # (5) is supplied to the processor (3) K. supply This processor (3) is synchronized with the horizontal synchronization signal and has nine digital memories M1. M2... Pigeon's unit frame memory is simultaneously changed from S1 to S2 at predetermined time intervals according to the clock signal.
→ S3 → s4 → s5 → S6 → S7 → S8 → S1, etc. are read out repeatedly in the horizontal period cycle. The signals of one frame read from this digital memory M1 + Kusunoki...M9 are sent to decoders (61) (62)...'I
(,69). This decoder (61
), (6z)...(69) are supplied to matrix circuits (71)(72)...(79)K.
このマトリックス回路(71)(72)・・・(79)
に於いては水平偏向の対称分をfH(t)、非対称分を
gH(t)及び左右のピンクッション歪補正分をpv(
t)としたときにデジタル処理により
M(t) =NIoΣ(kn) 1ona (21−1
,)σ・fH(t) ’gH(t) % (。This matrix circuit (71) (72)...(79)
In this case, the symmetric horizontal deflection is fH(t), the asymmetrical component is gH(t), and the left and right pincushion distortion correction is pv(
t), M(t) = NIoΣ(kn) 1ona (21-1
, ) σ・fH(t) 'gH(t) % (.
がなされ、この水平偏向量ミスコンバージェンス補正量
、ビンクッション歪補正量の全てが含まれた信号M(t
)をデジタル信号をアナログ信号に変換するD−A変換
回路(81)(82)・・・(89) K供給し、この
D−4変換回路(81)(82)・・・(89)の出力
側に得られる偏向電流を夫々駆動回路(91)(92)
・・・(99)を介してコイルL1 + ”2・・・L
9に夫々供給する。この場合偏向電流を供給する偏向コ
イルは多数例えば9×4=36に分割されているので駆
動回路(91)(92)・・・(99)の夫々の電流は
極めて小さく、この駆動回路をIC化、 LSI化が可
能である。is performed, and a signal M(t
) is supplied to the D-A conversion circuit (81) (82)...(89) K for converting the digital signal to an analog signal, and the D-4 conversion circuit (81) (82)...(89) Drive circuits (91) (92) respectively drive the deflection current obtained on the output side.
...(99) to coil L1 + "2...L
9 respectively. In this case, since the deflection coils that supply the deflection current are divided into a large number of parts, for example, 9×4=36, the current in each of the drive circuits (91), (92), ... (99) is extremely small, and this drive circuit is It is possible to convert it into an LSI.
斯る第3図に於いては水平同期信号圧同期し、デジタル
メモリMl、M2・・・M9の単位フレームメモリS1
.S2・・・S8を頴次読み出し、デジタルメモIJ
Ml 、 M2・・・M9に記憶した内容に応じた水平
偏向電流をコイルL1.L2・・・L9に供給している
ので、水平偏向を行うことができろ。この場合ミスコン
バージェンス補正、ビンクッション歪補正等も予め記憶
した内容により同時に行うことができる。In FIG. 3, the unit frame memory S1 of the digital memories M1, M2...M9 is synchronized with the horizontal synchronizing signal pressure.
.. Read S2...S8, digital memo IJ
The horizontal deflection current corresponding to the contents stored in Ml, M2...M9 is applied to the coil L1. Since it is supplied to L2...L9, horizontal deflection can be performed. In this case, misconvergence correction, bin cushion distortion correction, etc. can also be performed at the same time based on pre-stored contents.
以上述べた如く上述実施例に依れば予めデジタルメモリ
に記憶した内容により水平偏向ができるのでデジタル的
に水平偏向ができる。又この場合水平偏向コイルを多分
割例えば36個に分割しているので1つ1つの駆動電流
は極めて小さくできこの偏向装置の電気回路をIC化、
LSI化することができる。As described above, according to the above embodiment, horizontal deflection can be performed based on the contents stored in advance in the digital memory, so that horizontal deflection can be performed digitally. In this case, since the horizontal deflection coil is divided into multiple sections, for example, 36, the drive current for each one can be extremely small, and the electric circuit of this deflection device can be integrated into an IC.
It can be made into LSI.
尚上述実施例に於いては水平偏向装置に本発明を適用し
た例につき述べたが1.同様にして垂直偏向装置にも適
用できることは勿論である。又本発明は上述実施例処限
らず本発明の要旨を逸脱することなくその他種々の構成
が取り得ることは勿論である。In the above embodiment, the present invention was applied to a horizontal deflection device, but 1. Of course, the present invention can also be applied to vertical deflection devices in the same way. Moreover, it goes without saying that the present invention is not limited to the above-described embodiments, and can take various other configurations without departing from the gist of the present invention.
発明の効果
本発明に依れば偏向系を、IC化、LSI化できると共
にデジタル的に駆動できる偏向装置を得ることができへ
る。Effects of the Invention According to the present invention, a deflection system can be integrated into an IC or an LSI, and a deflection device that can be driven digitally can be obtained.
第1図、第4図及び第5図は夫々本発明の説明に供する
線図、第2図は本発#J偏向装置の一実施例の要部を示
す断面図、第3図は本発明偏向装臂の一実施例を示す構
成図である。
(1)はカラー陰極線管、(2H)は水平偏向コイル、
(3)はプロセッサ、(81)、(8z)・・・(89
)は夫々D−A変換回路、(91)、(92)・・・(
99)は駆動回路、Ll、 L2・・・L9は夫々コイ
ル、Ml 、 M2・・・M9は夫々デジタルメモリ、
511S2・・・S8は夫々単位フレームメモリである
。1, 4, and 5 are diagrams for explaining the present invention, FIG. 2 is a sectional view showing a main part of an embodiment of the #J deflection device of the present invention, and FIG. 3 is a diagram of the present invention. FIG. 2 is a configuration diagram showing an example of a deflection arm; (1) is a color cathode ray tube, (2H) is a horizontal deflection coil,
(3) is a processor, (81), (8z)...(89
) are D-A conversion circuits, (91), (92)...(
99) is a drive circuit, Ll, L2...L9 are each a coil, Ml, M2...M9 are each a digital memory,
511S2...S8 are unit frame memories, respectively.
Claims (1)
をその位置に応じて偏向量とミスコンバージェンス補正
量、ビンクッション歪補正量等とを記憶したデジタルメ
モリの出力信号にて駆動する様忙したことを特徴とする
偏向装置。The deflection coil is composed of multi-divided coils, and each multi-divided coil is driven by an output signal from a digital memory that stores the deflection amount, misconvergence correction amount, bin cushion distortion correction amount, etc. according to its position. A deflection device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57231150A JPH0752917B2 (en) | 1982-12-28 | 1982-12-28 | Deflection device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57231150A JPH0752917B2 (en) | 1982-12-28 | 1982-12-28 | Deflection device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59122284A true JPS59122284A (en) | 1984-07-14 |
JPH0752917B2 JPH0752917B2 (en) | 1995-06-05 |
Family
ID=16919073
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57231150A Expired - Lifetime JPH0752917B2 (en) | 1982-12-28 | 1982-12-28 | Deflection device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0752917B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0539926A2 (en) * | 1991-10-31 | 1993-05-05 | Salcomp Oy | Method and circuit for generating the control voltages of the dynamic convergence in a color display tube |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57180286A (en) * | 1981-04-30 | 1982-11-06 | Hitachi Ltd | In-line color picture tube device |
-
1982
- 1982-12-28 JP JP57231150A patent/JPH0752917B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57180286A (en) * | 1981-04-30 | 1982-11-06 | Hitachi Ltd | In-line color picture tube device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0539926A2 (en) * | 1991-10-31 | 1993-05-05 | Salcomp Oy | Method and circuit for generating the control voltages of the dynamic convergence in a color display tube |
Also Published As
Publication number | Publication date |
---|---|
JPH0752917B2 (en) | 1995-06-05 |
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