JPS59121852A - Wafer dicing device - Google Patents
Wafer dicing deviceInfo
- Publication number
- JPS59121852A JPS59121852A JP57230610A JP23061082A JPS59121852A JP S59121852 A JPS59121852 A JP S59121852A JP 57230610 A JP57230610 A JP 57230610A JP 23061082 A JP23061082 A JP 23061082A JP S59121852 A JPS59121852 A JP S59121852A
- Authority
- JP
- Japan
- Prior art keywords
- tape
- blade
- wafer
- conductive
- cutting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Abstract
Description
【発明の詳細な説明】
イ、産業上の利用分野
本発明は半導体装置の製造工程において半２８体ウェー
ハを各ペレットに切断してチップ化するダイシング装置
の切削旨さ制御に利用される口、従来技術
半う≠−（体装什の製造工程において、半導体ウェーハ
に形成されている枚数の半導体素子をチップ化して各ペ
レットに分離する工程は、チップ化された多数のペレッ
トが飛散したりすることのないように、予め半４ＬＪ一
体ウエーハの裏面に粘着テープを貼シ付けた後、半導体
ウェーハのみを切削することによシ行われる。DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a spout used for controlling the cutting quality of a dicing machine that cuts half-28 wafers into pellets to form chips in the manufacturing process of semiconductor devices. Conventional technology (In the manufacturing process of body parts, the process of cutting the number of semiconductor elements formed on a semiconductor wafer into chips and separating them into pellets causes a large number of chipped pellets to scatter. To avoid this, adhesive tape is attached to the back surface of the half-4LJ integrated wafer in advance, and then only the semiconductor wafer is cut.
このような半導体ウェーハのペレノタイズ工程は、従来
幅１図０、ｈ４’ １図（ｂ）、第１図ＣＣ）、ム３１
図（ｄ）に示す工程を経て行われる。即ち、％ １図（
ａ）の工程においてウェーハ（１）は枯艙テープ（２）
の構部（３）に貼り付けた後、第１図（ｂ）の工程に２
いてダイシング又はスクライビングによりウェーハ［１
）を各ペレット毎に一定の深さくｄ）まで切削する。ぞ
して、第１図（Ｃ）の工程において切削されたウェーハ
［１）を粘Ｘｉテープに貼着されたままで裏返してゴム
等の弾性材（４）に載置し、テープ（２）上をローツー
（６）で押し付けれはウェーハｆ１）はローラー（５）
で押し付けられた部分に剪断応力が作用するため、切削
部（１）・・・には裂は目が入ることになる。従って、
このような第１図（Ｃ）のブレ−キングの工程の後、第
１図（ｄ）の工程においてテープ（２）を引き伸ばせば
、ウェーハ（りは多数のチップに引き熱され、多数のベ
レッ） ’６１ ＋６１・・・が出来る。尚この時、ベ
レッ） ＋６１ ｊ６１・・・はテープ（２）上に貼り
イづけられたままでおる。Conventionally, such a pelletizing process for semiconductor wafers has a width of 1 (Fig.
This is carried out through the steps shown in Figure (d). That is, % 1 figure (
In step a), the wafer (1) is attached to the drying tape (2).
After pasting it on the structural part (3) of the
The wafer [1
) is cut to a certain depth d) for each pellet. Then, the wafer [1] that was cut in the process of FIG. The wafer f1) is pressed with the roller (6) and the roller (5)
Since shearing stress acts on the pressed portion, cracks will form in the cut portion (1). Therefore,
After the breaking step shown in FIG. 1(C), when the tape (2) is stretched in the step shown in FIG. 1(d), the wafer (ri) is heated into many chips, Beret) '61 +61... can be done. At this time, +61 j61... remains stuck on the tape (2).
このような半導体ウェーハ（１１のペレッタイズ工程に
おいて第１図（ｂ）のダイシング又はスクライビングの
工程時に、半導体ウェーハ（１１を各チップに切断して
おけば、第１図（０）のブレーキングの工程を経ること
なく、直接、第１図（ｄ）の引き伸ばし工程に移ること
ができるので、工程数を削減する効果が得られる。If the semiconductor wafer (11) is cut into chips during the dicing or scribing process shown in FIG. 1(b) in the pelletizing process of the semiconductor wafer (11), the breaking process shown in FIG. Since it is possible to proceed directly to the stretching process shown in FIG. 1(d) without going through the process, the effect of reducing the number of processes can be obtained.
ところが、第１図（ｂ）の工程において切削の深さくｄ
）をウェーハ（りの厚さに合わせることによシウエーハ
（りを各チップに切断する場合、ウェーハ川の平行度の
反シやテープ（２）の厚さのバラツキなどのため、切断
時にウェーハｆｉ＋の切シ残しの部分が出来たシ、テー
プ（２）まで切ってしまい引き伸ばしが困難となる場合
が生じる。従って、第１図（ｄ）の引き伸ばし工程での
テープ（２）の破れ、ペレット＋６１ ＋６１・・・の
飛散や、ペレット重なシ等の位置決め不良の原因となる
。However, in the process shown in Fig. 1(b), the cutting depth d
) to match the thickness of the wafer (When cutting the wafer into each chip, the wafer fi + In some cases, the uncut portion of the tape (2) is cut, making it difficult to stretch the tape (2).Therefore, the tape (2) is torn during the stretching process shown in Figure 1(d), and the pellet +61 This may cause scattering of particles such as +61... or poor positioning such as overlapping pellets.
ハ、発明の目的
本発明の目的は半導体ウェーハのペレッタイズ工程にお
いてウェーハを貼シ付けているテープを切ることなく、
又ウェーハの切シ残しがないようＫ、ウェーハを切断す
るブレードの高さを制御できるようにしたものである。C. Purpose of the Invention The purpose of the present invention is to eliminate the need to cut the tape attaching the wafer in the pelletizing process of semiconductor wafers.
In addition, the height of the blade for cutting the wafer can be controlled so that no wafer is left uncut.
二、発明の構成
本発明に係るウェーハダイシング装置はウェーハ貼付用
の導電性粘着テープと、ウェーハを貼り付けた前記粘着
テープを載せるステージと、ウェーハを所定の厚さに切
断してこれをチップ化するブレードと、前記導電性粘着
テープとブレード間の導通を検出する導通検出部と、ウ
ェーハを貼り付けた前記粘着テープを切らないように前
記導通検出部からの信号によシ前記ブレードの高さを制
御する機構とから成る。2. Structure of the Invention The wafer dicing apparatus according to the present invention includes a conductive adhesive tape for pasting the wafer, a stage on which the adhesive tape with the wafer pasted is mounted, and a wafer that is cut into a predetermined thickness and made into chips. a conductive blade that detects conduction between the conductive adhesive tape and the blade; and a conductivity detector that detects conductivity between the conductive adhesive tape and the blade, and a height of the blade that is determined by the signal from the conductivity detector so as not to cut the adhesive tape to which the wafer is attached. It consists of a mechanism that controls the
ホ、実施例
本発明に係るウェーハダイシング装置の基本実施例の概
略的構成を第２図に示す。即ち、第２図においてウェー
ハ（１）は導電性粘着テープ（７）の横部（８）に貼り
付けられており、導電性粘着テープ（７）はステージ（
９）上に載せられている。そして、ブレード（１０）が
ウェーハ［１）を切断してチップ化するが、第２図に示
す実施例においてブレード（１０）は次のようにしてウ
ェーハ（１１を切断していく。即ち、粘着テープ（７）
はテープ本体に導電性物質が混入されており、導電性を
有するが、ステージ（９）も導体にした場合、ブレード
（１０）が粘着テープ（７）のテープ本体に触れた時、
ブレード（ｌＯ）とステージ（９）の間が導通状態にな
り、この導通状態が導通検出部（川によって検出される
。そして、ブレードｆｉｏ＋はウェーハ（１１を切断す
るために下降して行くが、導通状態が検出部（１すによ
って検出されない限り下降して行き、導通状態が検出部
（ｌすによって検出された時、それ以上下降しない機構
を有する。つまシ、ブレード（ｌＯ）はウェーハｆｉｌ
を切削しながら下降して行くが、ウェーハ（１）を切断
し、粘着テープ（７）の横部（８）も切断して、粘着テ
ープ（７）の導電性のテープ本体に達した時、ブレード
（１０Ｊとステージ（９）の間の導通状態が導通検出部
（ｌりによって検出され、ブレード（１０）はそれ以上
下降しない。従ってブレード（１ｏ）の切削する部分は
第８図に示すようにウェーハｆｔｌと横部（８）だけと
なシ粘着テープ（７）のテープ本体に大きな切＃）傷が
入らず、粘個テープ（７）の引き伸ばし工程時に問題と
ならない。そして、ブレード（ｉｏ）は下降すると共に
ウェーハ（１）に平行に一定方向に遍みながらウェーハ
（１１を切削して行くが、この時、ブレード＋１０１は
導通状態になると共に下降から上昇の動きに移行し、又
、非導通状態になると共に再び下降する上下動機構−を
ブレード（１０）に設けた場合、ブレード（ｌＯ）は粘
着テープ（７）の導電性テープ本体の表面の歪みに応じ
て上下に動くため、ブレード叫がウェーハ（１）に平行
に進みながら、前記テープ本体の表面の凸部歪みに太き
く食い込むことを防ぐことができる。E. Embodiment FIG. 2 shows a schematic configuration of a basic embodiment of a wafer dicing apparatus according to the present invention. That is, in FIG. 2, the wafer (1) is attached to the side part (8) of the conductive adhesive tape (7), and the conductive adhesive tape (7) is attached to the stage (
9) It is placed on top. Then, the blade (10) cuts the wafer [1] into chips. In the embodiment shown in FIG. 2, the blade (10) cuts the wafer (11) as follows. Tape (7)
The tape body is mixed with a conductive substance and has conductivity, but if the stage (9) is also made of a conductor, when the blade (10) touches the tape body of the adhesive tape (7),
A conductive state is established between the blade (lO) and the stage (9), and this conductive state is detected by the conductive detector (river).Then, the blade fio+ descends to cut the wafer (11). It has a mechanism in which the conduction state decreases unless detected by the detection section (1), and when the conduction state is detected by the detection section (1), it does not descend any further.
As it descends while cutting the wafer (1), it also cuts the lateral part (8) of the adhesive tape (7), and when it reaches the conductive tape body of the adhesive tape (7), The conduction state between the blade (10J and the stage (9) is detected by the conduction detection section (l), and the blade (10) does not descend any further. Therefore, the cutting part of the blade (1o) is as shown in Fig. 8. When only the wafer ftl and the side part (8) are connected, there are no large cuts in the tape body of the adhesive tape (7), and there are no problems during the stretching process of the adhesive tape (7). ) descends and cuts the wafer (11) while turning in a certain direction parallel to the wafer (1). At this time, the blade +101 becomes conductive and shifts from a downward movement to an upward movement, and If the blade (10) is provided with a vertical movement mechanism that lowers again when it becomes non-conductive, the blade (lO) moves up and down according to the distortion of the surface of the conductive tape body of the adhesive tape (7). It is possible to prevent the blade vibration from deeply digging into the convex distortion on the surface of the tape body while traveling parallel to the wafer (1).
更に、ブレード＋１０１は横部（８）内で上下動するよ
うに横部（８）を厚目にしておけば、前記テープ本体の
表面が不規則に歪んでいても粘着テープ（７）のテープ
本体を大きく傷つけることなくブレード（ｌＯ）はウェ
ーハｆｌ）のみを完全に切断することが出来る。Furthermore, if the lateral part (8) is made thick so that the blade +101 can move up and down within the lateral part (8), even if the surface of the tape body is irregularly distorted, the tape of the adhesive tape (7) can be easily maintained. The blade (lO) can completely cut only the wafer fl) without seriously damaging the main body.
次に、本発明に係るウェーハダイシング装置の他の実施
例として第４図に示すように粘着テープ（７）の糖部（
８）に導電性の粘着剤を用いる実施例が考えられる。こ
の実施例の場合、糖部（８）と導体ステージ（９）とを
電気的に接続すれば粘着テープ（７）のテープ本体は通
常の絶縁性テープで良く、ブレード（１０）と糖部（８
）との間の導通状態を導通検出部（１１）によって検出
しながらブレード（ｌＯ）の高さを制御すれば良い。Next, as another embodiment of the wafer dicing apparatus according to the present invention, as shown in FIG.
An example of using a conductive adhesive for 8) can be considered. In the case of this embodiment, the tape body of the adhesive tape (7) can be an ordinary insulating tape as long as the sugar part (8) and the conductor stage (9) are electrically connected, and the blade (10) and the sugar part ( 8
) The height of the blade (lO) may be controlled while detecting the conduction state between the blade (lO) by the conduction detection section (11).
へ、発明の効果
本発明によれば半導体ウェーハのペレッタイズ工程にお
いて、半導体ウェーノ・をチップ化するブレードの高さ
制御を図ることによシ、ウェーハを貼シ伺けている粘着
テープの本体に大きな切り傷をつけることなく、ウェー
ノーを完全に切断できるようにしたから、半導体ウェー
ハのペレッタイズ工程におけるウェーノ）のブレーキン
グ工程が省かれ、工程数を削減することが出来る。そし
て、次工程のウェーハ貼シ付はテープの引き伸ばし工程
で、テープ破損の問題が起きないので、チップ化された
ペレットが飛散したシすることなく、又、ウェーハの切
シ残しによるペレット重なシや位置ずれ不良も生じないEffects of the Invention According to the present invention, in the pelletizing process of semiconductor wafers, by controlling the height of the blade that converts the semiconductor wafer into chips, the body of the adhesive tape used to attach the wafer can be made larger. Since the wafer can be completely cut without making any cuts, the wafer breaking process in the semiconductor wafer pelletizing process can be omitted and the number of processes can be reduced. The next process of attaching wafers is the tape stretching process, so there is no problem of tape damage, so there is no scattering of chipped pellets, and there is no overlap of pellets due to uncut edges on the wafer. No misalignment or misalignment will occur.
第１図（ａ）は半導体ウェーハのベレッタイズ工程にお
いてウェーハをテープに貼り付けた時の概略断面図で、
第１図（ｂ）はそのダイシング又はスクライビング工程
の概略断面図で、第１図（Ｃ）はそのブレーキング工程
の概略断面図で、第１図（ａ）はその引伸ばし工程の概
略断面図、第２図は本発明に係るウェーハダイシング装
置の一実施例の概略図、第３図は本発明に係るウェーハ
ダイシング装置によってチップ化されたウェーハの概略
図、第４図は本発明に係るウェーハダイシング装置の他
の実施例の概略図である。
（１）・・・半導体ウェーノー、 （７）・・・ウェ
ー７・貼り付はテープ、（８）・・・ウェーノ・貼シ付
はテープの糊Ｎ、 ！”）・・・ステージ、ｔｌｏｌ・
・・ブレード、（１す・・・導通検出部、 （ｌ訃・・
ブレードの高さ制御機構。Figure 1(a) is a schematic cross-sectional view of the wafer attached to the tape in the semiconductor wafer pelletizing process.
FIG. 1(b) is a schematic sectional view of the dicing or scribing process, FIG. 1(C) is a schematic sectional view of the breaking process, and FIG. 1(a) is a schematic sectional view of the stretching process. , FIG. 2 is a schematic diagram of an embodiment of a wafer dicing apparatus according to the present invention, FIG. 3 is a schematic diagram of a wafer diced by the wafer dicing apparatus according to the present invention, and FIG. 4 is a schematic diagram of a wafer according to the present invention. FIG. 3 is a schematic diagram of another embodiment of a dicing device. (1)...Semiconductor Waeno, (7)...Way 7, tape for attachment, (8)...Wayno, adhesive for tape, N, ! ”)...Stage, troll・
...Blade, (1...Continuity detection part, (l...
Blade height control mechanism.
Claims (1)
ーハを貼り付けた６σ記粘着テープを載せるステージと
、ウェーハを切断してチップ化するブレードと、前記粘
ノ４テープとブレード間の導通を検出する導通検出部と
、前記導通検出部からの信号により前記ブレードの高さ
を制御する機構とから成ることを特徴とするウェーハダ
イシング装置。conductive adhesive tape for attaching wafers, a stage on which the 6σ adhesive tape with the wafer attached is placed, a blade for cutting the wafer into chips, and a conductor for detecting conduction between the adhesive tape and the blade. A wafer dicing apparatus comprising: a detection section; and a mechanism that controls the height of the blade based on a signal from the continuity detection section.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57230610A JPS59121852A (en) | 1982-12-27 | 1982-12-27 | Wafer dicing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57230610A JPS59121852A (en) | 1982-12-27 | 1982-12-27 | Wafer dicing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59121852A true JPS59121852A (en) | 1984-07-14 |
Family
ID=16910452
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57230610A Pending JPS59121852A (en) | 1982-12-27 | 1982-12-27 | Wafer dicing device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59121852A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6558975B2 (en) * | 2000-08-31 | 2003-05-06 | Lintec Corporation | Process for producing semiconductor device |
| KR100414890B1 (en) * | 2001-05-10 | 2004-01-13 | 삼성전자주식회사 | Apparatus for cutting wafer |
| JP2010141150A (en) * | 2008-12-12 | 2010-06-24 | Fujitsu Microelectronics Ltd | Dicing processing method and dicing tape |
-
1982
- 1982-12-27 JP JP57230610A patent/JPS59121852A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6558975B2 (en) * | 2000-08-31 | 2003-05-06 | Lintec Corporation | Process for producing semiconductor device |
| KR100414890B1 (en) * | 2001-05-10 | 2004-01-13 | 삼성전자주식회사 | Apparatus for cutting wafer |
| JP2010141150A (en) * | 2008-12-12 | 2010-06-24 | Fujitsu Microelectronics Ltd | Dicing processing method and dicing tape |
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