JPS59119947A - Transmission system of partial response - Google Patents

Abstract

PURPOSE:To facilitate easy detection of a code error at the reception side and to attain an automatic correction of the code error, by inserting a frame pattern using a code which causes an error by the inversion of signal to an input signal at the transmission side. CONSTITUTION:The speed of an input signal is converted by a speed converting circuit 7 at the transmission. A frame pattern using a code which causes an error by the inversion of signal is inserted to the input signal by a frame pattern inserting circuit 8. This inserted pattern is transmitted via a partial response coder 1. At the reception side, the synchronism is obtained between two frame patterns, i.e., the outputs of a partial response decoder 6 by a frame synchronous circuit 9, to detect whether the frame pattern is inverted. If the frame pattern is inverted, the code error is corrected by an inversion correcting circuit 11. Then the frame pattern is deleted by a speed converting circuit 12 to obtain the original signal.

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a class IV partial response transmission system with 7 or more values, in which a modulator of a carrier end station device is inverted and a gradient sign error υ occurs. The present invention relates to a partial response transmission method that can automatically correct even the most severe cases.

(b) Prior Art and Problems FIG. 1 is a block diagram showing the circuit configuration of a conventional partial response transmission device, and (5) shows the transmitting side 031 on the receiving side.

In the figure, 1 is a partial response converter, 2 is a digital-to-analog converter (hereinafter referred to as a D/A converter), and 3.4
5 is an analog/digital converter, and 6 is a partial response filter.

For example, in a 7-value class IV partial response transmission system, the input code an and the transmission amplitude level have the following relationship.

On the transmitting side, corresponding to the value of the input code Rn shown in the table above,
The partial response encoder 1 and the D/A converter 2 use the LPF as an analog signal with the transmission amplitude level shown in the table above.
3 to the transmission path or carrier terminal equipment. At this time, even if the input code 8n is the same code, the past input code an
Yes, determine the transmission amplitude level. On the receiving side, the signal input from the transmission path or carrier path end station via LPF4 is
/D converter 5 and hyperscial response decoder 6,
If the transmission amplitude level is -, add 4 to find the value of Cn shown in the above table, find the output code a-n in the above table corresponding to this Cn value, decode it to input code an, and output it. are doing.

However, in the conventional circuit configuration shown in FIG.
Il! The transmission amplitude level changes from +3 to - by 180 degree reversal of the carriers of the modulator of the carrier terminal station and the carrier of the receiving carrier terminal station.
3, the level changes from +2 to -2, +1 to -1.

Therefore, on the receiving side, the data is erroneously received from 10 to 01 and from 01 to 10. Otsu-no-to, conventionally, the inversion is 1 - the width is 1
It is necessary to use a large number of carrier terminals, or to manually change the carrier of the detrainer of the carrier terminal station on the receiving side by 180 degrees.

In addition, existing transmission lines are used, and transmission lines may be changed due to failures, etc., and it is necessary to consider whether it is necessary to add an inverting amplifier each time. The carrier of the transformer demodulator may be reversed by 187 degrees when the power switch is turned on and off, and the phase of the carrier must be manually reversed each time, which is extremely troublesome with the conventional circuit configuration shown in Figure 1. There is a drawback that it takes

(C1 Object of the Invention In view of the above drawbacks, the object of the present invention is to provide a partial response transmission system that can automatically correct even if the received baseband signal is inverted and a code error p occurs.

(d) Structure of the Invention In order to achieve the above object, the present invention inserts into the input signal a frame pattern using a code that causes a code error due to signal inversion, and converts this signal into a partial response. The signal is input to the encoder, and on the receiving side, the partial response is output from the encoder to correct coding errors based on the frame pattern and the result of the frame pattern, remove the frame pattern, obtain the original input signal, and output it. It is characterized by

(el　Embodiments of the invention An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 is a block diagram showing the circuit configuration of the partial response transmission device according to the embodiment of the present invention, and (5) is on the transmitting side).
indicates the receiving side.

Components with the same functions as those in FIG. 711 are indicated by the same symbols. 7 and 12 are speed conversion circuits, 8 is a frame insertion circuit, 9
10 indicates a frame synchronization circuit, 10 indicates an inversion detection circuit, and 11 indicates an inversion correction circuit.

A frame pattern is inserted at the entrance path 8, and thereafter transmitted to the same material as in the case of FIG. If there is a signal inversion in this frame turn, it is possible to invert the input code afi.
The pattern included in For example, when a frame pattern is multi-valued, two bits, 01 and 10, are used, which correspond to 1" and 3" levels. An example of inserting this frame pattern is O Fo Fo F I FoF(,F
001XXXXXOIXXXXX10XXXXXOIX
XXXXOIXXxXXOIXX When the above signal is inverted, it becomes as follows.

FI FQ Fl,
pH0XXXXXXIOXXXXXOIXXXXXI
OXXXXXXIOXXXXXXIOXX On the receiving side, the above two frame patterns F are output from the partial response decoder 6. FoFI FOFp Fo, Ft
Ft Fo Ft Ft Ft is synchronized by the frame synchronization circuit 9, and the frame pattern is F. FoF
, FoFoF, there is no inversion in the transmission path, and the FI
In the case of FIFo FI Ft Fl, since there is an inversion in the transmission path, the inversion detection circuit 10 detects the inversion based on this,
In the inversion correction circuit 11, if there is no inversion, the input is output until that time, and if there is inversion, 10 becomes 01 and 01 becomes 1.
Correct it to 0 and 11°00 outputs that 11. Thereafter, the frame pattern is removed by speed conversion in the speed conversion circuit 12 to obtain the original signal.

(f) Effects of the Invention As explained in detail above, according to the present invention, even if the received baseband signal is inverted and a code error occurs, it can be automatically corrected, so that an effort-free partial response transmission method can be established. There is.

[Brief explanation of the drawing]

FIG. 1 is a block diagram illustrating the circuit configuration of a conventional partial response transmission device, and FIG. 2 shows the circuit configuration of the partial response transmission device of the first embodiment. It is a lock diagram. In the figure, 1 is a partial response encoder, 2 is a digital-to-analog converter, 3 and 4 are low-frequency p-wave converters, and 5 is an analog/analog converter.
a digital converter; 6 is a partial response decoder;
7.12 is a quick hair change circuit, 8 is a frame insertion circuit, 91
tma frame synchronization circuit, 10F! In the inversion detection circuit, 11 indicates an inversion ε positive circuit.

Claims (1)

[Claims] In a partial response transmission device of class ■ of 7 or more values, the transmitting side has means for inserting into the input signal a frame pattern using a code that causes a sign error υ due to signal inversion, and The inserted signal is input to a partial response encoder 2, and on the receiving side, the frame pattern and the code of the frame pattern are synchronized using the frame pattern and the synchronization is taken from the output of the partial response decoder. and means for detecting whether the frame pattern is inverted, means for correcting code errors based on the detection result, and means for removing and outputting the p frame pattern from the fC signal after the code errors have been corrected. Features a partial response transmission method.