JPS59119455A - Fault detecting system of microprocessor - Google Patents

Abstract

PURPOSE:To enable the detection of run-away of a program and the abnormality of an internal circuit without duplicating a microprocessor by performing a test of internal circuit of the microprocessor properly in a specified time. CONSTITUTION:The microprocessor 1 discontinues processing up to that time and reads the contents of a function register 3 by receiving an interruption signal from a monitoring timer 2 at the first specified time intervals. Then, the microprocessor reads the test data from a memory 4 according to the contents and performs processing. This processing data and surmised output data of the test data are collated and if they do not coincide, a reset signal is not sent out to the monitoring timer 2. When the second specified time is attained, it is reported as a fault of the processor 1. Thus, by performing the test of internal circuit properly in a specified time, run-away of the program and the abnormality of the internal circuit can be detected.

Description

Detailed Description of the Invention (a) Technical Field of the Invention The present invention relates to a fault detection method for a microprocessor that improves the ability to detect faults in a microprocessor by appropriately operating the internal functions of the microprocessor. .

(b) Prior Art and Problems Conventionally, microprocessor fault detection methods include a method in which microprocessors are duplicated and a fault is detected when the data on both do not match.

Under the promise of using a monitoring timer and issuing a command to reset the monitoring timer within a certain period of time, if that command is not issued, the program that issues the command is judged to be running abnormally, and is considered to be a failure. There is a method to consider it. The former has the advantage that the functions of the microprocessor and processor are constantly checked, but it requires the provision of dual microprocessors, an external circuit for checking the consistency of processed data, and an additional need for external control. It has the disadvantage that it cannot detect runaway programs due to abnormalities in flip-flops, etc.
The latter has the disadvantage that even though the program has finished running, it is unclear whether the function (for example, an addition function) to be executed within the program is good or not, and abnormalities in the internal circuit cannot be detected.

(C) Purpose of the Invention The purpose of the present invention is to eliminate the above-mentioned drawbacks by appropriately testing the internal circuit of the microprocessor sensor within a certain period of time.
It is an object of the present invention to provide a microprocessor failure detection method capable of detecting both program runaway and internal circuit failure without duplication of microprocessors.

(d) Structure of the Invention The structure of the present invention provides a microprocessor, a memory for storing a program running on the microprocessor, a monitoring timer for one-hour monitoring, and an internal circuit operation command for microprocessor diagnosis. a function register, prepares data corresponding to the contents of the function register in the memory, causes the microprocessor to read the contents of the function register by an interrupt of the monitoring timer, and prepares data in the memory according to the contents. This system is designed to detect microprocessor failures by processing and comparing the collected data.

(e) Embodiments of the Invention The present invention includes a function register that gives random internal circuit operation commands to a microprocessor.

Input data and expected output data corresponding to the contents of the function register are stored in a specific area on the memory, and the internal circuits of the microprocessor are tested in a sample manner at regular time intervals.

The figure is a professional diagram of a circuit showing one embodiment of the present invention. The microprocessor 1, funxidine register 3, and memory 4 are interconnected by a bus 5. The microprocessor 1 receives and receives interrupt signals from the monitoring timer 2 at first predetermined time intervals.

The microprocessor 1 that has accepted the interrupt interrupts the previous processing, reads the contents of the function register 3, and according to the contents reads the TES(-) data from the memory 4 and processes it.The test data is the input data. Since there is expected output data, the microprocessor 1 processes the input data and compares it with the expected output data.If the comparison results match, the microprocessor 1 determines that the processing was performed normally. If the comparison results do not match, the reset signal is sent to the monitoring timer 2 and the self-diagnosis is ended. microprocessor 1
reported as a failure.

The contents set in funxidine register 3.

By appropriately selecting the test data to be stored in the memory 4 in accordance with this, it is possible to select the range in which the microprocessor 1 can be checked.

It is also conceivable to provide the function register 3 inside the memory 4. In this case the functionality is the same as above, but
Memory 4 instead of function register 3
area is required accordingly.

(f) Detailed Description of the Invention 1. The present invention is capable of preventing program runaway in a system using a microprocessor by appropriately testing the internal circuit of a microprocessor within a certain period of time without duplicating the microprocessor. , it is possible to easily detect abnormalities in the internal circuits, so the effect is great.

[Brief explanation of drawings]

The figure is a block diagram of a circuit showing one embodiment of the present invention. 2 is a microprocessor, 2 is a monitoring timer, 3 is a function register, and 4 is a memory.

Claims (1)

[Scope of Claim] A micro 10 processor and a memory for storing a program running on the microprocessor. It is equipped with a supervisory timer for time monitoring and a function register that gives internal circuit operation commands for microprocessor diagnosis, and data corresponding to the contents of the function register is prepared in the memory, and when the supervisory timer interrupts, the microprocessor read the contents of the function register. A fault detection method for a microprocessor, characterized in that a fault in the microprocessor is detected by processing and collating data prepared in the memory according to the content.