JPS59119395A - Compression system of voice information - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a compression method of speech information in a speech synthesis device. - [Prior art and its problems] As a speech synthesis method, the PARCOR synthesis method has been generally used. In this PARCOR synthesis method, kiJ? Due to the sensitivity of the parameters, the quantization is distributed non-uniformly as shown in FIG. As a result, k
l is 7 bits, k2 is 6 bits, and other parameters,
~k.

Allocating more bits. In this case, the parameters for ■ (voiced sound) and UV (unvoiced sound) are set to the same value. Due to the nature of the k parameter, k frequently takes a value close to "1", and k! tends to take a value close to "-1". Or, as the order of the parameter increases, the oscillation between "-1" and "1" increases,
The information contained in the k parameter itself decreases.

However, if a large number of bits are assigned to the parameters 1 and 2 as in the conventional method, the amount of information increases, the memory capacity increases, and there are also problems during transmission.

[Purpose of the invention]

The present invention has been made in view of the above points, and provides an audio information compression method that can compress the amount of audio information by reducing the constituent bits of the k parameter, and can obtain the same quality as the conventional method. The purpose is to

[Key points of the invention]

The present invention relates to a speech synthesis device for voiced sounds. k,
By differentially quantizing the low-order parameters of 1 or 1, and linearly quantizing the high-order parameters of voiced sounds and the noise parameters of unvoiced sounds, the pits that make up the k parameter are reduced and the audio information is compressed. This is what I did.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. Second
The figure shows an example of the bit configuration of parameters used in the present invention.

Figure 2(a) shows an example of the bit configuration of parameters for voiced sound V, where 1 for Δ, 2 for Δ, 2 for k3,
is 5 bits, and k6 to 8 are 4 bits. In this case, the lower order parameter Δkl.

Δ is subjected to differential nonlinear quantization, and 1 is reduced by 2 bits and k, 1-i1 bits compared to the conventional method. Parameters 3 to 3 are linearly quantized and have the same pit configuration as the conventional one. Figure 2(b) shows the configuration of parameters for unvoiced sound UV, where k1~ is 5.
Bits k6 to 8 are 4 bits. The numbers 1 to 8 in the above parameter are linearly quantized, and 1 is reduced by 2 bits, k is reduced by 1 bit, and k3 to 8 are linearly quantized.
has the same bit configuration as before.

FIG. 3 shows a circuit configuration in which 1 is calculated for the parameter Δ for the voiced sound V that has been differentially quantized as described above, and 2 is calculated for the linearly quantized parameter kl# from 2 for Δ. In FIG. 3, reference numeral 11 denotes a signal line to which parameters read out from a kij parameter storage section of a speech synthesizer using the PARCOR method are sent, and the parameters are input to a demultiplexer 12. This demultiplexer 12 has output lines 13a and 13b.
and selects output lines 13a and 13b according to a switching signal input to control terminal CI. The control terminal (, I) of the demultiplexer 120 receives a timing signal Tk1 sent from a control section (not shown).

The output of the OR circuit 14 of Tk2 and the timing signal TV are inputted via the AND circuit 15.

As shown in FIG.
), Δ are outputted at the timing when (k2) is given, and the timing signal Tv is outputted at the timing when the frame becomes the voiced sound ■. However, the demultiplexer 12
selects the output line 13a when the control signal is 0'', and selects the output line 13b when the control signal becomes 1''. And the output line J of the demultiplexer 12, ? The parameters output from Jl are read into the free lag flop 16 in synchronization with the clock pulse φ2 shown in FIG.
The signal is sent to multiplexer 17. Further, the l(/-9 rammeter (5 bits)) output from the output line 13b of the demultiplexer 12 is input to the ROM 1g. Also, the timing signal Tk2 is input to the ROM 1B. 1 for the parameter Δ, for Δ,
When the timing signal Tk is not given, the parameter Δ is decoded to 1, and when the timing signal Tk is given, the meter Δ is decoded. And the above R
The output of OM1B is input to the input terminal of adder/subtractor 19. The output of this adder/subtractor 19 is sent to a demultiplexer 20.
is input to. This demultiplexer 2Q switches between the output lines 21a and 21b according to the timing signal Tk2 inputted to the control terminal CI, and normally selects the output line 21a, and when the timing signal Tk is inputted, selects the output line 21b. do. The signal output from the output line 21a of the demultiplexer 20 is latched by the latch circuit 22a in synchronization with the clock pulse CK1, and the signal output from the output line 21b is latched by the latch circuit 22b in synchronization with the clock pulse CK2. Ru.

In the latch circuits 22m and 22b, the basic clock parameters kl (7 bits) and kt (a bit) are initially set, and the clock pulse CK 1 #
CK2 is the voiced sound parameter Δ as shown in FIG.
1. This is a signal that is generated in synchronization with the glock pulse φ2 at the timing when Δ2 is sent through the signal line 11. And the latch circuit 22a
, 22b is sent to the multiplexer 23. This multiplexer 23 switches the input according to the timing signal Tk2 inputted to the control terminal CI, and normally selects the signal from the latch circuit 22a, and when the timing signal Tk is applied, the signal from the latch circuit 22a is selected.
Select the signal from b. The output of the multiplexer 23 is input to the input terminal a of the adder/subtractor 19, and is also input to the flip-flop 2 in synchronization with the clock signal φ2.
4. The output of this flip 70 tube 24 is
The signal is input to multiplexer 17. This multiplexer 17 switches the input by the tritub flop 25 input to the control terminal CI.When the control signal is 0'', the signal from the tritub flop 16 is selected, and when the control signal is '1'', the flip flop 25 selects the input. Select 24 outputs.

The signal parameters output from the multiplexer 17 range from 1 to 8, and are sent to a speech synthesis section (not shown). Further, the flip-flop 25 reads the output of the AND circuit 15 in synchronization with the clock signal φ2, and controls the operation of the multiplexer 17.

Next, the operation of the circuit shown in FIG. 3 will be explained. When the parameter read out from the parameter storage section to the signal line 11 is an unvoiced UVO frame, the timing signal TV is 0'' and the dart of the AND circuit 15 is closed.

Therefore, the output of the AND circuit 15 is θ'' and the demultiplexer 12 selects the output line 13a side. The parameters of the unvoiced sound UV shown in FIG.
The signal is read into the switch 16 and input to the multiplexer 17. On the other hand, as described above, when the output of the AND circuit 15 is 0'', this 0'' signal is read into the tree block flop 25 in synchronization with the clocks φ and φ. Therefore, the output of the flip 7a knob 25 becomes 0'', and the multiplexer 17
Switch to the 7 lip-flop 16 side. Therefore, the parameters sent to the multiplexer 17 via the demultiplexer 16 are output as they are from the multiplexer 17 and sent to the speech synthesis section. That is, if the parameter read from the parameter storage section is an unvoiced UVO frame, it is sent to the speech synthesis section with the bit configuration shown in FIG. 2(b).

When the parameters for the voiced sound (2) are read out from the parameter storage section, the timing signal Tv shown in FIG. 4 is applied to the AND circuit 15. At the timing when 2 is input to the demultiplexer 12 for the parameter Δ, the timing signal Tk1 shown in FIG. 4 is input to the AND circuit 15 via the OR circuit 14, so the output of the AND circuit 15 becomes 1''. Become.

Therefore, the demultiplexer 12 selects the output line 13b side. Therefore, if the parameter Δ input to the demultiplexer 12 is 1 (5 pits), the output line 13b
The signal is sent to the ROM 18 via the ROM 18, decoded, and input to the input terminal of the adder/subtractor 190. At this time, adder/subtractor 19
1 is input to the input terminal a of the latch circuit 22a through the multiplexer 23, that is, 1 is input to the parameter currently being used. Therefore, the adder/subtractor 19 calculates rki+ΔksJ, that is, adds □ to the currently used parameter and the difference value Δ, and the addition result is used as the new parameter kl (7
The clock pulse CK is sent to the latch circuit 22a via the demultiplexer 20 as a clock pulse CK.

latched in synchronization with The parameter 1 held in the latch circuit 22a is taken out via the multiplexer 23 and written into the flip 70 tube 24 in synchronization with the clock pulse φ2. On the other hand, the AND circuit 15
The 6E'' signal output from the 6E'' signal is written into the flip-flop 25 in synchronization with the clock pulse φ2.

As a result, the output of the flip-flop 25 becomes 61", and the multiplexer 17 is switched to the flip-flop 24 side. Therefore, 1 is outputted to the parameter held in the flip-flop 24 via the multiplexer 17,
It is sent to the speech synthesis section.

Then, 1 is read out from the parameter Δ and 2 is read out from Δ and inputted to the demultiplexer 12. When the timing signal Tk2 is inputted to the AND circuit 15 via the OR circuit 14. As a result, the AND circuit 15 continues to output "
1' signal is output. Therefore, the above demultiplexer 1
2 is the output line 13b for the parameter Δ input to 2.
More ROMf! ? sent to. At this time, since the timing signal Tk2 is given to ROM1B, ROM1B
B decodes the meter Δ for 2 and inputs it to the input terminal of the adder/subtractor 19. At this time, since the multiplexer 23 is switched to the latch circuit 22 b side by the timing signal Tk, the multiplexer 23 is switched to the latch circuit 22 b side.
2 for the parameter held in b, that is, 2 for the currently used parameter, is input to the input terminal a of the adder/subtractor 19 via the multiplexer 23. Therefore,
The adder/subtractor 19 performs an operation of 2 to rkt+Δ, that is, 2 is added to the currently used parameter and the difference value Δ, and the addition result is sent to the new parameter as 2 (6 bits) via the demultiplexer 20. latch circuit 2
2b and is latched in synchronization with clock pulse CK2. The parameters latched by this latch circuit 22b! is taken out via the multiplexer 23 and written to the flip-flop 24 in synchronization with the clock pulse φ. At this time, the flip-flop 25 is loaded in synchronization with the 1'' signal output from the AND circuit 15, and the multiplexer 17 is switched to the 7-lip flip-flop 24 side.
2 (6
bit) is selected by the multiplexer 17 and sent to the speech synthesis section.

Thereafter, at the timing when parameters 3 to 6 are sent to the demultiplexer 12 following the parameter Δ 2, the timing signals T kl and T k become 0'', so the output of the AND circuit 15 becomes 60". Therefore, the demultiplexer 12 is switched to the output line 13a side, and the signals 6 to 6 are sequentially read into the flip-flop 16 in synchronization with the reverse pulse φ2, and the output from the multiplexer 1
Sent to 7. Also, as mentioned above, when the output of the AND circuit 15 becomes 0", this '0" signal becomes the clock pulse φ
! The data is read into the flip-flop 25 in synchronization with , and the multiplexer 17 is switched to the flip-flop 16 side.

Therefore, the parameters read into the 7-lip frog 16 as described above are sent to the speech synthesis section via the 5-order multiplexer 17.

As mentioned above, in the voiced frame, Δkl.

Only the parameters Δ and 2 are converted into parameters 1 (7 bits), k, and (6 bits) by calculation, and the other parameters 3 to 6 are sent as they are to the speech synthesis section.

Note that in the above embodiment, in the voiced frame,
Although differential quantization was performed for the parameter −kt, differential quantization may be performed only for kl.

Further, the present invention is not limited to the PARC'OR speech synthesis method, but can also be implemented in other speech synthesis methods.

〔Effect of the invention〕

As described above, according to the present invention, 1 and 2 in the k parameter are quantized with 5 bits each, so kl can be reduced by 2 bits and k2 by 1 bit, thereby compressing the amount of audio information. be able to. In this case, ni1, ni, in the unvoiced sound are r-IJ, rl
Since the distribution is not biased toward j, but rather centered around "0", and the sensitivity is high, the influence of 5-bit quantization is small. Also, ni 1, k in voiced sounds.

is differentially quantized to Δkl, and K is set to calculate 1 to the original value during speech synthesis, so even if Δ is set to 1 and Δ is set to 2 using 5 bits, it will not work. There is no effect, and the same level of quality as before can be obtained.

[Brief Description of the Drawings] Fig. 1 is a diagram showing the bit configuration of parameters in the PARCOR speech synthesis method, Figs. 2 to 4 show one implementation of the present invention, and Fig. 2 (a) 2(b) is a diagram showing the bit configuration of the parameter for voiced sounds, FIG. 2(b) is a diagram showing the bit configuration of the /4' parameter for unvoiced sounds, FIG. 3 is a circuit diagram, and FIG. 4 is the operation of FIG. 3. This is a timing chart to explain. 1 No... Signal line, 12, 20°/° demultiplexer, 16, 24.25... Prig 70 tube, 17
．． 23...Multiplexer, 18...ROM. 19...Adder/subtractor, 22m, 22b...Latch circuit. Figure 1 Figure 2

Claims (1)

[Claims] Speech information characterized in that, in a speech synthesis device, when quantizing k parameters, low-order parameters for voiced sounds are differentially quantized, and high-order parameters for voiced sounds and parameters for unvoiced sounds are linearly quantized as they are. compression method.