JPS59117848A - Fm modulator - Google Patents

Fm modulator

Info

Publication number
JPS59117848A
JPS59117848A JP57230452A JP23045282A JPS59117848A JP S59117848 A JPS59117848 A JP S59117848A JP 57230452 A JP57230452 A JP 57230452A JP 23045282 A JP23045282 A JP 23045282A JP S59117848 A JPS59117848 A JP S59117848A
Authority
JP
Japan
Prior art keywords
output
low
input signal
signal
voltage controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57230452A
Other languages
Japanese (ja)
Other versions
JPS6366106B2 (en
Inventor
Gozo Kage
鹿毛 豪蔵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57230452A priority Critical patent/JPS59117848A/en
Publication of JPS59117848A publication Critical patent/JPS59117848A/en
Publication of JPS6366106B2 publication Critical patent/JPS6366106B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0975Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/0941Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation at more than one point in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03CMODULATION
    • H03C3/00Angle modulation
    • H03C3/02Details
    • H03C3/09Modifications of modulator for regulating the mean frequency
    • H03C3/0908Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/095Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To apply sufficiently modulation even to the low frequency component of an input signal by using an input signal and a signal component passing the input signal through an LPF, and applying again modulation to a voltage controlled oscillator. CONSTITUTION:The phase of an output of a variable frequency divider 2 selecting an output frequency of the voltage controlled oscillator 1 is compared 3 with a reference frequency fO in phase and the compared output is outputted to a synthesis circuit 8. The circuit 8 synthesizes the compared output with a signal integrating a modulating input signal vin at an integration circuit 7, and the synthesized output is inputted to a synthesis circuit 5 via an LPF4. The circuit 5 synthesizes the signal vin with an output of the LPF4, controls the oscillator 1 so as to apply the FM modulation by the PLL system. Since the signal vin and a low frequency signal component obtained by passing the signal vin through the LPF4 apply modulation to the oscillator 1, the modulating characteristic is not deteriorated to the low frequency component of the signal vin.

Description

【発明の詳細な説明】 イズロックルーフ0)を利用したFM変調器に関する。[Detailed description of the invention] This invention relates to an FM modulator that utilizes an islock roof.

一般に, PLL方式を用いてFM変調器を構成した場
合に,電圧制御発振器の入力側にベースバンド信号を加
える従来の方式においては,ベースバンド信号の低周波
成分の伝送特性が悪くなるという欠点があった。そのた
めに2例えば、ベースバンド信号としてNRZ信号を伝
送する場合には、符号量干渉の原因となり、信号伝送に
おける誤り率の劣化を招いていた。
Generally, when an FM modulator is configured using the PLL method, the conventional method of adding a baseband signal to the input side of the voltage controlled oscillator has the disadvantage that the transmission characteristics of the low frequency components of the baseband signal deteriorate. there were. For this reason, for example, when transmitting an NRZ signal as a baseband signal, this causes interference in the amount of code, leading to a deterioration of the error rate in signal transmission.

この種、FM変調器の従来例を第1図のブロックを参照
して説明すると、1は電圧制御発振器。
A conventional example of this type of FM modulator will be explained with reference to the blocks in FIG. 1. 1 is a voltage controlled oscillator.

2は指定された分周比a I  Ha 27・・・、a
kに従って分周される周波数を変えることのできる可変
分周器、6は基準の周波数f。で発振する発振器、3は
基準の周波数foに対して1分周器2の出力X2の位相
差を電圧に変換する位相比較器である。
2 is the specified frequency division ratio a I Ha 27..., a
A variable frequency divider that can change the divided frequency according to k; 6 is a reference frequency f; 3 is a phase comparator that converts the phase difference between the output X2 of the frequency divider 2 and the reference frequency fo into a voltage.

また、4は低域通過フィルタであり、この出力X4と入
カベースパント信号マ、とが5の加算金n 成回路に加えられて、 PLLによる変調器が構成され
ている。この例に、【れば、入力vinがハイレベルに
なったときに、電圧制御発振器1の出力foutがfo
ut ” fc+Δf(Δf〉0)になったと仮定する
と2位相比較器5は発振出力f。utを下げる電圧X3
=で −Δτを出力する。ここで9位相と周波数の関係
により、Δυ=αfΔfdtなる関係がある。
Further, 4 is a low-pass filter, and this output X4 and the input base punt signal are added to the addition circuit 5 to form a PLL modulator. In this example, when the input vin becomes high level, the output fout of the voltage controlled oscillator 1 becomes fout
ut ” fc+Δf (Δf〉0), the two-phase comparator 5 outputs an oscillation output f.The voltage X3 that lowers ut
= outputs −Δτ. Here, due to the relationship between phase and frequency, there is a relationship of Δυ=αfΔfdt.

αは位相から電圧へ変換するだめの定数である。α is a constant for converting from phase to voltage.

そこで、長時間vioにハイレベルが続いたときに。So, when the high level of vio continues for a long time.

位相比較器3の出力X3はf。utを下げる電圧を出力
し続けるため、低域通過フィルタ4においては。
The output X3 of the phase comparator 3 is f. In the low pass filter 4, in order to continue outputting a voltage that lowers ut.

この電圧を除去することが出来ず、出力X4のなかに通
過させてしまう。そして、遂には出力foutは中心周
波数fcに引き戻されてしまう。これは、入力υ、nに
ロウレベルが続いた場合にも同様であり、υ1nの低周
波成分による変調はかかシ難い。
This voltage cannot be removed and is passed into output X4. Then, the output fout is finally pulled back to the center frequency fc. This is the same even when the inputs υ and n continue to be at a low level, and modulation by the low frequency component of υ1n is difficult to avoid.

この現象は、低域通過フィルタ4のカットオフを下げて
、入力υ、の信号成分のために生じた位n 相比絞出力Δτを通さないようにすれば、ある程度の改
善ができるが、 NRZ信号のパターンによっては、低
周波成分のエネルギーをかなシ含む場合もあるため、完
全に除くことは出来ない。さらに。
This phenomenon can be improved to some extent by lowering the cutoff of the low-pass filter 4 so as not to pass the phase ratio diaphragm output Δτ generated due to the signal component of the input υ, but NRZ Depending on the signal pattern, it may contain a small amount of low frequency component energy, so it cannot be completely eliminated. moreover.

低域通過フィルタのカットオフを下げることは。Lowering the cutoff of the low pass filter.

回路定数が大きくなるばかりでなく9次のような理由で
限界がある。すなわち2周波数チャ2ネルの切替制御を
必要とする無線系において、このタイツ0の変調器を使
った場合に、低域通過フィルタの力、トオフを下げると
PLLのロックインに時間がかかるため9周波数チャネ
ルを切り替えるときに、可変分周器の分周比を変えても
すぐに別チャネルへ移れないことになシ、無線回線設定
に大きな障害となる。さらに、電源投入時にPLLがロ
ックする。まで時間がかかるため、電源のON後、瞬時
にバースト信号を送出する必要のある信号伝送系には使
い難い。
Not only does the circuit constant become large, but there is a limit due to reasons such as the 9th order. In other words, in a wireless system that requires switching control between two frequency channels, when using a modulator with zero tightness, if the low-pass filter power and to-off are lowered, PLL lock-in will take longer. When switching frequency channels, even if the frequency division ratio of the variable frequency divider is changed, it is not possible to immediately switch to another channel, which poses a major obstacle in setting up a wireless line. Furthermore, the PLL locks when the power is turned on. Since it takes a long time to complete the process, it is difficult to use it in a signal transmission system that needs to send out a burst signal instantly after the power is turned on.

本発明の目的は、上記の従来技術による欠点を除去し、
入力信号のみでなく、入力信号を低域通過フィルタに通
した信号成分を用いて電圧制御発信器へ再変調をかける
ことによシ、入力信号の低周波成分に対しても十分に変
調をかけることのできるFM変調器を提供することにあ
る。
The object of the present invention is to eliminate the drawbacks of the prior art mentioned above,
Not only the input signal, but also the low frequency components of the input signal are sufficiently modulated by re-modulating the voltage controlled oscillator using the signal component of the input signal passed through a low-pass filter. The object of the present invention is to provide an FM modulator that can perform FM modulation.

本発明によれば、電圧制御発振器と、該電圧制御発信器
の出力周波数を選択的に分周する可変分周器と、該可変
分周器の出力を基準周波数に対して位相比較する位相比
較器とを有し、該位相比較器の出力を低域通過フィルタ
を介したのち2合成FM変調器において、前記合成手段
が、更に前記変調用の入力信号から別に抽出された低周
波成分を加えて合成し、該合成出力によって前記電圧制
御発振器を制御するようにしたことを特徴とするFM変
調器が得られる。
According to the present invention, there is provided a voltage controlled oscillator, a variable frequency divider that selectively divides the output frequency of the voltage controlled oscillator, and a phase comparison that compares the phase of the output of the variable frequency divider with respect to a reference frequency. The output of the phase comparator is passed through a low-pass filter, and then in a two-synthesis FM modulator, the synthesis means further adds a low frequency component separately extracted from the input signal for modulation. The FM modulator is characterized in that the voltage controlled oscillator is controlled by the combined output.

次に2本発明によるFM変調器について実施例を挙げ1
図面を参照して説明する。
Next, we will give two examples of FM modulators according to the present invention.
This will be explained with reference to the drawings.

第2図は本発明による第1の実施例をブロック図によシ
示したものである。この図において、符号1から6まで
はそれぞれ第1図の従来例に同じ記号によシ示すごとく
、それぞれ同じ機能を有するものと理解されたい。この
例においては、そのほかに、入力vinを積分する積分
回路7と、この積分回路7の出力をに倍(Kは定数)に
して合成する回路8とが付加されている。すなわち、入
力v1nに相当する周波数偏移Δfが発生して”out
=fc+Δfとなったときに位相比較器5からv3−v
c −Δτを出力すると1合成回路8の出力は。
FIG. 2 is a block diagram showing a first embodiment of the present invention. In this figure, numerals 1 to 6 should be understood to have the same functions, as shown by the same symbols as in the conventional example of FIG. In this example, an integrator circuit 7 that integrates the input vin and a circuit 8 that doubles the output of the integrator circuit 7 (K is a constant) and synthesizes it are added. In other words, a frequency deviation Δf corresponding to the input v1n occurs and "out
= fc + Δf, the phase comparator 5 outputs v3-v
When c - Δτ is output, the output of the 1-synthesizing circuit 8 is.

xB =x3 +K f ’U1ndt−υ。−Δv 
+K f v、ndt=vc−αfΔfdt+Kfυi
n dtとなる。ここで、Δfは入力τ、に対してほぼ
比例+n 関係にあるから、Kを適当に選べば。
xB =x3 +K f 'U1ndt-υ. −Δv
+K f v, ndt=vc−αfΔfdt+Kfυi
n dt. Here, since Δf is approximately proportional to the input τ, +n, K should be chosen appropriately.

−αfΔf d t+Kfl11ndt:0とおくこと
ができる。これにより、低域通過フィルタ4の出力には
、入力′D1nによって生じたΔfの影響はほとんど含
まれない。従って、入力υに一定状態が続いて、直流成
分を含むパターンか多く発生しても、低域通過フィルタ
4の出力にこの影響が残らないだめ、電圧制御発振器1
の出力の周波数f。utはf。へ引き戻されることかな
く。
−αfΔf d t+Kfl11ndt:0 can be set. As a result, the output of the low-pass filter 4 hardly contains the influence of Δf caused by the input 'D1n. Therefore, even if the input υ remains constant and many patterns containing DC components occur, the voltage controlled oscillator 1 must not have this effect on the output of the low-pass filter 4.
The frequency of the output of f. ut is f. without being drawn back to.

fc十Δf(7)まま、一定の発振を続けることかでき
る。結果として、入力V の低周波成分に対しても容易
に変調がかけられることになる。
It is possible to continue constant oscillation with fc+Δf(7). As a result, even the low frequency components of the input V can be easily modulated.

なお、上記の実施例においては2回路5として加算合成
回路を備え、これによって、入力a がハイレベルにな
” ” out=fc+Δfのときに2位相比較器3の
出力がX3−vc−Δυなる応答を行なうようにした。
In the above embodiment, an addition and synthesis circuit is provided as the two circuits 5, so that when the input a is at a high level and out=fc+Δf, the output of the two-phase comparator 3 becomes X3−vc−Δυ. I tried to respond.

他の方法として、加算合成回路5゜の代りに減算による
合成回路を用い”out二f。
Another method is to use a subtractive synthesis circuit instead of the addition synthesis circuit 5°.

十Δfのときに2位相比較器3についてX3−υ+Δυ
なる応答を示すものを使うようにすれば2合成回路8に
より−Kfυ1ndtを合成し、出力にX8−υ。十Δ
υ−K f?’1ndt−=vc+αfΔfdt−Kf
v1ndtを得ることにより同じ目的か達ぜられる。
X3−υ+Δυ for two-phase comparator 3 when 1Δf
If you use one that shows the response, -Kfυ1ndt is synthesized by the two-synthesizing circuit 8, and the output is X8-υ. ten Δ
υ−K f? '1ndt-=vc+αfΔfdt-Kf
The same objective can be achieved by obtaining v1ndt.

第3図は本発明による第2の実施例をブロック図により
示したものである。この図において、符号1〜4,6は
それぞれ第1の実施例の場合と同し記号により示すごと
く、それぞれ同じ機能を有する。この例においては、他
の要素として、9の3人力の加算合成回路、10の積分
回路および11の低域通過フィルタが用いられている。
FIG. 3 is a block diagram showing a second embodiment of the present invention. In this figure, numerals 1 to 4 and 6 have the same functions as in the first embodiment, as indicated by the same symbols. In this example, as other elements, 9 three-man power addition and synthesis circuits, 10 integration circuits, and 11 low-pass filters are used.

ここで、積分回路10は第1の実施例の積分回路7と同
じ性能のものを用い、低域通過フィルター1は低域通過
フィルタ4と同じ特性を有しかつ、伝達ノ 関数かに倍のものが用いられる。これによって。
Here, the integrator circuit 10 has the same performance as the integrator circuit 7 of the first embodiment, and the low-pass filter 1 has the same characteristics as the low-pass filter 4, and has a transfer function twice as large. things are used. by this.

入力υ1nが電圧制御発振器1の入力へ与える影響は第
2図における第1の実施例の場合と等価になり、同じ変
調特性が得られる。なお、この実施例において、積分回
路10と低域通過フィルタ4の接続順序を入れ替え、入
力υ を低域通過フィルn り4に加えたのち、積分回路10を通しても同じ特性の
ものが得られることは言う1でもない。
The influence of the input υ1n on the input of the voltage controlled oscillator 1 is equivalent to that of the first embodiment shown in FIG. 2, and the same modulation characteristics can be obtained. In addition, in this embodiment, the same characteristics can be obtained by changing the connection order of the integrating circuit 10 and the low-pass filter 4, adding the input υ to the low-pass filter 4, and then passing it through the integrating circuit 10. It's not even 1.

上記第1および第2の実施例においては、入力τ、nの
直流ドリフトがそのまま送信周波数のドリフトの原因に
なるが、このことは直流ドリフトを入力υ1nに比べて
十分小さな範囲に抑えておけば実用上問題がない。捷だ
、電圧制御発振器のみにより、その発振周波数の中心が
fcからf。+Δfcにずれても1位相比較器で比較検
出された出力がそのまま低域通過フィルタを通して電圧
制御発振器を制御するため、Δfに対する抑圧は十分に
かけられる。
In the first and second embodiments described above, the DC drift of the inputs τ and n directly causes the drift of the transmission frequency, but this can be avoided if the DC drift is suppressed to a sufficiently small range compared to the input υ1n. There are no practical problems. By using only a voltage controlled oscillator, the center of its oscillation frequency is from fc to f. Even if the deviation is +Δfc, the output compared and detected by the 1-phase comparator directly passes through the low-pass filter to control the voltage controlled oscillator, so that Δf can be sufficiently suppressed.

以上の説明によシ明らかなように9本発明によれば、入
力信号と、入力信号を低域通過フィルタに通して得られ
る低域信号成分とによp 、 PLL方式の電圧制御発
振器へ変調をかけることによって。
As is clear from the above description, according to the present invention, the input signal and the low-pass signal component obtained by passing the input signal through a low-pass filter are used to modulate the PLL type voltage controlled oscillator. By multiplying.

伝送信号入力の低周波成分に対しても変調特性が劣化し
ないため、 NRZ信号のみでなく、特に符号量干渉が
問題となる種々の信号方式に適用することができる。ま
た、 PLLルーツに用いられている低域通過フィルタ
のカットオフを高めに選べるため、 PLLル〜フ0全
体の応答が速く1周波数チャネル切替lの際における切
替所要時間を短縮できるなど、適用される通信システム
の信頼性向]二に対して得られる効果は大きい。
Since the modulation characteristics do not deteriorate even with respect to low frequency components of the transmission signal input, it can be applied not only to NRZ signals but also to various signal systems in which code amount interference is a problem. In addition, because the cutoff of the low-pass filter used in the PLL roots can be selected high, the response of the entire PLL loop is fast, and the switching time required when switching one frequency channel can be shortened. This has a significant effect on the reliability of communication systems.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はPLL方式によるFM変調器の従来の構成例を
示すブロック図、第2図は本発明による第1の実施例の
構成を示すプロ、り図、第3図は本発明による第2の実
施例の構成を示すプロ、り図である。 図において、■は電圧制御発振器、2は可変分周器、3
は位相比較器、4.11は低域通過フィルタ、5,9は
加算合成回路、6は基準周波数発振器、7.10は積分
回路、8は合成回路である。
FIG. 1 is a block diagram showing a conventional configuration example of an FM modulator using a PLL system, FIG. 2 is a block diagram showing a configuration example of a first embodiment according to the present invention, and FIG. It is a professional diagram showing the configuration of the embodiment. In the figure, ■ is a voltage controlled oscillator, 2 is a variable frequency divider, and 3 is a voltage controlled oscillator.
is a phase comparator, 4.11 is a low-pass filter, 5 and 9 are addition and synthesis circuits, 6 is a reference frequency oscillator, 7.10 is an integration circuit, and 8 is a synthesis circuit.

Claims (1)

【特許請求の範囲】 ■、電圧制御発振器と、該電圧制御発振器の出力周波数
を選択的に分周する可変分周器と、該可変分周器の出力
を基準周波数に対して位相比較する位相比較器とを有し
、該位相比較器の出力を低域通過フィルタを介したのち
1合成手段により変調用の入力信号とともに合成して前
記電圧制御発振器の発振周波数を制御するようにしたF
M変調器において、前記合成手段が、更に前記変調用の
入力信号から別に抽出された低周波成分を加えて合成し
、該合成出力によって前記電圧制御発振器を制御するよ
うにしたことを特徴とするFM変調器。 2、特許請求の範囲第1項に記載のFM変調器において
、前記入力信号を積分し、該積分された出力を前記位相
比較器の出力とともに合成する第2の合成手段を付加し
、該第2の合成手段の出力を前記低域通過フィルタに加
えることによって。 前記入力信号の低周波成分を前記第1の合成手段に加え
るようにしたことを特徴とするFM変調器。 3、特許請求の範囲第1項に記載のFM変調器において
、積分回路と、第2の低域通過フィルタとを付加し、こ
れ等両者の順序に制約されることなく縦続的に接続され
た前段側に前記入力信号を加え、後段の出力を前記合成
手段に加えるようにしたことを特徴とするFM変調器。
[Claims] (1) A voltage controlled oscillator, a variable frequency divider that selectively divides the output frequency of the voltage controlled oscillator, and a phase that compares the phase of the output of the variable frequency divider with respect to a reference frequency. a comparator, and the output of the phase comparator is passed through a low-pass filter and then synthesized with a modulation input signal by a synthesizing means to control the oscillation frequency of the voltage controlled oscillator.
In the M modulator, the synthesis means further adds and synthesizes a low frequency component separately extracted from the input signal for modulation, and controls the voltage controlled oscillator with the synthesized output. FM modulator. 2. The FM modulator according to claim 1, further comprising a second combining means for integrating the input signal and combining the integrated output with the output of the phase comparator; By applying the output of the combining means of No. 2 to the low-pass filter. An FM modulator, characterized in that a low frequency component of the input signal is added to the first combining means. 3. In the FM modulator according to claim 1, an integrating circuit and a second low-pass filter are added, and these are connected in cascade without being restricted in their order. An FM modulator, characterized in that the input signal is applied to the front stage side, and the output from the latter stage is applied to the synthesis means.
JP57230452A 1982-12-24 1982-12-24 Fm modulator Granted JPS59117848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57230452A JPS59117848A (en) 1982-12-24 1982-12-24 Fm modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57230452A JPS59117848A (en) 1982-12-24 1982-12-24 Fm modulator

Publications (2)

Publication Number Publication Date
JPS59117848A true JPS59117848A (en) 1984-07-07
JPS6366106B2 JPS6366106B2 (en) 1988-12-19

Family

ID=16908092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57230452A Granted JPS59117848A (en) 1982-12-24 1982-12-24 Fm modulator

Country Status (1)

Country Link
JP (1) JPS59117848A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0401947A2 (en) * 1989-06-07 1990-12-12 Robert Bosch Gmbh PLL oscillator circuit modulatable by an analog, low frequency modulating voltage

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0401947A2 (en) * 1989-06-07 1990-12-12 Robert Bosch Gmbh PLL oscillator circuit modulatable by an analog, low frequency modulating voltage
EP0401947A3 (en) * 1989-06-07 1991-05-29 Robert Bosch Gmbh Pll oscillator circuit modulatable by an analog, low frequency modulating voltage

Also Published As

Publication number Publication date
JPS6366106B2 (en) 1988-12-19

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