JPS59117287A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPS59117287A
JPS59117287A JP23161882A JP23161882A JPS59117287A JP S59117287 A JPS59117287 A JP S59117287A JP 23161882 A JP23161882 A JP 23161882A JP 23161882 A JP23161882 A JP 23161882A JP S59117287 A JPS59117287 A JP S59117287A
Authority
JP
Japan
Prior art keywords
layer
type
mesa
semiconductor
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23161882A
Other languages
Japanese (ja)
Inventor
Takao Furuse
古瀬 孝雄
Shinsuke Ueno
上野 眞資
Hideo Kawano
川野 英夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP23161882A priority Critical patent/JPS59117287A/en
Publication of JPS59117287A publication Critical patent/JPS59117287A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/227Buried mesa structure ; Striped active layer
    • H01S5/2275Buried mesa structure ; Striped active layer mesa created by etching
    • H01S5/2277Buried mesa structure ; Striped active layer mesa created by etching double channel planar buried heterostructure [DCPBH] laser

Abstract

PURPOSE:To block a current, which flows into the outside of a mesa region almost completely, by utilizing the increasing effect of a crystal growing speed in a grooves, providing a semiconductor layer in the vicinity of an active layer with good reproducibility, and making it possible to avoid the lamination of the semiconductor layer on the upper part of the mesa region. CONSTITUTION:On an N type GaAs substrate 1, an N type Al0.4Ga0.6As layer 2, an Al0.05Ga0.95As layer 3, which is to become an active layer, a P type Al0.4Ga0.6As-layer 4, and a P type GaAs layer 5 are formed. Mesa etching is performed so as to reach the substrate 1, and a stripe shaped mesa region having an active region is formed. Two grooves reaching the substrate 1 are provided. A P-type Al0.35Ga0.65As layer 6, an N type Al0.35Ga0.65As layer 7, and a P-type Al0.35Ga0.65As layer 12 are sequentially formed so as to surround the side surface of the mesa. Then the crystal growing speed in the grooves is expedited, and the crystal is not laminated on the upper part of the mesa. The crystal can be grown only on the side surface. Thereafter, a P-type GaAs layer 13 is formed on the entire surface of the crystal including the upper part of the mesa. Then, a P-type impurity diffused layer 8, a P-type ohmic electrode 10, and an N-type ohmic electrode 11 are formed.

Description

【発明の詳細な説明】 本発明は、電流狭窄をほどこした埋込み型半導体レーザ
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buried semiconductor laser with current confinement.

これまでの埋込み型半導体レーザの構造としては第1図
に示す様な構造が考えられてきた。すなわち、第1図に
おいて、1はn型GaAs基板、2はn型Alo4Ga
 O,6AB層、3はAloo5Ga6.g5As層、
4はpmAlo4Gao6AS層、5はp型GaAs層
、6はp”m A7 o、ss Ga o、eBAs層
X7はn型に、e O,35Ga O,65As層、8
はp型不純物拡散層、9は8i0.層、]6はn型オー
ミック電極、11はn型オーミック電極をそれぞれ示す
The structure shown in FIG. 1 has been considered as a structure of a buried semiconductor laser so far. That is, in FIG. 1, 1 is an n-type GaAs substrate, and 2 is an n-type Alo4Ga substrate.
O,6AB layer, 3 is Aloo5Ga6. g5As layer,
4 is pmAlo4Gao6AS layer, 5 is p-type GaAs layer, 6 is p''m A7 o, ss Ga o, eBAs layer X7 is n-type, e O, 35 Ga O, 65 As layer, 8
is a p-type impurity diffusion layer, 9 is 8i0. 6 represents an n-type ohmic electrode, and 11 represents an n-type ohmic electrode.

この構造においてはn型オーミック電極(to)、n型
オーミック電極(lυに順方向電圧を印加し、AA!o
、o sGa O,95AS層(3)に電流を注入して
発光再結合させてレーザ動作を可能にするものであり、
p型A7 o4Ga (1,6AS層(6)によりメサ
領域以外に流れる電流を阻止し、効率よくメサ部分に電
流注入してレーザ発振の効率を高める様になされている
In this structure, a forward voltage is applied to the n-type ohmic electrode (to) and the n-type ohmic electrode (lυ), and AA!o
, o sGaO,95AS layer (3) by injecting current to cause emission recombination to enable laser operation,
The p-type A7o4Ga (1,6AS layer (6) blocks current flowing outside the mesa region, and efficiently injects current into the mesa region to increase the efficiency of laser oscillation.

、しかしながら、この様な半導体レーザを造るには、化
学エツチング等により、層2.3.4.5を含む゛メサ
部を形成した後、2回目の結晶成長工程によりこのメサ
部を包囲する様にp型AlO,35Ga O,65AS
 Ji 6及びn型A7o、35GaO,65As層7
を順次成長する必要がある。然るに、2回目の結晶成長
工程に於て、p型Al o35Ga o65As65A
s長表面を第1図に示す様に活性層となるAl O,0
5Ga0.95ASJ督3の位置に精度よく合わせるこ
とが困難であり、むしろ第2図に示す様に層6がメサ側
面上部にまで形成されることの方が多い。これは、Al
GaAsメサ側面への結晶成長速度が遅く良好な埋込み
成長を達成するには、過飽和度の大きな溶液を用いなけ
ればならず、従って、結晶成長層厚を制御住良(形成す
ることが難かしいことによる。
However, in order to manufacture such a semiconductor laser, it is necessary to form a mesa part including the layer 2.3.4.5 by chemical etching or the like, and then surround this mesa part by a second crystal growth process. p-type AlO, 35GaO, 65AS
Ji 6 and n-type A7o, 35GaO, 65As layer 7
need to grow sequentially. However, in the second crystal growth process, p-type Al o35Ga o65As65A
As shown in Figure 1, the s-long surface is AlO,0, which becomes the active layer.
It is difficult to precisely match the position of the 5Ga0.95ASJ layer 3, and the layer 6 is often formed up to the upper part of the mesa side surface as shown in FIG. This is Al
In order to achieve a slow crystal growth rate and good buried growth on the GaAs mesa side surface, a highly supersaturated solution must be used. by.

従って、第2図に示す様な構造の場合にはp型A4 g
、35 oao65As層6とp型GaAs層5とが電
気的に同電位となり易く、メサ部領域以外に電流が容易
に流れ、レーザ発振が不可能になる欠点があった。
Therefore, in the case of the structure shown in Figure 2, p-type A4 g
, 35 oao65As layer 6 and p-type GaAs layer 5 tend to be electrically at the same potential, and current easily flows to areas other than the mesa region, making laser oscillation impossible.

本発明の目的は、上記従来の半導体レーザの欠点を無く
シ、再現性良く、電流狭窄型埋込み構造半導体レーザ装
置を構成することにある。
SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the conventional semiconductor laser described above and to construct a current confinement type buried structure semiconductor laser device with good reproducibility.

本発明の半導体レーザは、半導体基板上に、活性層と活
性層を上下から挾みかつ活性層よりも禁制帯幅の大きな
半導体層とを有する多層半導体層を備え活性層を含む多
層半導体層を貫通して前記半導体基板にまで達する2つ
の帯状ミゾに挾まれたメサ領域を備え、前記帯状ミゾに
て挾まれる活性層を含むメサ領域の上部には積層せず、
側部及び他の領域には積層する様に前記半導体基板より
も禁制帯幅の犬なる半導体層を少なくとも1層備え、前
記メサ領域の上部も含めて全体を覆う様に前半導体基板
と同じかそれよりも大きな禁制帯幅を有する半導体層を
備えたことに特徴がある。
The semiconductor laser of the present invention includes a multilayer semiconductor layer having an active layer and a semiconductor layer sandwiching the active layer from above and below and having a larger forbidden band width than the active layer on a semiconductor substrate, and a multilayer semiconductor layer including the active layer. comprising a mesa region sandwiched between two band-shaped grooves penetrating to reach the semiconductor substrate, and not laminated on top of the mesa region including an active layer sandwiched by the band-shaped grooves,
At least one semiconductor layer having a forbidden band width larger than that of the semiconductor substrate is provided to be laminated on the side portions and other regions, and the same semiconductor layer as the previous semiconductor substrate is provided so as to cover the entire area including the upper part of the mesa region. It is characterized by having a semiconductor layer having a larger forbidden band width than that.

以下、本発明に係る実施例について図面を参照して説明
する。第3図は本発明に係る一実施例を示す。図では、
第1図に関して説明した部分と同部分は同記号で示しで
ある。
Embodiments according to the present invention will be described below with reference to the drawings. FIG. 3 shows an embodiment according to the present invention. In the diagram,
The same parts as those explained in connection with FIG. 1 are indicated by the same symbols.

まず、第1の結晶成長工程に於て、n W GaAs基
板(1)上に順次、n型AX 6.4 Ga (1,6
As m (21、活性層となるAlo、osGao、
g5As層(3)、p型AJ O,4Ga g、6As
層(4L’ p型GaAs層(5)を形成する。各層厚
、はそれぞ、れ1.5μm、 0.1μm、 1.5μ
m、 017μmとした。しかる後、従来構造を形成す
ると同様なエツチング工程によりGaAs基板(1)に
達するまでメサエッチングを行い、活性領域を有する帯
状メサ領域を形成する。従来構造と異なる点は、上記メ
サエッチングに於て、GaAs基板(1)に達するミゾ
を2ヶ設けた事である。ここで、メサ横幅(第3図Wl
)は1〜3 ltm 、  ミゾ横幅(W2)は5〜1
0μmとした。
First, in the first crystal growth step, n-type AX 6.4 Ga (1,6
As m (21, Alo, osGao, which becomes the active layer)
g5As layer (3), p-type AJ O, 4Ga g, 6As
A p-type GaAs layer (5) is formed. The thickness of each layer is 1.5 μm, 0.1 μm, and 1.5 μm, respectively.
m, 017 μm. Thereafter, when the conventional structure is formed, mesa etching is performed until the GaAs substrate (1) is reached by a similar etching process to form a band-shaped mesa region having an active region. The difference from the conventional structure is that two grooves reaching the GaAs substrate (1) are provided in the mesa etching. Here, the mesa width (Fig. 3 Wl
) is 1~3 ltm, groove width (W2) is 5~1
It was set to 0 μm.

次に、第2の結晶成長工程により、まず上記メ”f 側
部ヲ包囲する様に、p型AlO,35Ga(1,65A
s層(6)1n型A4,350a(1,65AS hJ
AV)SJ)型A76.35GaO,65AS )@(
12)を順次形成する。ここに於て、横幅約5〜10μ
mのミゾ内における結晶成長速度は、ミゾ側面からの結
晶成長過程も加わるため、平担な面一こおける結晶成長
速度よりも約3倍程早(なる。
Next, in a second crystal growth step, p-type AlO, 35Ga (1,65A
s layer (6) 1n type A4,350a (1,65AS hJ
AV)SJ) type A76.35GaO,65AS)@(
12) are sequentially formed. Here, the width is about 5-10μ
The crystal growth rate in the groove of m is about three times faster than the crystal growth rate in a flat surface because the crystal growth process from the sides of the groove is also added.

従って、従来方法においては、過飽和度を非常に大きく
してメサ側面を埋め込むため、層厚の制御性が悪かった
が、本発明により、過飽和度を極度に大きくすることも
なく容易に埋込み成長が可能となった。再に、過飽和度
の小さな溶液からの成長が可能であるため、メサ横幅(
Wl)1〜3μmと狭いので、その上部には積層せず、
側面にのみ結晶成長が可能になる。これは、メサ側面の
成長過程により成長溶液中のAsがその方向で欠乏する
ためであり、メサ幅3μm以下においては、常にメサ側
面の結晶成長が支配的であり、メサ上部には積層しない
ことが実験的に判明した。
Therefore, in the conventional method, the side surfaces of the mesa are buried with a very high degree of supersaturation, resulting in poor controllability of the layer thickness, but with the present invention, buried growth can be easily achieved without increasing the degree of supersaturation to an extremely high degree. It has become possible. Again, the mesa width (
Wl) Since it is narrow at 1 to 3 μm, it is not laminated on top of it,
Crystal growth is possible only on the sides. This is because As in the growth solution is depleted in that direction due to the growth process on the mesa sides, and when the mesa width is 3 μm or less, the crystal growth on the mesa sides is always dominant, and there is no layering on the top of the mesa. was found experimentally.

しかる後、p型GaAs層(13)をメサ上部を含む結
晶全面に形成し、p型不純物拡散層13)、p型オーミ
ック電極(↓・、n型オーミック電極(1υを形成して
本発明に係る半導体レーザが形成される。
Thereafter, a p-type GaAs layer (13) is formed on the entire surface of the crystal including the upper part of the mesa, and a p-type impurity diffusion layer 13), a p-type ohmic electrode (↓・, and an n-type ohmic electrode (1υ) are formed to form the present invention. Such a semiconductor laser is formed.

本構造に於ては、ミゾ内の結晶成長速度の増加効果を利
用して、p型All o35Ga o、t;sAs層(
6)及びn型’j’0.3+Ga(1,65AS層(力
が活性層となるAll o、os GaO,g5As層
(3)の近傍に再現性良く位置せしめるだけでなく、メ
サ領域の上部に高抵抗性のp型AA?0,35()ao
、65As層(6)及びn型AA! oa5 oa O
,65As層(7)を積層させないことが可能となる。
In this structure, the p-type Allo35Gao,t;sAs layer (
6) and n-type 'j' 0.3+Ga (1,65AS layer). p-type AA with high resistance to ?0,35()ao
, 65As layer (6) and n-type AA! oa5 oa O
, 65As layer (7) can be omitted.

又、メサ側面下部に位置するp型AA! o35Ga(
1,65As層(6)は、Ga A s基板(1)J:
すも禁制帯幅が大きいため、この接合面での拡散電位差
を大きくすることができる。従って、メサ領域以外へ流
れる電流をほぼ完全に阻止することが容易に達成できる
。さらに、このメサ側面の電流阻止効果があるため、従
来構造の様に電流狭窄用のSin、膜形成の必要もなく
素子表面全体に渡る浅いp型不純物拡散上に形成したp
型オーミック° 電極だけで、室温発振閾値電流的lQ
mAと効率良いレーザ発振を可能にできた。
Also, p-type AA located at the bottom of the side of the mesa! o35Ga(
The 1,65As layer (6) is a GaAs substrate (1)J:
Since the forbidden band width is large, the diffusion potential difference at this junction surface can be increased. Therefore, almost completely blocking current flowing to areas other than the mesa region can be easily achieved. Furthermore, because of the current blocking effect of this mesa side surface, there is no need to form a Sin film for current confinement as in the conventional structure, and the P
Room temperature oscillation threshold current lQ with only type ohmic electrodes
This enabled efficient laser oscillation at mA.

さらに本構造においてはn型Alo、35Ga(1,6
5AS層(力よりも熱伝導率の高いp型GaAs層α〜
が表面全体にわたって形成されているため従来構造より
も放熱特性が改善され雰囲気温度140℃においてもレ
ーザ発振を行なわせることができた。
Furthermore, in this structure, n-type Alo, 35Ga (1,6
5AS layer (p-type GaAs layer α with higher thermal conductivity than power)
is formed over the entire surface, the heat dissipation characteristics are improved compared to the conventional structure, and laser oscillation can be performed even at an ambient temperature of 140°C.

さらに、素子表面が平担に形成されているため、放熱板
への固着時に均一な融着ができ、熱歪による応力の印加
を避けることができ信頼性の高い半導体レーザを提供す
ることができるものである。
Furthermore, since the element surface is formed flat, uniform fusion can be achieved when fixing it to the heat sink, and the application of stress due to thermal distortion can be avoided, making it possible to provide a highly reliable semiconductor laser. It is something.

以上述べた様に、本発明によれば、従来の半導体レーザ
の欠点を除き、メサ領域以外へ流れる電流を阻止し、効
率良いレーザ動作を可能とするばかりでなく、放熱特性
、信頼性にも優れた半導体レーザを再現性良く形成する
ことができる。
As described above, the present invention eliminates the drawbacks of conventional semiconductor lasers, blocks current flowing outside the mesa region, enables efficient laser operation, and improves heat dissipation characteristics and reliability. Excellent semiconductor lasers can be formed with good reproducibility.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は従来の埋込み型半導体レーザの構造
断面図、第3図は本発明による一実施例の構造断面図を
それぞれ示す。 各図に於て、 1:n型GaAs基板 2:n型AJo、4 Ga O,6AS f−3: A
−lO05Ga(、、g5As )i4:p型!’J 
(,4Ga (、,6As )g15:p型GaAs層 6:p型AA! g、35Ga 0065AS層7:n
型MO,35Ga O,65AS 48:p型不純物拡
散層 9 : Sin2層 10:p型オーミック電極 11:n型オーミック電極 12:p型1’J as s Ga o、65As層1
3:p型GaAs 層 をそれぞれ示す。 代理人弁理士 丙辰 蝕
1 and 2 are structural cross-sectional views of a conventional buried semiconductor laser, and FIG. 3 is a structural cross-sectional view of an embodiment of the present invention. In each figure, 1: n-type GaAs substrate 2: n-type AJo, 4 GaO, 6AS f-3: A
-lO05Ga(,,g5As)i4:p type! 'J
(,4Ga (,,6As)g15:p-type GaAs layer 6:p-type AA!g,35Ga 0065AS layer 7:n
Type MO, 35Ga O, 65AS 48: p-type impurity diffusion layer 9: Sin2 layer 10: p-type ohmic electrode 11: n-type ohmic electrode 12: p-type 1' J as s Ga o, 65As layer 1
3: Each shows a p-type GaAs layer. Representative Patent Attorney Hei Tatsuyoshi

Claims (1)

【特許請求の範囲】[Claims] 半導体基板上に、活性層と活性層を上下から挾みかつ活
性層よりも禁制帯幅の大きな半導体層とを有する多層構
造を備え、活性層を含む多層半導体層を貫通して前記半
導体基板にまで達する2つの帯状ミゾに挾まれたメサ領
域を備え、前記帯状ミゾにて挾まれる活性層を含むメサ
領域の上部には積層せず側部及び他の領域には積層する
様に前記半導体基板よりも禁制帯幅の大なる半導体層を
少なくとも1層備え、前記メサ領域の上部も含めて全体
を覆う様に前記半導体基板と同じかあるいはそれよりも
大きな禁制帯幅を有する半導体層を備えていることを特
徴とする半導体レーザ。
A multilayer structure having an active layer and a semiconductor layer sandwiching the active layer from above and below and having a larger forbidden band width than the active layer is provided on a semiconductor substrate, and the semiconductor layer is formed by penetrating the multilayer semiconductor layer including the active layer to the semiconductor substrate. The semiconductor is provided with a mesa region sandwiched between two band-shaped grooves that reach up to 100 cm, and the semiconductor is not stacked on the upper part of the mesa area including the active layer sandwiched by the band-shaped grooves, but is stacked on the side and other areas. At least one semiconductor layer having a forbidden band width larger than that of the substrate, and a semiconductor layer having a forbidden band width equal to or larger than the semiconductor substrate so as to cover the entire mesa region including the upper part thereof. A semiconductor laser characterized by:
JP23161882A 1982-12-24 1982-12-24 Semiconductor laser Pending JPS59117287A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23161882A JPS59117287A (en) 1982-12-24 1982-12-24 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23161882A JPS59117287A (en) 1982-12-24 1982-12-24 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPS59117287A true JPS59117287A (en) 1984-07-06

Family

ID=16926326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23161882A Pending JPS59117287A (en) 1982-12-24 1982-12-24 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS59117287A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0198656A2 (en) * 1985-04-11 1986-10-22 Sharp Kabushiki Kaisha A semiconductor laser device
EP0209372A2 (en) * 1985-07-17 1987-01-21 Sharp Kabushiki Kaisha A semiconductor laser device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0198656A2 (en) * 1985-04-11 1986-10-22 Sharp Kabushiki Kaisha A semiconductor laser device
EP0209372A2 (en) * 1985-07-17 1987-01-21 Sharp Kabushiki Kaisha A semiconductor laser device

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