JPS59116873A - Time correction system of multiple electronic computer system - Google Patents

Abstract

PURPOSE:To obtain a coincidence among control times of plural electronic computers which are linked together through a highway, by making the respective control times of the electronic computers coincident with a common coded time signal at specific intervals of time. CONSTITUTION:Respective process input/output devices 51-5n detect an input time signal N changing in bit state and send interruption signals to the respective electronic computers 41-4n. The computers 41-4n start on receiving the interruption signals to set the signal N as their new control time. Consequently, the respective control times of the computers 41-4n are corrected to coincide with the common time signal N at intervals of one minute. In this case, the signal N is not a mere increment signal and encoded to correspond to H o'clock and M minutes, so even if a deviation of >=30min occurs to each computer, its time is corrected to the accurate time.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a time correction method for a complex computer system in which the management times of a plurality of computers connected via a data highway are made to coincide with each other. .

[Technical background of the invention and its problems]

FIG. 1 shows a general configuration of a composite computer system in which a plurality of computers are connected by a highway.

In FIG. 1, a plurality of electronic computers 41-4n are connected via a highway 3 and are interfaced with processes via reflow processors 51-5n, respectively.

Furthermore, an output device l including a CRT, output typewriter, etc. is coupled to the central electronic computer 41.

Since the time of occurrence of the process data output to the output device 1 is also important, the computers 42 to 4n transmit time information together with the process data to the computer 411.

However, conventionally, the electronic computers 41 to 4n manage time separately, so even if the process data and occurrence time are output to the output device l, it is difficult to accurately know the context of the occurrence time between each data. It is.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a time correction method for making the times managed by each computer coincide with each other in a complex computer system in which a plurality of computers are connected via a highway.

[Summary of the invention]

The present invention provides a time (Ft) generator that generates a coded time signal at a constant cycle in a complex computer system in which a plurality of computers are connected via a data highway. is corrected to match the coded time signal at a predetermined period,
This is a time correction method for a complex computer system in which the management time of each computer in the system is made to coincide with each other.

[Embodiments of the invention]

An embodiment of the present invention is shown in FIG.

In FIG. 2, a time signal generator 6 that generates a coded time signal is added to FIG. 1, and the output time signal N is input to each process input/output device 5L to 5n. Others are the same as in Figure 1.

An example of the configuration of the time signal generator 6 is shown in FIG.

First, the setting device 10 sets the initial time value H6:00M. Set minutes.

A time signal N for time H hours is given by the following equation (1) with a unit time interval of 1 minute.

N=60xH+M ・・・・・・・・・(1) Decoder 11 receives time signal N from H62Mo according to formula +1)
. is calculated and set as the initial value of the pulse integrator [2.

The one-minute pulse train generated by the one-way clock 15 is started counting by the pulse counter 14 in response to the activation command, added to the time signal No. by the pulse integrator 12, and outputted as the time signal N.
It is input to each input/output device 51-5n via 31-L3n.

If the above time signal N is O for O hour θ minute, it will be 1439 for 23:59, and its numerical range (0 to 2'B-t) can be determined using a 16-bit binary code signal.
It can be given by

FIG. 4 shows the progress of the time signal N when the time is set to 23:30 and started.

At 24:00 minutes, that is, 0:00, the time signal N becomes O.
l”1. Go back and continue counting.

Next, each process input/output device 51 to 5n receives the above-mentioned time signal N.
The procedure for correcting the management time of each computer after receiving the information is shown in the flowchart of FIG.

In FIG. 5, each process input/output device 51 to 5n is
It detects that the bit state of the input time signal N has changed and sends an interrupt signal to each of the electronic computers 41 to 4n1.

When the electronic calculation units 1941-4n receive the interrupt signal, they are activated and set the time signal N from the process input/output devices 51-5n as their new management time.

As a result, the respective management times of the computers 41 to 4n are corrected to match the common time signal N1 every minute.

In this case, the time signal N is not just an increment signal, but is encoded and corresponds to H hours, so even if a difference of 30 seconds or more occurs in each computer, it is corrected to the correct time.

The above explanation assumes that the time interval of the time signal is 1 minute, but
This time interval can be selected at any time as required.

〔Effect of the invention〕

As explained above, according to the present invention, each management time of a plurality of computers connected via a highway is made to match a common coded time signal at each predetermined time interval. A time correction method for a complex computer system that makes the management times of the computers coincide with each other is obtained.

[Brief explanation of the drawing]

Fig. 1 is a system diagram showing the general configuration of a conventional complex computer system, Fig. 2 is a system diagram showing an embodiment of the present invention, and Fig. 3 is a system diagram showing the time signal generator used in Fig. 2. FIG. 4 is a block diagram showing the operation, FIG. 4 is a time chart showing an example of a time signal, and FIG. 5 is a flow chart showing a time correction method for each computer in the present invention. l...Output device 3...Data highway 41-4n...Electronic computer 51-5n...Process input/output device 6...Time signal generator (8733) Agent Patent attorney Yoshiaki Inomata (
1 other person) (7) Figure 1 Figure 2 Figure 3/32 One! 2 Figure 4 395 Figure 5

Claims (1)

[Claims] A time signal generation device that generates a coded time signal at a constant cycle is provided in a complex computer system in which a plurality of computers are connected via a data highway, and the control time of each computer is controlled at a predetermined cycle. A time correction method for a complex computer system, characterized in that the time is corrected to match the coded time signal.