JPS5911664A - Manufacture of capacitor for semiconductor device - Google Patents

Manufacture of capacitor for semiconductor device

Info

Publication number
JPS5911664A
JPS5911664A JP12089782A JP12089782A JPS5911664A JP S5911664 A JPS5911664 A JP S5911664A JP 12089782 A JP12089782 A JP 12089782A JP 12089782 A JP12089782 A JP 12089782A JP S5911664 A JPS5911664 A JP S5911664A
Authority
JP
Japan
Prior art keywords
tantalum
films
film
tantalum oxide
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12089782A
Other languages
Japanese (ja)
Inventor
Shuichi Shirakawa
白川 修一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12089782A priority Critical patent/JPS5911664A/en
Publication of JPS5911664A publication Critical patent/JPS5911664A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To advance oxidation uniformly, to relax stress due to cubic expansion in case of oxidation and to reduce leakage currents by forming ultra- thin silicon nitride films between tantalum oxide films and silicon substrates and using oxide films obtained by oxidizing multilayered films in which tanalum oxide film layers and silicon nitride films layers are laminated alternately. CONSTITUTION:The four layer films in which tantalum films 3, 3' and the tantalum oxide films 4, 4' are laminated alternately are formed 2 by periodically introducing sufficient oxygen into the chamber of a sputtering device in an argon gas atmosphere through a sputtering method while using tantalum as a target electrode on ultra-thin silicon nitride films 2. The four layer films 3, 4, 3', 4' on the ultra-thin silicon nitride film 2 are converted into the uniform tantalum oxide film 6 through heat treatment in a dried oxygen atmosphere at 525 deg.C. The sudden progress of oxidation is suppressed by the tantalum oxide film layers by using the multilayered films alternately laminated, and oxidation can be advanced equally on the silicon substrate 1.

Description

【発明の詳細な説明】 本発明は半導体装置用キャパシタの製造方法に関する。[Detailed description of the invention] The present invention relates to a method of manufacturing a capacitor for a semiconductor device.

従来、半導体装置用キャパシタには、金属あるいは半導
体へ絶縁膜を付着し、さらに金属等の電極を被着した構
造のものが用いられて来た。絶縁膜としては2酸化シリ
コン(Si(1)、  アルミナ(A1203)、窒化
シリコン(Si3N4)等の膜が用いられて来た。実装
密度の増加が望まれているためにこれらの絶縁膜よりも
大きな誘電率をもち、かつ極端に薄い誘電体膜が要求さ
れて来た。1981年春季応用物理学会学術講演会講演
予稿集第588頁にタンタル酸化物の誘電体を有する薄
膜キャパシタの形成方法が示されている。上記の方法で
は、゛第1のキャパシタ電極となるシリコン基板上にタ
ンタルの薄膜がR−Fスパ、りで被着される。このタン
タル薄膜を有するシリコン基板はそれから525°Cの
酸素雰囲気中で熱処理される。タンタルはすべてタンタ
ル酸化物に変換される。第2のキャパシタ電極がタンタ
ル酸化物の膜の上に付着される。上記の方法に於いて不
利な点は、このキャパシタはリーク電流が大きいことで
ある。上記方法に於いてタンタル薄膜を525°Cの酸
素雰囲気中で熱処理してタンタル酸化物に変換した後さ
らに1000°Cの酸素雰囲気中で熱処理するとタンタ
ル酸化膜とシリコン基板の間に薄いシリコン酸化膜が形
成されそのためにリーク電流が減少することが述べられ
ている。しかしながら新たにタンタル酸化膜とシリコン
基板の界面に形成されるシリコン愼化膜は誘電率が小さ
いためにタンタル酸化膜のみの場合とくらべると全体の
容量が低下してしまうという欠点があった。
Conventionally, capacitors for semiconductor devices have a structure in which an insulating film is attached to a metal or semiconductor, and an electrode made of metal or the like is further attached. Films such as silicon dioxide (Si(1)), alumina (A1203), and silicon nitride (Si3N4) have been used as insulating films. There has been a demand for an extremely thin dielectric film with a large dielectric constant.A method for forming a thin film capacitor with a tantalum oxide dielectric is described in the Proceedings of the 1981 Spring Conference of the Japan Society of Applied Physics, page 588. In the above method, a thin film of tantalum is deposited by R-F spacing onto a silicon substrate that will become the first capacitor electrode. The silicon substrate with the tantalum film is then heated to 525°C. All of the tantalum is converted to tantalum oxide. A second capacitor electrode is deposited on top of the tantalum oxide film. The disadvantage of the above method is that this Capacitors have a large leakage current.In the above method, a tantalum thin film is heat-treated in an oxygen atmosphere at 525°C to convert it into tantalum oxide, and then further heat-treated in an oxygen atmosphere at 1000°C to form a tantalum oxide film. It is stated that a thin silicon oxide film is formed between the tantalum oxide film and the silicon substrate, thereby reducing leakage current.However, the silicon oxide film newly formed at the interface between the tantalum oxide film and the silicon substrate has a low dielectric constant. Since it is small, it has the disadvantage that the overall capacity is lower than that of a tantalum oxide film alone.

本発明はタンタル酸化膜とシリコン基板の間に超薄窒化
シリコン膜を形成することによりタンタル酸化膜とシリ
コン基板が直接的に相互反応すること全阻止してかつタ
ンタル酸化膜のリーク電流全減少させ、さらにタンタル
酸化膜層とタンタル膜層とが交互に積層された多層膜を
酸化して得られるタンタル酸化膜を用いることによりタ
ンタル膜が急激に酸化されることを阻止してシリコン基
板全面にわたって一様に酸化全進行させ、かつまたタン
タル膜の酸化時に於ける体積膨張による応力を緩和して
リーク電流を減少させ、さらにまたシリコン酸化膜より
も誘電率の大きな超薄窒化シリコン基板コン膜とによっ
て全体の容量低下も少なくして上記の欠点を解消j〜た
半導体装置用キャパシタの制令方法を提供するものであ
る。
The present invention completely prevents direct interaction between the tantalum oxide film and the silicon substrate by forming an ultra-thin silicon nitride film between the tantalum oxide film and the silicon substrate, and reduces the leakage current of the tantalum oxide film. Furthermore, by using a tantalum oxide film obtained by oxidizing a multilayer film in which tantalum oxide film layers and tantalum film layers are alternately stacked, rapid oxidation of the tantalum film can be prevented, and the tantalum film can be uniformly deposited over the entire surface of the silicon substrate. The leakage current is reduced by allowing complete oxidation to proceed, and also by relaxing the stress caused by the volume expansion during oxidation of the tantalum film, and by forming an ultra-thin silicon nitride substrate film with a higher dielectric constant than a silicon oxide film. It is an object of the present invention to provide a method for controlling a capacitor for a semiconductor device, which eliminates the above-mentioned drawbacks by reducing the decrease in overall capacitance.

以下本発明を第1図乃至第5図全参照しながら実施例に
ついて説明する。まず第1図に示すように30・cmO
比抵抗のN型シリコン半導体基板1を用い、100%(
N)−13)ガス中で、1200°C11時間加熱して
第2図に示すようにシリコン半導体基板1の表面約3O
Aの厚みの部分を超薄窒化シリコン膜2に変換する。次
に第3図に示すよう。
Embodiments of the present invention will be described below with reference to all of FIGS. 1 to 5. First, as shown in Figure 1, 30 cmO
Using an N-type silicon semiconductor substrate 1 with a specific resistance of 100% (
N)-13) The surface of the silicon semiconductor substrate 1 is heated to about 30°C by heating at 1200°C for 11 hours in a gas as shown in FIG.
A portion with a thickness of A is converted into an ultra-thin silicon nitride film 2. Next, as shown in Figure 3.

に超薄窒化シリコン膜2の上にタンタル金ターゲ、ト電
極としてスバ、り法によりアルゴンガス雰囲気中に於い
て十分な酸素を周期的にスパッタ装置のチャンバー内に
導入することによってタンタル膜3及び3′とタンタル
酸化膜4及び4′が交互に積み重なった4層膜を形成す
る。第3図に於いては、はじめに超薄窒化シリコン腰・
2上にアルゴンガス雰囲気中で10OAの厚さのタンタ
ル膜層3を被着し次にアルゴンと10%酸素混合ガス雰
囲気中で10OAの厚さのタンタル酸化膜層4を被着し
次にアルゴンガス雰囲気中で10OAの厚さのタンタル
膜厚3′を被着し最後に表面にアルゴンと10%酸素混
合ガス雰囲気中で100Aの厚さのタンタル酸化膜層4
′を被着して4層膜全形成した場合について示しである
が、超薄窒化シリコン膜2上に被着形成する順序は初め
にタンタル膜層ではなくタンタル酸化膜層全被着しても
良いしさらにまfc父互に積層した後最後に表面に被着
形成する層はタンタル酸化膜層ではなくタンタル膜、啼
であっても良い。
The tantalum film 3 and 3' and tantalum oxide films 4 and 4' are stacked alternately to form a four-layer film. In Figure 3, we first show the ultra-thin silicon nitride waist.
2, a tantalum film layer 3 with a thickness of 10 OA is deposited in an argon gas atmosphere, then a tantalum oxide film layer 4 with a thickness of 10 OA is deposited in an argon and 10% oxygen mixed gas atmosphere, and then a tantalum oxide film layer 4 with a thickness of 10 OA is deposited on the argon gas atmosphere. A tantalum film 3' with a thickness of 10OA is deposited on the surface in a gas atmosphere, and finally a tantalum oxide film 4 with a thickness of 100A is deposited on the surface in an argon and 10% oxygen mixed gas atmosphere.
The figure shows the case where the entire four-layer film is formed by depositing . Furthermore, the last layer formed on the surface after laminating the fc layers may be a tantalum film or a tantalum film instead of a tantalum oxide film layer.

多層膜の層の数はタンタル酸化膜層とタンタル膜層が各
1層づつ積層された2層膜の場合からそれ以上の多層膜
の場合までとることができる。またタンタル膜層の厚さ
とタンタル酸化膜層の厚さは異なっていても良い。この
多層膜を有する基板はそれから525°Cのドライ酸素
雰囲気中で30分熱処理して、第4図に示すように10
0λの厚さのタンタル膜)Wt 3及び3′をすべてタ
ンタル酸化膜層に変換する。超薄窒化シリコン膜2上の
4層膜3. 4. 3’、4’ は一様なタンタル酸化
膜5に変換される。タンタル膜525°Cめドライ酸素
雰囲気中で熱処理してタンタル酸化膜に変換する際、タ
ンタル膜は約2倍の膜厚のタンタル酸化膜に変換される
のでこの時の体積膨張により超薄窒化シリコン膜2とタ
ンタル膜層3の界面5にかなフ応力がかかるが、タンタ
ル膜層3及び3′とタンタル酸化膜層4及び4′とが交
互に積層された4層膜を酸化する場合には、多層構造を
持たない一層のタンタル膜+V化する場合にくらべて界
面5にかかる応力を軽減することが出来る。さらに□タ
ンタル膜の酸化速度はかなフ早いので本発明の如くタン
タル膜層とタンタル酸化膜層とが交互に積層された多層
膜を用いることによってタンタル酸化膜層で急激な酸化
の進行が押えられるのでシリコン基板上に一様に酸化を
進行させることが出来る。また上記の熱処理によってタ
ンタル酸化膜層4及び4′の非化学量論的な酸素不足が
減少する。かかる絶縁膜2.6上に第5図に示すように
1μm厚さのアルミニウムを被着しパタニングして電極
7を作る。次に400″CのN2雰囲気中で10分間熱
処理を行ないキャパシタとする。
The number of layers in the multilayer film can range from a two-layer film in which one tantalum oxide film layer and one tantalum film layer are laminated to a multilayer film with more than that. Further, the thickness of the tantalum film layer and the thickness of the tantalum oxide film layer may be different. The substrate with this multilayer film was then heat treated in a dry oxygen atmosphere at 525°C for 30 minutes to produce a
0λ thick tantalum film) Wt 3 and 3' are all converted into tantalum oxide film layers. 4-layer film on ultra-thin silicon nitride film 2 3. 4. 3' and 4' are converted into a uniform tantalum oxide film 5. When a tantalum film is heat-treated at 525°C in a dry oxygen atmosphere to convert it into a tantalum oxide film, the tantalum film is converted into a tantalum oxide film with approximately twice the thickness, so the volumetric expansion at this time results in an ultra-thin silicon nitride film. A slight stress is applied to the interface 5 between the film 2 and the tantalum film layer 3, but when oxidizing a four-layer film in which tantalum film layers 3 and 3' and tantalum oxide film layers 4 and 4' are alternately laminated, , the stress applied to the interface 5 can be reduced compared to the case of forming a single layer of tantalum +V without having a multilayer structure. Furthermore, since the oxidation rate of tantalum film is very fast, by using a multilayer film in which tantalum film layers and tantalum oxide film layers are alternately laminated as in the present invention, rapid progress of oxidation can be suppressed in the tantalum oxide film layer. Therefore, oxidation can proceed uniformly on the silicon substrate. The above heat treatment also reduces non-stoichiometric oxygen deficiency in the tantalum oxide film layers 4 and 4'. As shown in FIG. 5, aluminum with a thickness of 1 μm is deposited on the insulating film 2.6 and patterned to form the electrode 7. Next, heat treatment is performed for 10 minutes in a N2 atmosphere at 400''C to form a capacitor.

上記の方法で作製したキャパシタは、タンタル酸化膜と
シリコン半導体基板の間に超薄窒化シリコン膜があるた
めに従来のタンタル酸化膜のみの場合問題となって(八
たリーク電流を減少させることができる。さらにタンタ
ル酸化膜の形成法としてタンタル酸化膜層とタンタル膜
層が交互に積層された多層膜ケ熱処理して均一なタンタ
ル酸化膜とすることにより上記熱処理時に於いてタンタ
ル酸化膜層で急激な[資化の進行が押えられシリコン基
板全面にわたって一様に酸化が進行する。
The capacitor manufactured by the above method has an ultra-thin silicon nitride film between the tantalum oxide film and the silicon semiconductor substrate, which causes problems when using only the tantalum oxide film (8) and the problem of reducing leakage current. In addition, as a method for forming a tantalum oxide film, a multilayer film in which tantalum oxide film layers and tantalum film layers are laminated alternately is heat-treated to form a uniform tantalum oxide film. The progress of assimilation is suppressed and oxidation progresses uniformly over the entire surface of the silicon substrate.

さらに上記多層膜を用いることによってタンタル膜が酸
化されてタンタル酸化膜に変換される時の体N膨張によ
りタンタル酸化膜と超薄窒化シリコン膜との界面にかか
る応力全軽減させリーク電流を減らすことが出来る。ま
たタンタル酸化膜とシリコン半導体基板との間に酸素雰
囲気中で熱処理することによって2酸化シリコン膜を形
成してリーク電流を減少させる公知の方法は熱処理時間
をふやすとそれに伴なって2酸化シリコン膜厚が増加し
そのため全体の容量値が時間と共に減少する。
Furthermore, by using the above multilayer film, the stress applied to the interface between the tantalum oxide film and the ultra-thin silicon nitride film is reduced due to body N expansion when the tantalum film is oxidized and converted into a tantalum oxide film, thereby reducing leakage current. I can do it. In addition, in a known method of reducing leakage current by forming a silicon dioxide film between a tantalum oxide film and a silicon semiconductor substrate by heat treatment in an oxygen atmosphere, as the heat treatment time increases, the silicon dioxide film The thickness increases so that the overall capacitance value decreases over time.

さらに高温で熱処理すると薄い2酸化シリコン膜ではタ
ンタルシリサイドの形成を防ぐことが出来ないという欠
点があるが、本発明の方法はちみつな超薄窒化シリコン
膜を使っているので熱処理時間を長くしても容量値は変
化せず、タンタルシリサイドの形成も防ぐことが出来、
リーク電流の少ないキャパシタがえられる。
Furthermore, when heat-treated at high temperatures, a thin silicon dioxide film cannot prevent the formation of tantalum silicide. The capacitance value does not change and the formation of tantalum silicide can be prevented.
A capacitor with low leakage current can be obtained.

以上詳細に説明したように本発明はタンタル酸化膜とシ
リコン半導体基板の界面に超薄窒化シリコン膜を形成し
、その後タンタル酸化膜層とタンタル膜層とが交互に積
層された多層膜全熱処理して均一なタンタル酸化膜を形
成することによって、容量密度が太きくしかもリーク電
流の小さいキャパシタかえられる。
As explained in detail above, the present invention forms an ultra-thin silicon nitride film at the interface between a tantalum oxide film and a silicon semiconductor substrate, and then performs full heat treatment on a multilayer film in which tantalum oxide film layers and tantalum film layers are alternately laminated. By forming a uniform tantalum oxide film, a capacitor with high capacitance density and low leakage current can be obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図乃至第5図は各々本発明に係るキャパシタの製造
工程を工程順に説明する断面図、である。 なお図において、 ]・・・・・・シリコン半導体基板、2・・・・・・超
薄窒化シリコン膜、3及び3′・・・・・・タンタル膜
層、4及び4′・・・・・・タンタル酸化膜層、5・・
・・タンタル酸化膜と超薄窒化シリコン膜との界面、6
・・・・・・タンタル酸化膜、7・・・・・・金属電極
、である。
1 to 5 are cross-sectional views illustrating the manufacturing process of a capacitor according to the present invention in order of process. In the figure, ]...Silicon semiconductor substrate, 2...Ultra-thin silicon nitride film, 3 and 3'...Tantalum film layer, 4 and 4'... ...Tantalum oxide film layer, 5...
...Interface between tantalum oxide film and ultra-thin silicon nitride film, 6
. . . Tantalum oxide film, 7 . . . Metal electrode.

Claims (1)

【特許請求の範囲】[Claims] キャパシタの第1電極となるシリコン基板を窒素全構成
原子としてふくむ雰囲気中で熱処理して該シリコン基板
の表面部に超薄窒化シリコン膜を形成し、上記超薄窒化
シリコン膜表面にタンタルターゲラ)k用いたスパッタ
法を用いてスノくツタガス雰医気中に十分な屯素を周期
的に導入することによりタンタル膜層とタンタル酸化膜
層を交互に績み重ねた多層膜を形成した後、上記構造体
を酸素雰囲気中で熱処理して上記タンタル膜層をすべて
タンタル酸化膜層に変換し、かかる絶縁膜にキャパシタ
の第2電極を被着することを特徴とする半導体装置用キ
ャパシタの製造方法。
A silicon substrate, which will become the first electrode of the capacitor, is heat-treated in an atmosphere containing all nitrogen atoms to form an ultra-thin silicon nitride film on the surface of the silicon substrate, and tantalum tartar is applied to the surface of the ultra-thin silicon nitride film. After forming a multilayered film in which tantalum film layers and tantalum oxide film layers were alternately stacked by periodically introducing sufficient tungsten into the snow ivy gas atmosphere using the sputtering method using k, A method for manufacturing a capacitor for a semiconductor device, comprising heat-treating the structure in an oxygen atmosphere to convert all of the tantalum film layers into tantalum oxide film layers, and depositing a second electrode of the capacitor on the insulating film. .
JP12089782A 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device Pending JPS5911664A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12089782A JPS5911664A (en) 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12089782A JPS5911664A (en) 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5911664A true JPS5911664A (en) 1984-01-21

Family

ID=14797699

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12089782A Pending JPS5911664A (en) 1982-07-12 1982-07-12 Manufacture of capacitor for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5911664A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04145623A (en) * 1990-10-08 1992-05-19 Handotai Process Kenkyusho:Kk Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04145623A (en) * 1990-10-08 1992-05-19 Handotai Process Kenkyusho:Kk Manufacture of semiconductor device

Similar Documents

Publication Publication Date Title
US4464701A (en) Process for making high dielectric constant nitride based materials and devices using the same
US4432035A (en) Method of making high dielectric constant insulators and capacitors using same
JPH04279053A (en) High-valued tantalum oxide capacitor
JPS6349907B2 (en)
JPS60153158A (en) Manufacture of semiconductor device
US6461931B1 (en) Thin dielectric films for DRAM storage capacitors
JP2008252118A (en) Electronic component with doped metal oxide dielectric material, and process for manufacturing electronic component with doped metal oxide dielectric material
JPH01225149A (en) Capacitor and manufacture thereof
JPH03159166A (en) Semiconductor device and manufacture thereof
US5088003A (en) Laminated silicon oxide film capacitors and method for their production
JP2785126B2 (en) Method of forming dielectric thin film and method of manufacturing semiconductor device using the same
JPS5911664A (en) Manufacture of capacitor for semiconductor device
JPH0745475A (en) Thin film capacitor and fabrication thereof
JPS5911663A (en) Manufacture of capacitor for semiconductor device
JPH11214245A (en) Thin film monolithic capacitor and manufacture thereof
JPH0864763A (en) Capacitor and manufacture thereof
JPS59215764A (en) Manufacture of capacitor for semiconductor device
JPS5928369A (en) Manufacture of capacitor for semiconductor device
JPS58112360A (en) Capacitor for semiconductor device and manufacture thereof
JP3361016B2 (en) Superconducting member and manufacturing method thereof
JPS6028259A (en) Manufacture of capacitor for semiconductor device
JP2004349394A (en) Method for manufacturing thin film high dielectric capacitor
JPS5984570A (en) Manufacture of capacitor for semiconductor device
JPS59188957A (en) Manufacture of capacitor for semiconductor device
JP2942128B2 (en) Thin film capacitor and method of manufacturing the same