JPS5911465U - Printed board for IC mounting - Google Patents

Printed board for IC mounting

Info

Publication number
JPS5911465U
JPS5911465U JP10682282U JP10682282U JPS5911465U JP S5911465 U JPS5911465 U JP S5911465U JP 10682282 U JP10682282 U JP 10682282U JP 10682282 U JP10682282 U JP 10682282U JP S5911465 U JPS5911465 U JP S5911465U
Authority
JP
Japan
Prior art keywords
printed board
mounting
balanced
pair
terminal pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10682282U
Other languages
Japanese (ja)
Inventor
中村 壽夫
馬「淵」 信広
山中 良泰
Original Assignee
三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP10682282U priority Critical patent/JPS5911465U/en
Publication of JPS5911465U publication Critical patent/JPS5911465U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第一1図は本考案の対象とするICとその周辺回路の接
続関係を示す図、第2図はこの場合に使用する本考案プ
リント板の裏面側を示す図である。 IC’ 、IC取付部、e:仮想中心線、Pa”−Pg
及びP。 〜P□6:導体パターン。
FIG. 11 is a diagram showing the connection relationship between an IC targeted by the present invention and its peripheral circuits, and FIG. 2 is a diagram showing the back side of the printed circuit board of the present invention used in this case. IC', IC mounting part, e: virtual center line, Pa''-Pg
and P. ~P□6: Conductor pattern.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数段の平衡型差動接続構成を有すると共に、その各段
の平衡入力用または平衡出力用の各一対の端子ピンがI
Cパッケージの長さ方向の二辺に対向して配置されたI
Cの取付用のプリント板であって、プリント板のIC取
付部を長さ方向に通る仮想中心線に対して、前記各一対
の端子ピンの各々が接続される導体パターンが実質的に
略対称になるように設けたことを特徴とするIC取付用
プリント板。
It has a balanced differential connection configuration with multiple stages, and each pair of terminal pins for balanced input or balanced output in each stage is connected to I
I placed opposite the two longitudinal sides of the C package
C, the conductor pattern to which each of the pair of terminal pins is connected is substantially symmetrical with respect to an imaginary center line passing through the IC mounting portion of the printed board in the length direction. A printed board for IC mounting, characterized in that it is provided so as to
JP10682282U 1982-07-13 1982-07-13 Printed board for IC mounting Pending JPS5911465U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10682282U JPS5911465U (en) 1982-07-13 1982-07-13 Printed board for IC mounting

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10682282U JPS5911465U (en) 1982-07-13 1982-07-13 Printed board for IC mounting

Publications (1)

Publication Number Publication Date
JPS5911465U true JPS5911465U (en) 1984-01-24

Family

ID=30249823

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10682282U Pending JPS5911465U (en) 1982-07-13 1982-07-13 Printed board for IC mounting

Country Status (1)

Country Link
JP (1) JPS5911465U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60192493U (en) * 1984-05-31 1985-12-20 富士通株式会社 printed board unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60192493U (en) * 1984-05-31 1985-12-20 富士通株式会社 printed board unit

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