JPS59114636A - Self-looping processing system of microprogram - Google Patents

Abstract

PURPOSE:To detect easily the cause of a fault by holding repeatedly a microinstruction related to generation of the fault in a control memory data register, and executing repeatedly its instruction, when the fault is detected in a result of processing of the microinstruction. CONSTITUTION:An address A(k) is held in an address register 4, a mu-instruction I(k) corresponding to the address A(k) is read out of a control memory 1, set to a data register 2, and the contents of the instruction I(k) are decoded and processed. The following address A(k+1) is described in the mu-instruction I(k), and unless abnormality exists in the processing of the instruction I(k), an error signal generator HWERR outputs ''0'', and the processing is shifted successively to execution of the following instruction, but if a fault is detected, the HWERR outputs ''1'', a switch 5 selects repeatedly the address A(k), and the instruction I(k) is executed repeatedly. In this way, the cause of a fault is detected easily.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention is directed to a microprogram self-loop processing method, particularly a microprogram controlled data processing device, which repeatedly executes microinstructions related to the occurrence of a fault when a fault occurs. This invention relates to a microprogram self-loop processing method that is configured as such and allows for free observation of signal waveforms of various parts during the execution of a microinstruction corresponding to the occurrence of a failure, for example.

CB) Technical background and problems In order to trace the cause of a hardware failure in a microprogram-controlled data processing device, one method is to extract the microprogram environment in which the failure occurred from the source microprogram, and extract it from the source microprogram. However, in the case of the conventional method of extracting the microprogram environment, (1) the microprogram environment is extracted, loosened, and executed. Because the processing is at a different point from the time when the above failure occurred,
The looped processing greatly reduces the possibility that the failure will occur again, and is relatively less likely to be useful in tracing the cause of the failure.

(11) Furthermore, since the above microprogram environment is created and loop processing is performed, a new step is required for loop processing, and for this reason, when observing signal waveforms, only the signal waveforms corresponding to the fault are used. Questions arise as to whether or not we are observing correctly and efficiently.

It includes problems such as.

(Objective and Structure of the Invention The present invention aims to solve the above problems.
In other words, the purpose is to configure the system so that immediately after a failure occurs, loop processing is automatically performed under the relevant processing step, so that if a failure occurs, loop processing can be entered at step l. . Therefore, the microprogram self-loop processing method of the present invention is
A control memory in which a microprogram is stored, a control memory data register in which microinstructions read from the control memory are set, and a control memory data register in which a microinstruction read from the control memory is set;
hardware control by decoding the microinstructions set in the register); and a control memory address register in which the access address for the control memory is set, and the contents of the control memory are In a microglodulum control data processing device that has a function of reading out and proceeding with processing and detecting a failure when a failure occurs in the processing result based on the processing corresponding to the microinstruction, the failure is detected when the failure occurs. The microinstruction device is characterized in that the microinstruction related to generation is repeatedly held in the control memory data register, and the microinstruction is repeatedly executed. 0(6) Embodiment of the Invention The drawings described below with reference to the drawings show the configuration of an embodiment of the present invention. In the figure, reference numeral 1 is a control memory in which a microprogram is stored, 2 is a control memory data register in which microinstructions read from the control memory 1 are set, and 3 is a control memory in which a microprogram is stored. - A hardware control unit that decodes the contents of the control memory data register 2 and controls each part of the hardware; 4 is a control memory address register that accesses the control memory 1;
The address is set to an access address transfer switch 5, which selects the transferred address.

Under normal conditions, address A (A) is held in address register 4 and address A is stored in control memory 1.
When the microinstruction I (k) corresponding to (A) is read out and set in the data register 2, the contents of the microinstruction I (k) are decoded and the corresponding processing is performed. Microinstruction I (A) describes the next address A (k + 1) where the next microinstruction is stored, so that no failure occurs when executing the process corresponding to the above microinstruction I (k). When the illustrated error signal HWERR remains at logic "0", the next address A (A + i) is set in the address register 4 via the switch 5, and the control memory 1 is accessed. be done. That is, in the next step, the command (A +
1) is read to data register 2 and set. Thereafter, the process is repeated in the same manner.

However, if a failure occurs during the execution of the process corresponding to the above microinstruction I (k), the illustrated error signal H
When WERR is a logic ``1'', switch 5 selects address A (k) on address register 4 instead of the next address A (A +1) from the contents of data register 2, and transfers address register 4 to address register 4. , thereby accessing the control memory 1. That is, in the next step as well, the microinstruction I (A) corresponding to the original address A (&) is set in the data register 2.

Then, processing corresponding to the microinstruction I(An)K is performed. In other words, when the signal HWERR is at logic ``1j'', the microinstruction ICk) is repeatedly executed.

During this time, signal waveforms and the like of each part of the hardware are collected. If the signal HWERR is returned to logic "0", the next address A
The format in which instructions corresponding to (k+1)K are read is the same as normal processing.

In addition, although it was shown above that switch 5 is provided, it is also possible to provide a switch at the input stage of data register 2,
The command issued from the control memory 1 may be ignored.

As described in detail, according to the present invention, even if a failure occurs during the execution of any microinstruction, it is possible to immediately loop the microinstruction and repeatedly execute the instruction. .

This greatly increases the possibility of discovering the cause of the failure.

[Brief explanation of drawings]

The figure shows the configuration of an embodiment of the present invention. In the figure, 1 represents a control memory, 2 a control memory data register, 3 a hardware control section, 4 a control memory address register, and 5 an access address transfer register. Patent applicant Hiroshi Mori (1 other person), agent patent attorney of Fujitsu Ltd.

Claims (1)

[Claims] A control memory in which a microprogram is stored, a control memory data register in which microinstructions read from the control memory are set, and a control memory data register in which a microinstruction read from the control memory is set;
It has a hardware control unit that performs hardware control by decoding microinstructions set in the register, and a control memory address register in which an access address to the control memory is set, and reads the contents of the control memory. In addition to proceeding with the processing, the microprogram-controlled data processing device has a function of detecting a failure when a failure occurs in the processing result based on the processing corresponding to the microinstruction. A microprogram self-loop processing method, characterized in that the micro-instructions related to generation are repeatedly held in the control memory data register, and the micro-instructions are repeatedly executed.