JPS59112640A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To operate an IC in the prescribed performance by the external voltage in a wide range by generating a low constant voltage lower than an internal power source line to detect the output in the prescribed threshold value, and applying the detected output to the control terminal of a transistor to lower the power source voltage. CONSTITUTION:An enhancement type P-channel FET101 is employed for a step- down circuit 32, the source is connected to an external power source terminal 10(VCC), the drain is connected to an internal power source line 40(VINT), and the gate is connected to a control terminal. If VINT<VTH+DELTAV, where the threshold voltage of a voltage detector 34 is represented by VTH and the constant voltage drop of a constant-voltage circuit 33 is represented by DELTAV, the detector 34 in which C-MOS inverters 303, 304 are connected in cascade becomes a low level VSS, the conductivity of the FET101 increases to cause the VINT to rise. If VINT>VTH+V, the detector 34 becomes a high level VCC, the conductivity of the FET decreases, the VINT drops, and VINT=VTH+DELTAV is set. Even if the externally supplied voltage varies in a wide range, the VINT can be maintained at the prescribed value by selecting the VTH, DELTAV, and an IC which includes ultrafine channel length can be stably operated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor integrated circuit constituted by MIS transistors, such as MOS transistors, and particularly to a semiconductor integrated circuit including an MO8 transistor with an effective channel length of 1 μm or less.

[Technical background of the invention]

There has been a remarkable development in semiconductor integrated circuits including MQS transistors, and in the latter half of the 1960s, MOS transistors with an effective channel length of about 10 μm and an integration density of tens to hundreds of elements were realized. There is. Further, microfabrication and high integration have progressed, and in recent years, the effective channel length is about 1.5 μm and the number of elements is several hundred thousand elements.
In the future, submicron semiconductor integrated circuits using Zabumicron MOS transistors with an effective channel length of 1 μm or less are expected to appear.

By the way, in conventional MOS type semiconductor integrated circuits, internal functional circuits are operated directly by external power supply, and the supply voltage has been reduced as the effective channel length of the MOS transistors that make up the internal functional circuits has been reduced. ing. For example, the current device with an effective channel length of 15 μm is operated under a 5μ single power supply.

[Problems with background technology]

As the effective channel length of MOS transistors decreases,
Under conditions where the power supply voltage is kept constant, the electric field within the element increases, and this increase in electric field causes the following problems.

■ Generation of hot electrons and hot holes due to impact ionization ■ Increase in substrate current ■ - Decreased yanch-through resistance ■ Occurrence of breakdown at source and drain junctions ■ MOS transistor threshold due to trapping of hot carriers in the gate insulating film Change in voltage over time Due to the occurrence of such disadvantages, there is a disadvantage in that the voltage range of the externally supplied power source is severely limited.

Furthermore, in future submicron semiconductor integrated circuits, it will be necessary to use a power supply voltage lower than the current standard power supply, which is a 5-inch single power supply. This is to prevent the occurrence of the above-mentioned problems from (1) to (2).Among these, in particular, changes over time in the threshold voltage and voltage of MOS transistors due to hot carriers being trapped in the dirt insulating film are This can cause a significant deterioration in the speed performance of micron semiconductor integrated circuits and cause malfunctions.

FIG. 1 is a sectional view showing the structure of a general enhancement type MO8 transistor. In the figure, reference numeral 1 denotes, for example, a silicon substrate of p-type conductivity, and a pair of n-type source regions 2 and drain regions 3 are formed on the inner surface of this substrate 1. Furthermore, a gate electrode 5 made of polycrystalline silicon is formed on the channel between the source and drain regions with a gate insulating film 4 interposed therebetween.

FIG. 2 is a diagram showing the energy band state of the MOS transistor having the above configuration.

As shown in FIG. 2, a potential barrier φ for electrons is formed between the silicon substrate 1 and the surface of the gate insulating film 4. is approximately 3.1 eV, and the potential barrier φh for the hole is approximately 3.8 eV.
Yes. Here, the element is miniaturized, and the effective channel length of the MOS transistor (shown by Leff in Fig. 1) is 1μ.
If the power supply voltage is set to 5V in a state where the power supply voltage is shortened to less than m, hot electrons and hot holes generated by inno(') ionization will cross the potential barriers φ and φh, respectively, and cause dirt insulating film 4. There is a high probability that it will be released inside.

Then electrons or holes are trapped,
The change in threshold voltage over time becomes large. On the other hand, from a system application point of view, it is preferable to use a common power source for each integrated circuit that makes up the system in order to reduce size and cost. Preferably, the circuit also operates under a 5V power supply, which is the current standardized power supply. However, in conventional semiconductor integrated circuits in which internal functional circuits are operated directly by external power supply, operating under a 5V power supply causes deterioration of characteristics as described above.
This has the disadvantage of causing defects.

Furthermore, in conventional semiconductor integrated circuits, their performance, such as operating speed, current consumption, etc., vary greatly depending on the external supply voltage. For this reason, there are drawbacks such as increasing the difficulty in designing the integrated circuit and making it difficult to use in system applications.

Furthermore, conventional semiconductor integrated circuits must be operated under a highly accurate power source for practical purposes. That is, when using a power supply with low precision, application of an excessively high voltage may cause deterioration, causing reliability problems, and deterioration and malfunction due to power supply spikes and power supply noise.

[Purpose of the invention]

This invention was made in consideration of the above circumstances, and its first purpose is to provide a semiconductor integrated circuit that operates with high reliability without deterioration under a wide range of externally supplied power supply voltages. A second object of the present invention is to provide a semiconductor integrated circuit that operates with constant performance over a wide range of externally supplied power supply voltages.

A third object of the present invention is to provide a semiconductor integrated circuit that does not deteriorate due to power supply cycles.

A fourth object of the present invention is to provide a semiconductor integrated circuit that operates stably against power supply noise and fluctuations.

[Summary of the invention]

In order to achieve the above object, the present invention includes a transistor element that steps down the voltage supplied to the power supply terminal and supplies it to the internal power supply line, and a constant voltage regulator that generates a voltage lower than the voltage on the internal power supply line by a constant voltage of υ-. Voltage circuit, a voltage detection circuit that detects the output voltage of this constant voltage circuit at a predetermined threshold voltage and supplies the detected output to the control terminal of the transistor element, which detects the output voltage of this constant voltage circuit at a predetermined threshold voltage. An internal power supply circuit for obtaining voltage is constructed, and an internal functional circuit composed of MOS transistors is operated under a constant voltage obtained by this internal power supply circuit.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 3 is a block diagram showing the configuration of a semiconductor/integrated circuit according to the present invention.

In the figure, 10 is a power supply terminal to which power supply voltage VCC is supplied from the outside, 20 is a ground terminal to which ground potential VSS is supplied from the outside, and 20 is an internal power supply that steps down the voltage supplied to the terminal 1θ to obtain a constant voltage VINT. 40 is an internal power supply line to which the voltage VENT obtained by the internal power supply circuit is supplied, and LA is a dynamic RAM, for example, constituted by MOS transistors, which operates using the voltage on this internal power supply line 40 as a power supply voltage.

Status, R, AM, ROM, EPROM
, an internal functional circuit consisting of a memory such as E2FROM or a logic circuit such as a microprocessor or microcomputer, 60 is an input terminal provided for supplying input signals to this internal functional circuit, and 70 is an input terminal provided for supplying input signals from the internal functional circuit. This is an output terminal provided for outputting a signal to the outside.

The internal power supply circuit length includes a step-down circuit having a control terminal 3 and a constant voltage circuit that drops a constant voltage from the output voltage of the step-down circuit E to generate a voltage lower than the step-down circuit output voltage. The voltage detection circuit 1 detects the output voltage of the constant voltage circuit at a predetermined threshold voltage and supplies the detected output to the control terminal 31 of the step-down circuit 32.

In the semiconductor integrated circuit having the above configuration, the internal power supply circuit is connected to the voltage VCC supplied to the power supply terminal 10.
A constant voltage VjNT lower than C is used as a power supply voltage for internal functional circuits. In addition, in the internal power supply circuit, from the voltage vCc to the voltage VI
Obtained NT. That is, in step-down circuit 2, the voltage detection circuit supplied to its control terminal 31! The voltage VCC is stepped down according to the output from the unit to obtain the voltage VINT.

Furthermore, the constant voltage circuit product lags a predetermined constant voltage ΔV from this voltage VINT and supplies it to the voltage detection circuit 34.

The voltage detection circuit is the output voltage (
VINT-Δ■) is detected using a predetermined threshold voltage VTR.

Since this detection output is supplied to the control terminal 31 on the step-down circuit, the output voltage VINT from this step-down circuit is
1 is controlled to match (VTH+ΔV) by a closed loop consisting of the step-down circuit 32, the constant voltage circuit, and the voltage detection circuit U.

4 to 7 are specific circuit diagrams of the internal power supply circuit L1 in the embodiment circuit shown in FIG. 3, respectively.

In FIG. 4, the step-down circuit 32 is constituted by an enhancement type P-channel MOS transistor 101, and the source of this Mo8 transistor 101 is connected to the terminal 1.
0, the drains are connected to the internal power supply line 40, respectively,
Further, dart is connected to control terminal 3. Constant voltage circuit, 33 is four diodes 201-- connected in series.
204 and a resistor 205 for allowing current to flow through these diodes 201 to 204, and with respect to the voltage vrNT supplied to the internal power supply line 40, ΔV =
A constant voltage drop f of 4 Vy is applied. However, vF is the forward voltage of each diode 201 to 204 υ, and if vF is 0.5V, ΔV is 2. It becomes OV. The voltage detection circuit (■) includes a CMOS inverter 303 consisting of a P-channel MOS transistor 301 and an N-channel MOS transistor 302, and another CMOS inverter 303 with a similar configuration.
It is configured by cascading S inverters 304. The threshold voltage VTIf of this voltage detection circuit U is mainly determined by CMOS
Threshold voltage Vth of each of the two Mo8) runnostars 301 and 302 that constitute the inverter 3θ3
and mutual conductance, for example, 1
．． It is set to 5v.

In the internal power supply circuit having such a configuration, the voltage VINT of the internal power supply line 40 is equal to the threshold voltage V of the voltage detection circuit 34.
If it is lower than the sum of TH and the constant voltage drop Δ■ in the constant voltage circuit U, that is, if VINT (VTH+ΔV), the output signal of the voltage detection circuit 34 will be at a low level (Vsst
As a result, the conductivity of the P-channel MOS +-gingister 1θ1 is increased, and the voltage VINT of the internal power supply line 40 is increased. On the contrary, VINT > V
If TH+ΔV, the output signal of voltage detection circuit H will be high.
(Vcc level) and Nasi, this allows P channel MO
The degree of conductivity of the S transistor 10 decreases, and the voltage INT of the internal power supply line 40 becomes low. Through the above operation, the voltage Vr'NT of the internal power supply line 4o becomes VINT =
It will be set to VTH+ΔV. That is, in this circuit, as mentioned above, ΔV is 2. Since OV
In addition, the VINTO value remains constant at 3.5■ even with voltage fluctuations, power supply spikes, and fluctuations due to power supply noise.

The internal power supply circuit shown in FIG. 5 shows an example in which the step-down circuit 32 is constituted by an enhancement type N-channel Mo8) transistor 102. The drain of this Mo8 l-transistor 102 is connected to the terminal 10, the source to the internal power supply line 4o, and the dart to the control terminal 3no. At this time, the voltage detection circuit 3i is constituted by an inverter circuit 307 including an N-channel MOS transistor 3θ5 and a load resistor 306. That is, compared to the circuit in FIG. 4, this circuit has a P-channel MO
S) Since the lannostar 101 has been replaced with an N-channel Mo8 transistor 102, and the operation with respect to the signal supplied to the control terminal 31 is reversed, the voltage detection circuit (2) has also been changed from a two-stage inverter configuration to a one-stage inverter configuration. has been replaced by that of It should be noted that the N-channel MOS transistor 102 in the circuit of FIG. 5 may be of a guy depression type.

In the internal power supply circuit of Fig. 6, the step-down circuit of Fig. 4 and! P channel MOS as ) P channel MOS in place of transistor 101
An NP-type bipolar transistor 103 is used, and even with this configuration, the circuit operates in the same way as the circuit of FIG. 4.

At this time, the control terminal 31 is connected to the base of the PNP type bipolar transistor 1030.

In the internal power supply circuit of FIG.
A PN type bipolar transistor 104 is used, and even with this configuration, the circuit operates in the same way as the circuit shown in FIG.

At this time, the voltage detection circuit U includes a P-channel MOS transistor 30 and an N-channel MOS transistor 302.
It is composed of a one-stage CMOS inverter 303 consisting of. Although this may be configured in the same manner as the inverter circuit 307 in FIG. 5, a CMO8 configuration is more effective in supplying a larger pace current to the bipolar transistor 104.

FIG. 8 is a block diagram showing the configuration of another embodiment of the invention. In this embodiment circuit, two internal power supply circuits 30 having different output voltages are provided with 30B, and different parts of the internal power supply circuitry are operated by the respective output voltages VI NT I and VINT2. Like this 2
By providing 30B in the two internal power supply circuits 30, the power supply voltage is lowered in one part of the internal function circuit LA to reduce power consumption, and the power supply voltage is increased in the other part to increase the operating speed. It is possible to obtain the effect of aiming for.

In this way, the following effects are achieved in the above embodiment. First, in each embodiment, it is possible to obtain on-chip an internal power supply circuit that outputs a constant voltage of 3.5 cm with high current supply capability for a wide range of externally supplied power supply voltage Vcc from 3.5 V to 8 V, for example. can. Under this constant and stepped-down internal power supply voltage, the internal functional circuits including MOS transistors with an effective channel length of 1 μm or less operate.
All the problems of power supply voltage limitations due to miniaturization of OS transistors can be solved, and thereby a submicron semiconductor integrated circuit without deterioration phenomena can be realized.

Furthermore, even if the external supply voltage changes, the internal functional circuits operate under a constant, stepped-down internal power supply voltage.
It is possible to realize a y-hizab micron semiconductor integrated circuit in which performance such as operating speed and current consumption remains constant and stable against changes in externally supplied power supply voltage.

Similarly, a semiconductor integrated circuit that is resistant to power supply noise can be realized, and a semiconductor integrated circuit that does not deteriorate even when the power supply is turned on can be realized.

This makes it possible to operate semiconductor integrated circuits containing MOS transistors with an effective channel length of -1 μm or less on a single 5V power supply, which is the conventional standardized power supply, and with a TTL interface. For example, it can also be operated with similar performance under a 3.5 V power supply.

Note that this invention is not limited to the above-mentioned embodiments, and various modifications are possible. For example, the step-down circuit 32 has been described as being composed of a single MOS transistor or bipolar transistor, but it may also be composed of two or more transistors connected in parallel or in series. In addition, we have explained the case where the output voltage of the internal power supply circuit shown in Figs. 4 to 7 is set to 3.5V. As the effective channel length of a MOS transistor is reduced to 1 μm, 0.5 μm + 0-1 μm, for example, 3.5V, 2.5V,
Needless to say, the voltage can be changed to 0.5 V or the like.

〔Effect of the invention〕

As explained above, according to the present invention, it operates with high reliability and constant performance without deterioration under a wide range of externally supplied power supply voltages, does not deteriorate due to power supply spikes, and is resistant to power supply noise and fluctuations. A semiconductor integrated circuit that operates stably can be provided.

[Brief explanation of the drawing]

1 and 2 are a cross-sectional view and an energy band state diagram of a general MOS transistor, respectively, FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention, and FIGS. FIG. 3 is a circuit diagram specifically showing a part of the embodiment circuit, and FIG. 8 is a block diagram showing the configuration of another embodiment of the present invention. 10...power terminal, 20...ground terminal, 3°0...
・Internal power supply circuit 1, 40...Internal power supply line, 50...
Internal functional circuit, 60... Input terminal, 70... Output terminal, 31... Control terminal, 32... Step-down circuit, 33...
... Constant voltage circuit, 34-... Voltage detection circuit, 101.
...P channel MOS transistor, 102...N channel MO3) transistor, 103...PNP type bipolar transistor, 104...NPN type bipolar transistor. Applicant's agent Patent attorney Takehiko Suzue Figure 5 VENT Figure 6 VENT Figure 7 ■

Claims (7)

[Claims] (1) a power supply terminal to which a power supply voltage is supplied from the outside; a step-down means having a control terminal and reducing the voltage of the power supply terminal;
an internal power supply line to which the voltage stepped down by the step-down means is supplied; means for generating a voltage lower by a predetermined constant voltage than the voltage on the internal power supply line; and a voltage generated by the means at a predetermined threshold voltage. a voltage detecting means for detecting the voltage and supplying its detection output to the control terminal of the step-down means; and a functional circuit constituted by an M/S transistor that operates using the voltage supplied to the internal power supply line as a power supply voltage. A semiconductor integrated circuit characterized by: (2) The semiconductor integrated circuit according to claim 1, wherein the voltage step-down means is a transistor element. (3) The semiconductor integrated circuit according to claim 2, wherein the transistor element is a P-channel MOS transistor. (4) The semiconductor integrated circuit according to claim 2, wherein the transistor element is an N-channel MOS transistor. (5) The semiconductor integrated circuit according to claim 2, wherein the transistor element is a PNP type bipolar transistor. (6) The semiconductor integrated circuit according to claim 2, wherein the transistor element is an NPN type bipolar transistor. (7) Claim 1, wherein the means for generating a voltage lower by a predetermined constant voltage than the voltage on the internal power supply line includes one PN junction diode or two or more PN junction diodes connected in series. The semiconductor integrated circuit described in .