JPS5911073A - Signal processing circuit of solid-state image pickup device - Google Patents

Abstract

PURPOSE:To have actuation and no actuation of the amplifier of a signal processing circuit when a horizontal switch is turned on and off respectively, by inserting a reset switch between a preamplifier and a feedback resistance. CONSTITUTION:A feedback resistance Rf has 100-500kOMEGA resistance value and 10-30pF output line capacity and a preamplifier has about 100 gain Av. The resistance Rf is set in parallel to the preamplifier. Under such conditions, the input impedance Zin of the preamplifier is set as 100kOMEGA/100=1kOMEGA during operation of the preamplifier. Then the signal charge of the capacity 66 is quickly read out. While the impedance Zin is equal to the resistance Rf itself while the preamplifier has no actuation, and the time constants of the capacity 66 and the impedance Zin are set at >=1mus. Then the signal is read out at a high speed of 5-20MHz. Therefore the signal charge is held at an output capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to improving the performance of a solid-state imaging device (peripheral cell) that reads out optical information accumulated in a plurality of photodiodes arranged one-dimensionally or two-dimensionally on a semiconductor surface. It is.

As a conventional element, there is one shown in FIG. 1, for example.

FIG. 1 shows an example of the basic configuration of a two-dimensional solid-state sensor. 1 and 2 are horizontal and vertical scanning circuits, respectively, and usually have 2 to 4 phase clock pulses CPx, CPy.
By applying , the input voltage Vsx%Vsy is shifted by a certain timing time of the clock, and the output voltage (Vox(+l, ■...,Vo
y(1), oyf21... each stage of the scanning circuit ox
f21 ■ Line of force OX+IN OX+21”””% 0y(I
lt oy (2, , , , , f output) J. This pulse train opens and closes the switching elements 5 and 6, and converts the signals from the individual photoelectric conversion elements 3 arranged two-dimensionally into a video signal. It is taken out onto the output line 4. Since the signal from the photoelectric conversion element corresponds to the optical image projected thereon, the video signal can be taken out by the above operation.

5.00 to obtain high resolution in this type of solid-state sensor.
Approximately 500 photoelectric conversion elements, switching elements, and scanning unit circuits are required.

Therefore, it is usually relatively easy to achieve high integration, and MOS-
Manufactured using LSI technology. Figure 2 shows the individual imaging IC.
This shows the structure of the photoelectric conversion element that occupies most of the area. 1
3 is a semiconductor substrate, 5.6 is a MOS switch for selecting horizontal and vertical positions, and 4is, i6. It is made of a gate electrode 9.14 provided with an H insulating oxide film 81 interposed therebetween. 10 is vertical M
This is a photodiode that uses the source of an OS switch.

Output pulse of a scanning circuit using a MOS shift register, etc.■. x(N) IVo, (N) is the output line OX 0, (N
) to the gate of the MOS switch at the same time [IJ 7
The charge that had been discharged from the dimeter 10θ) at the JII position in proportion to the incident photoacid is charged from the video '+tE11. The charging current at that time is read out from the output terminal (JUT 8) as a video signal through the load resistor 12.

However, such conventional elements suffer from fixed pattern noise due to the following reasons.
No.1se) has occurred, which is a fatal defect.

Figure 3 (Al is a simplified representation of the structure in Figure 2, 13 is a p-type silicon substrate, 10 is 1
It consists of two photodiodes and an n+ diffusion layer. Third
16 corresponds to the horizontal signal output line 4 shown in FIG. 1, and lines 15 and 16 in FIG. 3 are each made of a metal such as aluminum or a conductive material such as an n+ diffusion layer.

Figure 3 (B) to Figure 3) shows the channel potential corresponding to (A). Since we are considering an n-channel device, the potential should be set in the positive direction.

FIG. 3 (13) shows a signal charge 31 in the photodiode 10.
is accumulated, and O2 is applied to the 6 gates 14 of the vertical transistors (hereinafter abbreviated as VTr) and the gates 9 of the horizontal transistors (hereinafter abbreviated as HTr) 5, and both transistors are turned off.

In Figure 3 (C), VTr6 is on and the signal charge is VTr6.
It shows a state in which the signal line is spread under the gate 14 and to the vertical signal line 15. FIG. 3(D) shows the potential in the process of being output when HT and r5 are also turned on, and the signal charge spreads to the horizontal output line 16 as well. Figure 3 (the figure shows the state in which the signal charge has been read out and each potential has been reset to Vo. In Figure 8 (F'), HTr5 is turned off.
C, the signal of the next picture element is being read out.

Now, as you can see from Figure 3 (E) and (F'),
A portion 32 of the signal charge is left behind under the gate 9 of the horizontal MOS switch transistor HTr5, and is output from under the gate to the output line when the horizontal pulse is turned off.

FIG. 4 (Aj is an example of a conventionally well-known shift register consisting of an inverter and a transfer gate.

As shown in the pulse chart of FIG. 4(B), in the conventional element, the n-th horizontal pulse V o x (n)
is turned off and the next (n+1)th horizontal
The time when X(n+1) is turned on is the horizontal synchronization pulse φx2
are determined by the same trigger.

In other words, the time when the horizontal pulse Vox (n+1) is turned on is the time when the signal on the (n+1)th column is output, but it is also the time when the horizontal pulse Vox (nl) on the nth column is turned off. From the figure, in short, in the conventional example,
At the time when the +1st column signal is output, part of the nth column signal charge QR32 trapped under the gate 9 of the nth column horizontal switch fvlO8) transistor 5 is output. It will become. There is no problem if this residual charge QR is equal in all columns, but it causes variation and fixed noise.

Therefore, the inventors of the present invention solved the problems of the prior art described above and aimed to improve the performance of solid-state sensors.
We previously proposed a scanning method in which the horizontal pulse Vox(n) of the i-th column is turned on, and the horizontal pulse Vox(n) of the n-th column is turned off before reading the signal of the n+1-th column ( (patent pending).

This scanning method will be explained below.

In FIG. 5, 51 is a shift register as shown in FIG. 4, for example. The output line 52 is connected to
A pulse like the one shown is output. The essence of this example is that another gate transistor 53 is provided between the output line 52 of this shift register and the MOS switch, and the pulse applied to the gate of the MOS switch is applied to the gate transistor 53.
3, the drain line 54 is supplied.

V o x (nl) of the scanning circuit shown in FIG. 5 (A+) is a pulse whose pulse width is the period in which the output VX o of the shift register and φx3 are ANDed.

In this embodiment, after Vox (nl is turned off), Vox (n + 1) is turned on again.

In addition, in the embodiment of FIG. 5, the high level 1 of φ, x3
1f8Ev, , , high level V8. of the output of the soft register 51. ．． ．． Between the threshold voltage Vlh of the gate transistor 53, the gate transistor operates in the non-saturation region.
The output waveforms, especially the output amplitudes, of ox(nl, Vox(n+1.)) can be made uniform, and the effect of this scanning method is further increased.

Further, the signal readout time is the pulse width of V o x (n), that is, the width of φ83, and it is also possible to adjust this width as appropriate.

Figure 6 shows a signal processing circuit previously filed by the present inventors as a signal processing circuit for a device using the above scanning method in order to suppress fixed pattern noise (hereinafter abbreviated as F''PN). The horizontal switch MO8) transistor 5 (Fig. 3) in 61 is turned on and the signal is transferred to the output line capacitor 66,
After the horizontal switch MOS transistor 5 is turned off, the reset transistor 65 is turned on (651: the reset pulse terminal signal is taken out, and the horizontal switch MO8) I can get the signal without any problem. In other words, the FPN can be extremely suppressed. The seventh point is that since the reset transistor 65 is installed in front of the preamplifier 62, random noise generated in the reset transistor 65 (resistance thermal noise, current shot noise, 1/f
noise, etc.) are also amplified by the preamplifier 62. As a result, F'PN decreases, but random noise increases.

The present invention solves this problem and realizes a static image device with a high signal-to-noise ratio.

f! Examples of the present invention are shown from Figure 7 onwards.

The gist of the present invention is to prevent the preamplifier 62 from functioning as a preamplifier when the horizontal switch MO85 is on. The feedback resistor Rf63 inserted in parallel with the preamplifier is generally 100Ω to 5
The output line capacitance 66 is about 10 to 3 Q pF. The gain of the preamplifier is A
v (approximately 100 times jf), when the preamplifier is operating, the input impedance Zin of the amplifier becomes, and the signal charge at the output section 66 is quickly read out. Conversely, when the preamplifier is not operating, Zin becomes Rf itself, and the time constant of each output group 66 and Zin becomes 1 μs or more. Since signal reading is performed at a high speed of 5 to 20 MHz, it is clear that when the preamplifier is not operating, it is safe to assume that the signal charge is held in the output capacitor.

That is, in the conventional example of FIG. 6, the reset transistor 65 is turned on and off between the sensor 61 and the preamplifier 62.
In contrast, in the present invention, the preamplifier itself is turned on and off to suppress FPN and detect only necessary signals. Furthermore, since nothing is inserted before the preamplifier, random noise may increase, but a high S/N ratio can be obtained.

In the embodiment shown in FIG. 7, a reset switch 67 is inserted between the preamplifier 62 and the feedback resistor 63 (73
: Reset pulse terminal).

In the embodiment shown in FIG. 8, the preamplifier and power supply (power supply terminal 71)
The preamplifier itself can be turned on and off by inserting switch 68 (72 switching pulse terminal) between
It is something to do.

Furthermore, in the embodiment shown in FIG. 9, the FPN is suppressed by using a pulse power source (69: pulse power supply terminal) instead of a direct current power source.

In the above inventions shown in FIGS. 7 and 8, a switch (MOS) range nut is used; however, the present invention is not limited to this, and bipolar transistors and JF transistors are used.
” ET etc. may be used.

The embodiment shown in Figure 10 adds a pulse to the middle of the preamplifier (terminal 70) and takes advantage of the fact that the amplifier saturates when the pulse is applied, and the preamplifier operates normally when the pulse is at a low level. signal is read.

In the embodiment shown in FIG. 11, a switch 74 is provided at the output end of the preamplifier. Control pulse of this switch (75:
When the control pulse terminal (control pulse terminal) is at a low level, the operating point of the preamplifier goes out of order and does not operate normally, and when it is at a low level, the operating point becomes normal and a signal is read out.

[Brief explanation of the drawing]

1 and 2 are diagrams showing an outline of a conventional solid-state imaging device,
Fig. 3 is a conceptual diagram showing the operation of a solid-state imaging device, Fig. 4 is a diagram showing a conventional scanning circuit, Fig. 5 is a diagram showing a scanning circuit that outputs a plain square scanning pulse, and Fig. 6 is a conventional 7, 8, 9, 10, 1
FIG. 1 is a diagram showing an embodiment of the signal processing circuit of the present invention. 61: Solid sensor 62: Preamplifier 63: Feedback resistor 64: Output terminal
oxeyr, ) Vax
vtvr) CB) Vriλ6 kuna I Vox (Hηsu2 Y 6 mouth closed lθ ward 61 ”fr tt Figure 1st page continued/72) Inventor Toshiyuki Akiyama In-house 72 Author Shusaku Nagahara 1 Higashi Koigakubo, Kokubunji City 280-Chome, Hitachi, Ltd., Central Research Laboratory, 292 Yoshida-cho, Totsuka-ku, Yokohama 292 Yoshida-cho, Totsuka-ku, Yokohama City, Hitachi, Ltd., Home Appliance Research Laboratory, 72-inventor; Shoji Hanamura, 1-280 Higashi-Koigakubo, Kokubunji City; Hitachi, Ltd. Central Research Laboratory 72) Inventor Masakazu Aoki 1-280 Higashikoigakubo, Kokubunji City, Hitachi, Ltd. Central Research Center, 45C

Claims (1)

[Claims] 1. A signal processing circuit for a solid-state imaging device having a vertical and horizontal scanning circuit, a vertical and horizontal switching element, and a photoelectric conversion element whose position is selected by the switching element,
A signal processing circuit for a solid-state imaging device, wherein an amplifier of the signal processing circuit does not operate when the horizontal switch element is on, but operates when the horizontal switch element is off.