JPS59110380A - Inverter modulation system - Google Patents

Abstract

PURPOSE:To prevent the erroneous operation of a control rectifier and to improve the reliability by limiting the number of inversions of the compared output of a carrier with a modulation wave in the increasing and decreasing zones of the carrier once at every increasing and decreasing zones. CONSTITUTION:A latch circuit 28 has functions of inputting an output 3 of a comparator 22 to a terminal D or outputting a signal of an input D to an output Q by a signal of enable input E and latching. On the other hand, an exclusive logic circuit 29 compares a resultant gate signal 3 as the output signal of the output Q of the latch circuit 28 with a zone discrimination signal 27, and generates a signal for latching the output Q of the latch circuit 28 when the signal 3 coincides with the signal 27. The signal 27 is a signal representing the increasing and decreasing zones of a carrier. In this manner, the erroneous operation of a control rectifier can be prevented, thereby improving the reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a high frequency pulse width modulation inverter modulation system that improves reliability.

If you want to make the inverter's output voltage waveform close to a sine wave,
It is common to use the following high frequency pulse width modulation method.

FIG. 1 shows an embodiment of the 840 inverter modulation method.

The figure shows the case of 3-pulse modulation in which the number of pulses in an output half cycle is 8. In Figure 1, (1) is a triangular carrier wave that determines the number of pulses (3) and the pulse interval, (2) is a modulation wave that determines the magnitude of the fundamental wave of the output voltage, and (3) is the carrier wave (1). Borrowing the composite gate obtained by comparing the modulated wave, (4) to (6), the composite gate signal (3) is
These are U, V, and W phase gate signals obtained by dividing each phase of U, ■, and W by 0° in the order of phase.

Each phase gate signal (4) to (6) is
The signals are distributed as gate signals for controlled rectifying elements such as thyristors in the U, -, and W phases of the -tar circuit.

That is, the U sum gate signal (4) indicates the conduction state of the U-phase upper arm thyristor α fathom when it is high, and the conduction state of the U-group lower arm thyristor 09 when it is low. Similarly, the ■ phase and W sum gate signals (5) and (6) are also V, W
It represents the conduction state of assembled upper and lower arm thyristors O to αη and 0 barrel c11. Therefore, the three-phase AC outputs (7) to (9) consisting of the pulse train shown in FIG. 1 are obtained between the output lines of the three-phase inverter's output U, ■, and W phases in FIG. 2. Modulation e(2) and carrier wave(1)
By controlling the height of either one, the output pulse width can be adjusted and the output voltage can be controlled.

In FIG. 2, OI is a DC power supply, αυ is a breaker, (6) is a filter reactor, and (to) is a filter capacitor.

FIG. 8 is an example of a block diagram of the modulation method shown in FIG. 1. In the figure, 4 is a modulated wave generation circuit, ■υ is a carrier wave generation circuit, 2) is a comparator, 2) is a U-phase distribution circuit, 1 is a V-phase distribution circuit, 2) is a W-phase distribution circuit, and 4 is a phase angle This is a generation circuit. The output of the comparator (2) is the combined gate signal (3) shown in Figure 1, and the output of the U, V, W phase distribution circuit ).

Next, the minimum on-off period tmin shown in FIG. 1 will be explained. Control elements such as Cyrisk have a limited switching frequency. In addition, the commutation period, turn-off time, etc. for turning off the thyristor are required.
Since the gate amplification circuit also has a minimum value for the on/off repetition time, the minimum on/off period tmin O value is U,
The carrier wave (1) is modified so as to limit the minimum pulse width of the V and W phase gate signals (4) to (6).

However, although this method can ensure the minimum pulse width at the peak point of the carrier wave (1), when the modulated wave (2) changes rapidly, the minimum on-off JuJ interval tmin
The value of may not be secured. FIG. 4 shows an example of a case where the minimum on-off period tmin cannot be secured. A
If the modulated wave (2) suddenly decreases at the point, V
The sum gate signal (5) cannot secure the minimum on-off period tmin at point B and point 6. As described above, the conventional method has the drawback that the controlled rectifier element is likely to cause a failure in IJ+L due to a sudden change in the modulated wave.

This invention has been made in view of the above, and by limiting the number of inversions of the comparison output with the modulated wave to one in each period of increasing and decreasing carrier waves, the minimum on-off interval t This invention provides an inverter modulation method that ensures min.

The figures will be explained below. In FIG. 5, the same symbols as in FIG. 4 indicate the same signals. At point D in Figure 5, even if the composite gate signal (3) is inverted, in the section where the carrier wave (1) continues to decrease, if the re-inversion of the composite gate signal (3) is restricted, the U-V The output waveform (7) does not have a thin slit of 1], and the minimum on-off period is t+in e K.
(I try to keep it.

An embodiment of a circuit for limiting re-inversion of the composite gate signal (3) is shown in FIG. In FIG. 6, arrows indicate the same functions as in FIG. 3. In Fig. 6, 2) is a latch circuit that inputs the output (3) of the comparator (1) to (1), and outputs Q by the signal of the enable input (E) manually (I)).
It has the function of outputting and fixing (latching) signals. 12! Jl is an exclusive logic circuit, and the latch circuit 11'&@
output (to the latch circuit when the composite gate signal (3) and the interval discrimination signal (B) match, which is the output signal of J, is compared with the composite gate signal (3) and the interval discrimination signal Q). The output ((generates a signal that latches 0; also used as the section discrimination signal) is a signal indicating the increasing section and decreasing section of the carrier wave (1).

In the above embodiment, the ratio of the signal indicating the increasing section and the decreasing section of the carrier wave and the composite gate signal is set by 1, and the composite gate signal is fixed, thereby limiting the number of times of reversal of the national power in comparison between the modulated wave and the carrier wave. We have shown the method, but for example,
Section 1 - Instead of the discrimination signal, there are methods that divide the increase and decrease sections using a signal obtained by differentiating the carrier wave, a method that latches the modulated wave instead of a method that latches the composite gate t-(g), and a method that latches the modulated wave from the point of inversion. The same effect as in the above practical example can be obtained by fixing the value at the maximum value (when increasing) or the minimum value (when decreasing E dimension).

According to the present invention, the number of inversions of the comparison output between the carrier wave and the modulated wave is limited to one in each increase interval and decrease interval of the carrier wave, thereby controlling the control mW element. Malfunctions are prevented. This improves reliability.

[Brief explanation of drawings]

Figures 1 to 4 are diagrams explaining conventional modulation methods.
The figure is a waveform diagram, the causes of the second regeneration circuit 414, Figure 8 is a block diagram of the modulation circuit, Figure 4 is a waveform diagram explaining inversion, and Figure 6 is a waveform diagram explaining the inversion.
FIG. 6 is a waveform diagram of a modulation method according to the present invention, and FIG. 6 is a block diagram of a modulation circuit according to an embodiment of the present invention. In the figure, (1) is a carrier wave, (2) is a modulated wave, and (3) is a comparison output. Note that the same reference numerals in each figure indicate the same or equivalent parts. Agent Kuzuno Individual - Fig. 1 Fig. 2 Negative S3 Fig. 4 ki itlil algae IFi,, * wave

Claims (1)

[Claims] The carrier wave that determines the ratio and shape of the modulated pulses output by the high frequency pulse width modulation inverter is compared with the modulated wave that determines the magnitude of the output voltage of the inverter, and the control signal for the control sidestream element of the inverter is The inverter modulation method is characterized in that the number of inversions of the comparison output between the carrier wave and the modulated wave in the carrier wave increase interval and the carrier decrease interval is limited to one for each interval.