JPS5911029A - Automatic power-off circuit - Google Patents
Automatic power-off circuitInfo
- Publication number
- JPS5911029A JPS5911029A JP57119169A JP11916982A JPS5911029A JP S5911029 A JPS5911029 A JP S5911029A JP 57119169 A JP57119169 A JP 57119169A JP 11916982 A JP11916982 A JP 11916982A JP S5911029 A JPS5911029 A JP S5911029A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- turned
- put7
- turns
- timer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K2017/226—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in bipolar transistor switches
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、刊−ディオ用アンフ0、プ゛ツキ、テレビ、
チ、−す、ラジオ等のセットにおいて、音声信号または
ミi−ティング(Mutir+g)信号等を制御信号と
して利用し、七ノドが使用状態でなくなってから一定時
間後に自動的に電源回路の切断を行う(側路に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Field of Application) The present invention is applicable to digital amplifier 0, pushbutton, television,
In sets such as buses, radios, etc., audio signals or meeting (Mutir+g) signals are used as control signals to automatically disconnect the power supply circuit after a certain period of time after Nananodo is no longer in use. (This is related to side roads.)
(従来例の構成とその問題点)
従来、これらの音響機器等のセットの電源入力を自動的
に切断しようとする時には、別途タイマーを利用してい
るのが普通であるが、タイマーは前記セットが使用中で
あるか否かにかかわらず時間によって制御されるもので
あるため、タイマ一時間の設定上不都合な面が多かった
。(Configuration of conventional example and its problems) Conventionally, when attempting to automatically cut off the power input to a set of audio equipment, etc., a separate timer was normally used. Since it is controlled by time regardless of whether it is in use or not, there are many inconveniences in setting the one-hour timer.
(発明の目的)
本発明はこのような欠点を除去するためになされグこも
ので、音声イぎ号、ミューティング信号等をタイマーの
制御信号として利用し、その信号が有ればタイマーをリ
セットした侭にしておき、信号カド・lシ<なればタイ
マーと動作させるようにして、消し忘ハ及びスリーブタ
イマーとしての機能を実現することを目的とする。(Objective of the Invention) The present invention was devised to eliminate such drawbacks, and uses an audio signal, a muting signal, etc. as a control signal for a timer, and if the signal is present, the timer is reset. The purpose of this invention is to realize the functions of a timer and a sleeve timer by leaving it in the standby position and having it operate as a timer if the signal card/l is turned off.
(犯例の構成)
本発明は、第1図にブロック図で示すように制御信号■
によりタイマーのりセット信号を発生ずる回路11と、
制御信号が無くなった後一定時間彼処信号を出すタイマ
ー回路■と、その出力信号により前記セットの電源をオ
ン・オフするリレーを制御する回路1vとより成ってい
る。(Configuration of criminal example) As shown in the block diagram in FIG.
a circuit 11 that generates a timer setting signal;
It consists of a timer circuit (2) that outputs a signal for a certain period of time after the control signal disappears, and a circuit (1v) that controls a relay that turns on and off the power of the set based on its output signal.
(実施例の説明)
第2図は本発明による一実施例の回路構成を示すもので
、ここでは制御信号として音声信号を用いた場合の例を
示している。(Description of Embodiment) FIG. 2 shows a circuit configuration of an embodiment according to the present invention, and here shows an example in which an audio signal is used as a control signal.
図中1及び2は前記音響機器等のセットの電源釦よびそ
のセットの回路への接続端子であり、3は制御信号であ
る音声信号の入力☆1i11−r−14は電源スイッチ
、5はリレー6の接点、7&ユタイマ一回路に使用する
700ログラマブルユニノ1.ンクンヨン°1゛ランジ
スタ(Programmable Unijuncti
onTransistor 、以下PUTという。)、
8〜11はトランノスタ、12〜]5はダイオード、1
6〜10はダイオード、20〜28はl(抗、29 、
301、 PUT 7の端子である。In the figure, 1 and 2 are the power button of the set of audio equipment and connection terminals to the circuit of the set, 3 is the input of the audio signal which is the control signal ☆1i11-r-14 is the power switch, and 5 is the relay 6 contacts, 700 logramable unino used for 7 & timer circuit 1. Programmable Unijuncti
onTransistor, hereinafter referred to as PUT. ),
8-11 are transnostars, 12-]5 are diodes, 1
6 to 10 are diodes, 20 to 28 are l (anti, 29,
301, PUT 7 terminal.
音声信号入力端子3から人力された音声信号は、ダイオ
ード14及び15とコンデンサ18及び19よりなる整
流回路で整流された後トランノスタ80ベースに人力さ
れる。The audio signal inputted from the audio signal input terminal 3 is rectified by a rectifier circuit including diodes 14 and 15 and capacitors 18 and 19, and then inputted to the trannostar 80 base.
トランノスタ8はその人力によりオンとなり、PUT
7の端子30は接地電位となり、PUT7はオフのまま
となってPUT 7を用いたタイマー回路は動作せス、
トランノスタ10はオフ状態の捷まとなり、コレクタ電
位が上昇してトランノスタ110まオン状態となる。そ
のためリレー6が動いてその七一点5がオンとなり、セ
、1・は動作する。Trannostar 8 is turned on by its human power and PUT
Terminal 30 of PUT 7 becomes ground potential, PUT 7 remains off, and the timer circuit using PUT 7 does not operate.
The trannostar 10 remains in the OFF state, and the collector potential rises to turn the trannostar 110 on. Therefore, the relay 6 moves and the 71st point 5 turns on, and 1 and 1 operate.
次にM声信号がなくなれば、トランノスタ8はベース電
位が下りオフ状態となる。するとコンデンサ17は抵抗
24を通して充電を開始し、その電1′入lがJJ”:
ti’+’、 2 +及び22によって決定されるP
UT7の端r20の電位を1:[有]えた瞬間にPUT
7はオンとなる。Next, when the M voice signal disappears, the base potential of the trannostar 8 drops and it becomes off. Then, the capacitor 17 starts charging through the resistor 24, and the current input becomes JJ":
P determined by ti′+′, 2 + and 22
PUT at the moment when the potential of end r20 of UT7 is set to 1:
7 is turned on.
PUT 7がオンとなると、トランジスタ10のベース
電流が流れてこれがオンし、そのコレクタ電位がFるた
め、トランジスタJ1はオフとなり、リレー6が復旧し
てその接点5を開放しセットの回路は′電源から開放さ
れる。When PUT 7 is turned on, the base current of transistor 10 flows and turns it on, and its collector potential becomes F, so transistor J1 turns off, relay 6 is restored and its contact 5 is opened, and the set circuit is It is disconnected from the power supply.
捷だトランジスタ9もI”UT 7のオンに伴いオンと
なり、トランソ玉夕8のベースを接地電位に・保つよう
に動作し、回路を自己保持する。The switching transistor 9 is also turned on as the I"UT 7 is turned on, and operates to maintain the base of the transformer transistor 8 at the ground potential, thereby self-maintaining the circuit.
なお、抵抗23を大きな値にしておけばPUT 7によ
るタイマーは保持されたままとなる。Note that if the resistor 23 is set to a large value, the timer by PUT 7 will continue to be held.
(発明の効果)
卯、上述べた」:うに、本発明によれば、セフ 1−が
使用状態でなくなってから、一定時間後に電源が刊フと
なるので、従来のタイマーのような時間設定をする必要
がなく、消し忘れ防止ともなるので、省エネルギーにも
貢献する等の利点がある。(Effect of the invention) Rabbit, as mentioned above: According to the present invention, the power is turned off after a certain period of time after the cellphone 1- is no longer in use, so the time setting like that of a conventional timer is not required. There are advantages such as contributing to energy saving as there is no need to turn off the switch and it prevents you from forgetting to turn it off.
第1図は本発明の詳細な説明するだめのブロック図、第
2図は本発明による一実施例の回路構成を示す図である
。
1・・・制置41信号、11−・・リセット信号発生回
路、IIl・・タイマー回路、IV・・リレー制御回路
、1・電源端子、2・・回路端子、3・・畠−声信号入
力端r、4・・電源スイッチ、5・・・リレー6の接点
、6・・リレー、7・・・PUT、8〜II・・・トラ
ンノメタ、12〜15 ・ダイオード、16〜19・−
・コンデンサ、20〜28・・・抵抗、29 、 :3
0・・・端子。
第1図
第2図FIG. 1 is a block diagram for explaining the present invention in detail, and FIG. 2 is a diagram showing a circuit configuration of an embodiment according to the present invention. 1: Control 41 signal, 11: Reset signal generation circuit, IIl: Timer circuit, IV: Relay control circuit, 1: Power supply terminal, 2: Circuit terminal, 3: Hatake voice signal input End r, 4...Power switch, 5...Relay 6 contact, 6...Relay, 7...PUT, 8~II...Tranometa, 12~15・Diode, 16~19・-
・Capacitor, 20-28...Resistance, 29, :3
0...Terminal. Figure 1 Figure 2
Claims (1)
ずる回路と、制御信号が無くなった後一定時間後に信号
を出力するタイマー回路と、その出力信号により、電源
回路のオン・オフを行うリレーを制御する回路とを有す
ることを特徴とするメート・・暑゛ワー・刊フ回路。A circuit that generates a timer reset signal by the 111 Sumoiha, a timer circuit that outputs a signal after a certain period of time after the control signal disappears, and a relay that turns the power supply circuit on and off is controlled by the output signal. A mate circuit characterized by having a circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57119169A JPS5911029A (en) | 1982-07-10 | 1982-07-10 | Automatic power-off circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57119169A JPS5911029A (en) | 1982-07-10 | 1982-07-10 | Automatic power-off circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5911029A true JPS5911029A (en) | 1984-01-20 |
Family
ID=14754615
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57119169A Pending JPS5911029A (en) | 1982-07-10 | 1982-07-10 | Automatic power-off circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5911029A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0436488A2 (en) * | 1990-01-05 | 1991-07-10 | Pioneer Electronic Corporation | Sleep timer for audio/visual apparatus and method of sleep timer operation |
-
1982
- 1982-07-10 JP JP57119169A patent/JPS5911029A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0436488A2 (en) * | 1990-01-05 | 1991-07-10 | Pioneer Electronic Corporation | Sleep timer for audio/visual apparatus and method of sleep timer operation |
US5170159A (en) * | 1990-01-05 | 1992-12-08 | Pioneer Electronic Corporation | Sleep timer for audio/visual apparatus and method of sleep timer operation |
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