JPS59108325U

JPS59108325U - CMOS circuit device

Info

Publication number: JPS59108325U
Application number: JP262783U
Authority: JP
Inventors: 濱村　正夫
Original assignee: 三菱電機株式会社
Priority date: 1983-01-10
Filing date: 1983-01-10
Publication date: 1984-07-21

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は一般的なＣＭＯＳ回路装置の回路図、第２図は
従来の検出回路を設けたＣＭＯＳ回路装置の回路図、第
３図ないし第５図はそれぞれ本考案の実施例によるＣＭ
ＯＳ回路装置の回路図である。１．２・・・前段、後段のＣＭＯＳ回路、３，４゜１３
・・・ドレイン電源、５，１４．１５・・・ソー又電源
、１２．１６・・・ラッチアップ防止ダイオード。尚、図中、同一符号は同一、又は相当部分を示す。Fig. 1 is a circuit diagram of a general CMOS circuit device, Fig. 2 is a circuit diagram of a CMOS circuit device provided with a conventional detection circuit, and Figs. 3 to 5 are CMs according to embodiments of the present invention.
FIG. 2 is a circuit diagram of an OS circuit device. 1.2...CMOS circuits in the front and rear stages, 3,4°13
...Drain power supply, 5,14.15...Saw power supply, 12.16...Latch-up prevention diode. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims

[Scope of utility model registration request]

In a CMOS circuit device in which the power supply voltage is different between the preceding stage CMOS circuit and the succeeding stage CMOS circuit, the preceding stage CMOS circuit has different power supply voltages.
A CMOS circuit device comprising a diode connected between a drain terminal or a source terminal of an S circuit and a train power supply or source F to be applied to the CMOS circuit.